Re: [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction

2018-01-05 Thread Tom Lendacky
On 1/5/2018 10:35 AM, Brian Gerst wrote: > On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky wrote: >> To aid in speculation control, make LFENCE a serializing instruction. >> This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families >> that support LFENCE do

Re: [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction

2018-01-05 Thread Tom Lendacky
On 1/5/2018 10:35 AM, Brian Gerst wrote: > On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky wrote: >> To aid in speculation control, make LFENCE a serializing instruction. >> This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families >> that support LFENCE do not have this MSR. For

Re: [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction

2018-01-05 Thread Brian Gerst
On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky wrote: > To aid in speculation control, make LFENCE a serializing instruction. > This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families > that support LFENCE do not have this MSR. For these families, the

Re: [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction

2018-01-05 Thread Brian Gerst
On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky wrote: > To aid in speculation control, make LFENCE a serializing instruction. > This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families > that support LFENCE do not have this MSR. For these families, the LFENCE > instruction is

[PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction

2018-01-05 Thread Tom Lendacky
To aid in speculation control, make LFENCE a serializing instruction. This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families that support LFENCE do not have this MSR. For these families, the LFENCE instruction is already serializing. Signed-off-by: Tom Lendacky

[PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction

2018-01-05 Thread Tom Lendacky
To aid in speculation control, make LFENCE a serializing instruction. This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families that support LFENCE do not have this MSR. For these families, the LFENCE instruction is already serializing. Signed-off-by: Tom Lendacky ---