On 1/5/2018 10:35 AM, Brian Gerst wrote: > On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky <thomas.lenda...@amd.com> wrote: >> To aid in speculation control, make LFENCE a serializing instruction. >> This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families >> that support LFENCE do not have this MSR. For these families, the LFENCE >> instruction is already serializing. > > Does this require a microcode update?
No, it doesn't. Thanks, Tom > > -- > Brian Gerst >
