amhy...@kernel.org;
>vikas.shiva...@linux.intel.com; pombreda...@nexb.com;
>m...@kylehuey.com; b...@suse.de; Andrejczuk, Grzegorz
><grzegorz.andrejc...@intel.com>; Luck, Tony <tony.l...@intel.com>;
>cor...@lwn.net; Shankar, Ravi V <ravi.v.shan...@intel.com>; Dey, Megha
&
com; b...@suse.de; Andrejczuk, Grzegorz
>; Luck, Tony ;
>cor...@lwn.net; Shankar, Ravi V ; Dey, Megha
>
>Subject: Re: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch
>Monitoring support
>
>On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
>
>SNIP
>
amhy...@kernel.org;
>vikas.shiva...@linux.intel.com; pombreda...@nexb.com;
>m...@kylehuey.com; b...@suse.de; Andrejczuk, Grzegorz
><grzegorz.andrejc...@intel.com>; Luck, Tony <tony.l...@intel.com>;
>cor...@lwn.net; Shankar, Ravi V <ravi.v.shan...@intel.com>; Dey, Megha
&
com; b...@suse.de; Andrejczuk, Grzegorz
>; Luck, Tony ;
>cor...@lwn.net; Shankar, Ravi V ; Dey, Megha
>
>Subject: Re: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch
>Monitoring support
>
>On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
>
>SNIP
>
>
amhy...@kernel.org;
>vikas.shiva...@linux.intel.com; pombreda...@nexb.com;
>m...@kylehuey.com; b...@suse.de; Andrejczuk, Grzegorz
><grzegorz.andrejc...@intel.com>; Luck, Tony <tony.l...@intel.com>;
>cor...@lwn.net; Shankar, Ravi V <ravi.v.shan...@intel.com>; Dey, Megha
&
com; b...@suse.de; Andrejczuk, Grzegorz
>; Luck, Tony ;
>cor...@lwn.net; Shankar, Ravi V ; Dey, Megha
>
>Subject: Re: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch
>Monitoring support
>
>On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
>
>SNIP
>
&
amhy...@kernel.org;
>vikas.shiva...@linux.intel.com; pombreda...@nexb.com;
>m...@kylehuey.com; b...@suse.de; Andrejczuk, Grzegorz
><grzegorz.andrejc...@intel.com>; Luck, Tony <tony.l...@intel.com>;
>cor...@lwn.net; Shankar, Ravi V <ravi.v.shan...@intel.com>; Dey, Megha
&
com; b...@suse.de; Andrejczuk, Grzegorz
>; Luck, Tony ;
>cor...@lwn.net; Shankar, Ravi V ; Dey, Megha
>
>Subject: Re: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch
>Monitoring support
>
>On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
>
>SNIP
>
&g
On Mon, 2017-11-06 at 13:49 +0200, Alexander Shishkin wrote:
> On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
> > +static int intel_bm_event_init(struct perf_event *event)
> > +{
>
> ...
>
> > + /*
> > +* Find a hardware counter for the target task
> > +*/
> > + for (i =
On Mon, 2017-11-06 at 13:49 +0200, Alexander Shishkin wrote:
> On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
> > +static int intel_bm_event_init(struct perf_event *event)
> > +{
>
> ...
>
> > + /*
> > +* Find a hardware counter for the target task
> > +*/
> > + for (i =
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +
> +static int intel_bm_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
> +{
> + struct perf_event *event;
> + union bm_detect_status stat;
> + struct perf_sample_data data;
> + int i;
> + unsigned
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +
> +static int intel_bm_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
> +{
> + struct perf_event *event;
> + union bm_detect_status stat;
> + struct perf_sample_data data;
> + int i;
> + unsigned
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +
> +static void intel_bm_event_update(struct perf_event *event)
> +{
> + union bm_detect_status cur_stat;
> +
> + rdmsrl(BR_DETECT_STATUS_MSR, cur_stat.raw);
> + local64_set(>hw.prev_count, (uint64_t)cur_stat.raw);
>
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +
> +static void intel_bm_event_update(struct perf_event *event)
> +{
> + union bm_detect_status cur_stat;
> +
> + rdmsrl(BR_DETECT_STATUS_MSR, cur_stat.raw);
> + local64_set(>hw.prev_count, (uint64_t)cur_stat.raw);
>
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +static unsigned int bm_threshold = BM_MAX_THRESHOLD;
> +static unsigned int bm_mispred_evt_cnt;
> +
> +/* Branch monitoring counter owners */
> +static struct perf_event *bm_counter_owner[2];
SNIP
> + * Find a hardware
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +static unsigned int bm_threshold = BM_MAX_THRESHOLD;
> +static unsigned int bm_mispred_evt_cnt;
> +
> +/* Branch monitoring counter owners */
> +static struct perf_event *bm_counter_owner[2];
SNIP
> + * Find a hardware
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> + event->hw.bm_ctrl = (bm_window_size << BM_WINDOW_SIZE_SHIFT) |
> + (bm_guest_disable << BM_GUEST_DISABLE_SHIFT) |
> + (bm_lbr_freeze << BM_LBR_FREEZE_SHIFT) |
> +
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> + event->hw.bm_ctrl = (bm_window_size << BM_WINDOW_SIZE_SHIFT) |
> + (bm_guest_disable << BM_GUEST_DISABLE_SHIFT) |
> + (bm_lbr_freeze << BM_LBR_FREEZE_SHIFT) |
> +
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> + event->event_caps |= PERF_EV_CAP_BM;
> + /*
> + * cfg contains one of the 6 possible Branch Monitoring events
> + */
> + cfg = event->attr.config;
> + if (cfg < 0 || cfg > (BM_MAX_EVENTS - 1))
> +
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +
> +static int intel_bm_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
> +{
> + struct perf_event *event;
> + union bm_detect_status stat;
> + struct perf_sample_data data;
> + int i;
> + unsigned
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> + event->event_caps |= PERF_EV_CAP_BM;
> + /*
> + * cfg contains one of the 6 possible Branch Monitoring events
> + */
> + cfg = event->attr.config;
> + if (cfg < 0 || cfg > (BM_MAX_EVENTS - 1))
> +
On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
SNIP
> +
> +static int intel_bm_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
> +{
> + struct perf_event *event;
> + union bm_detect_status stat;
> + struct perf_sample_data data;
> + int i;
> + unsigned
22 matches
Mail list logo
