On Fri, May 23, 2014 at 12:00:09AM +0200, Rickard Strandqvist wrote:
> Cleaning up inconsistent NULL checks.
> There is otherwise a risk of a possible null pointer dereference.
>
> Was largely found by using a static code analysis program called cppcheck.
... and is a false positive.
We can't en
On 22 May 2014 17:55, Andrew Bresticker wrote:
> Program TEGRA_SDHCI_VENDOR_MISC_CTRL so that UHS modes aren't advertised
> in SDHCI_CAPABILITIES_1. While the Tegra SDHCI controller does support
> these modes, they require Tegra-specific tuning and calibration routines
> which the driver does not
On 22 May 2014 17:55, Andrew Bresticker wrote:
> Tegra SDHCI controllers, by default, report a base clock frequency
> of 208Mhz in SDHCI_CAPABILTIES which may or may not be equal to the
> actual base clock frequency. This is because the clock rate is
> configured by the clock controller, which is
On Thu, May 22, 2014 at 11:58:36PM +0200, Rickard Strandqvist wrote:
> Cleaning up inconsistent NULL checks.
> There is otherwise a risk of a possible null pointer dereference.
>
> Was largely found by using a static code analysis program called cppcheck.
>
> Signed-off-by: Rickard Strandqvist
>
David Miller writes:
> From: Eric Dumazet
> Date: Thu, 22 May 2014 14:03:21 -0700
>
>> On Thu, 2014-05-22 at 13:58 -0700, Eric Dumazet wrote:
>>
>>> I would set rx_max (rx_urb_size) to SKB_MAX_HEAD(0) so that you do not
>>> use high order allocations.
>>
>> Correction, that would need SKB_MAX_H
On Thu, May 22, 2014 at 04:11:38PM -0700, Chaitanya wrote:
> Fixed the ERROR thrown off by checkpatch.pl.
>
Put the error message here, or say what it was.
> Signed-off-by: Chaitanya Hazarey
Could you change your email client so it has your last in the From:
header?
This patch doesn't apply.
On Mon, May 19, 2014 at 7:16 PM, Lucas Stach wrote:
> Am Montag, den 19.05.2014, 19:06 +0900 schrieb Alexandre Courbot:
>> On 05/19/2014 06:57 PM, Lucas Stach wrote:
>> > Am Montag, den 19.05.2014, 18:46 +0900 schrieb Alexandre Courbot:
>> >> This patch is not meant to be merged, but rather to try
Hello Lee
On 20/05/2014 09:48, Lee Jones wrote:
> This patch introduces preliminary support for the X-Powers AXP221 PMIC.
> The AXP221 is typically used on boards using Allwinner's A31 SoC.
>
> At the moment, this driver only exposes regulator devices, but other
> subdevices.
>>
Hi Ulf,
I like to get this patches for v3.16, any chance of considering these
patches to v3.16 ?
--srini
On 15/05/14 10:34, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla
Thankyou everyone for reviewing both RFC and v1 patches.
This patch series adds Qualcomm SD Card Cont
On 05/22/2014 09:43 PM, Kees Cook wrote:
This makes sure a format string can never get processed into the worker
thread name from the device name.
Signed-off-by: Kees Cook
---
sound/soc/intel/sst-baytrail-ipc.c |2 +-
sound/soc/intel/sst-haswell-ipc.c |2 +-
2 files changed, 2 inse
Hi all,
After merging the tip tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
In file included from arch/arm/include/asm/outercache.h:24:0,
from arch/arm/include/asm/barrier.h:5,
from arch/arm/include/asm/bitops.h:28,
fr
On Tue, May 20, 2014 at 6:14 AM, Stephen Warren wrote:
> On 05/19/2014 03:24 AM, Alexandre Courbot wrote:
>> Add the device tree binding documentation for the GK20A GPU used in
>> Tegra K1 SoCs.
>
> A few minor nits, but otherwise,
> Acked-by: Stephen Warren
>
>> diff --git a/Documentation/device
Hi Mike,
On Tue, May 13, 2014 at 2:17 AM, Mike Turquette wrote:
> Quoting Geert Uytterhoeven (2014-03-25 04:16:24)
>> From: Geert Uytterhoeven
>>
>> - Limit ruler to 80 characters (was: 81),
>> - Widen rate column by 1 for nicer spacing,
>> - Right-align numbers and their column headers,
>
On Thu, May 22, 2014 at 2:09 AM, Ulf Hansson wrote:
> On 19 May 2014 20:02, Sebastian Hesselbarth
> wrote:
>> DT-enabled Dove moved over from ARCH_DOVE in mach-dove to MACH_DOVE in
>> mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while, add a new
>> DT-only MACH_DOVE Kconfig. This slippe
On Thu, May 22, 2014 at 11:50:00PM +0200, Linus Walleij wrote:
> On Thu, May 15, 2014 at 5:28 PM, Mika Westerberg
> wrote:
>
> > From: Jin Yao
> >
> > Now that the x86 dynamic IRQ allocation problem has been resolved with
> > commmit 62a08ae2a576 (genirq: x86: Ensure that dynamic irq allocation
On Thu, May 22, 2014 at 07:24:23PM +1000, Stephen Rothwell wrote:
> Hi Thierry,
>
> Today's linux-next merge of the pwm tree got a conflict in
> drivers/leds/leds-pwm.c between commit 5f7b03dc2ab5 ("leds: leds-pwm:
> provide a common function to setup a single led-pwm device") from the
> leds tree
Scott,
On Thu, 2014-05-22 at 17:37 -0500, Scott Wood wrote:
> /home/scott/fsl/git/linux/upstream/arch/powerpc/mm/tlb_low_64e.S: Assembler
> messages:
> /home/scott/fsl/git/linux/upstream/arch/powerpc/mm/tlb_low_64e.S:89: Error:
> unrecognized opcode: `tlb_miss_prolog_stats'
> /home/scott/fsl/git
On 22 May 2014 17:18, Peter Griffin wrote:
> This platform driver adds initial support for the SDHCI host controller
> found on STMicroelectronics SoCs.
>
> It has been tested on STiH41x b2020 platforms currently.
>
> Signed-off-by: Peter Griffin
> Signed-off-by: Giuseppe Cavallaro
> ---
> driv
On Fri, May 23, 2014 at 5:34 AM, Alexandre Courbot wrote:
> Looks like the world did not break this time. However I noticed that
> the commit in your tree (and -next) included the changes since v1 in
> its log. Is it intended?
Yeah I copy that into the changelog sometimes. If I need that info
it
On Fri, May 23, 2014 at 02:49:40PM +0900, Alexandre Courbot wrote:
> On Mon, May 19, 2014 at 5:33 PM, Thierry Reding
> wrote:
> > On Mon, May 19, 2014 at 04:10:56PM +0900, Alexandre Courbot wrote:
> >> From: Lucas Stach
> >>
> >> On arches with non-coherent PCI,
> >
> > I guess since this applies
On 23 May 2014 09:16, Olof Johansson wrote:
> On Thu, May 22, 2014 at 2:09 AM, Ulf Hansson wrote:
>> On 19 May 2014 20:02, Sebastian Hesselbarth
>> wrote:
>>> DT-enabled Dove moved over from ARCH_DOVE in mach-dove to MACH_DOVE in
>>> mach-mvebu. As non-DT ARCH_DOVE will stay to rot for a while,
On Mon, Apr 07, 2014 at 01:00:57PM +0200, Jan Moskyto Matejka wrote:
> BP_PROC_SUPPORT was never defined so removing all the #ifdef'd code
> including the bp_proc_create() function.
>
> Signed-off-by: Jan Moskyto Matejka
> ---
> drivers/staging/silicom/bpctl_mod.c | 39
> ---
On 23 May 2014 09:13, Srinivas Kandagatla
wrote:
> Hi Ulf,
> I like to get this patches for v3.16, any chance of considering these
> patches to v3.16 ?
I promise to have them properly reviewed early next week, sorry for
taking so long. Let's see where this leads us.
It seems like you had some C
My mistake. It actually comes not from the mainline but from the altera tree.
Sorry for the noise
2014-05-22 20:48 GMT+02:00 Paul Zimmerman :
>
>> From: Jean-Jacques Hiblot [mailto:jjhib...@traphandler.com]
>> Sent: Thursday, May 22, 2014 5:10 AM
>>
>> The spinlock hsotg->lock is intialized at the
Le 23/05/2014 08:28, Horia Geantă a écrit :
On 5/22/2014 7:03 PM, Nicolas Dichtel wrote:
Le 22/05/2014 17:10, Horia Geanta a écrit :
From: Lei Xu
Currently the sha256 icv truncation length is set to 96bit
while the length is defined as 128bit in RFC4868.
This may result in somer errors when w
On 23/05/14 08:50, Ulf Hansson wrote:
On 23 May 2014 09:13, Srinivas Kandagatla
wrote:
Hi Ulf,
I like to get this patches for v3.16, any chance of considering these
patches to v3.16 ?
I promise to have them properly reviewed early next week, sorry for
taking so long. Let's see where this l
ping ;-)
thanks,
jirka
On Thu, May 15, 2014 at 07:23:21PM +0200, Jiri Olsa wrote:
> hi,
> trying to speedup DWARF unwind report code by factoring
> related code:
> - caching sample's registers access
> - keep dso data file descriptor open for the
> life of the dso object
> - replace dso
Ezequiel & Javier,
On 05/22/2014 05:46 PM, Ezequiel Garcia wrote:
> On 22 May 01:51 PM, Javier Martinez Canillas wrote:
>> On Thu, May 22, 2014 at 10:12 AM, Roger Quadros wrote:
On 21 May 02:20 PM, Roger Quadros wrote:
>
> For DT boot:
> - The GPMC controller node should have a c
On Friday 23 May 2014 15:51:04 Chen-Yu Tsai wrote:
> p->regshift = val;
>
> + data->rst = devm_reset_control_get_optional(p->dev, NULL);
> +
> /* clock got configured through clk api, all done */
> if (p->uartclk)
> return 0;
> @@ -362,6 +366,
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 05/20/2014 05:19 PM, Serge Hallyn wrote:
> Quoting Andy Lutomirski (l...@amacapital.net):
>> On May 15, 2014 1:26 PM, "Serge E. Hallyn" wrote:
>>>
>>> Quoting Richard Weinberger (rich...@nod.at):
Am 15.05.2014 21:50, schrieb Serge Hallyn:
>>>
Hi Dongsu,
On Thursday, May 22, 2014 2:52:27 AM PDT, Dongsu Park wrote:
First of all, thank you for trying to merge it to mainline.
Maybe I cannot say the code is clean enough, but basically
the filesystem seems to work at least.
Thank you for confirming that. We test Tux3 extensively so we kn
The advantage of kcalloc is, that will prevent integer overflows which could
result from the multiplication of number of elements and size and it is also
a bit nicer to read.
Signed-off-by: Djordje Zekovic
---
drivers/staging/usbip/stub_tx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On 08/05/14 23:16, Marek Belisko wrote:
> This patch add support for lcd display on gta04 board. Display control
> is connected to spi (used spi bitbang driver).
>
> Signed-off-by: Marek Belisko
> ---
> arch/arm/boot/dts/omap3-gta04.dts | 87
> +++
> 1 file c
The A23 has an almost identical PRCM clock tree. The difference in
the APB0 clock is the smallest divisor is 1, instead of 2.
This patch extends the sun6i-a31-apb0-clk driver to take divider
tables associated to compatibles, and adds a compatible for the A23
variant.
Signed-off-by: Chen-Yu Tsai
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a
N multiplier factor that starts from 1, not 0.
This patch adds an option to the clock driver's config data structures
to define the difference.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/sunxi/clk-factors.c | 5 -
drivers/c
The A23 uses the same pin controller as previous SoC's from Allwinner.
Add support for the pins controlled by the main PIO controller.
Signed-off-by: Chen-Yu Tsai
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 2 +
drivers/pinctrl/sunxi/Kconfig | 4 +
drivers/p
The clock control unit on the A23 is similar to the one found on the A31.
The AHB1, APB1, APB2 gates on the A23 are almost identical to the ones
on the A31, but some outputs are missing.
The main CPU PLL (PLL1) however is like that on older Allwinner SoCs, such
as the A10 or A20, but the N factor
Hi everyone,
This patch series introduces basic kernel support for Allwinner's A23
SoC, which we will call the sun8i platform. This includes basic clocks,
timers, interrupts, pinctrl, and UARTs.
The series can also be found here:
https://github.com/wens/linux/tree/sunxi-a23
The A23 is a mi
PLL6 is used by some important but undocumented module, most likely
memory related, such as mbus or the actual memory controller. As we
do not have a driver for that, add pll6 to the list of protected
clocks, so that it won't be disabled and leave us with a non-responsive
system.
Signed-off-by: Ch
The Allwinner A23 SoC has a PRCM unit like the previous A31 SoC.
The differences are the AR100 clock can no longer be modified,
and the APB0 clock has different divisors.
This patch adds a compatible with a modified subdevice list for
the A23.
Signed-off-by: Chen-Yu Tsai
---
.../devicetree/bind
The new important clock protect code requires the clocks be
registered with clkdev. This was missing for sunxi_gates
type clocks.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/sunxi/clk-sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/cl
The N factor for PLL6 counts from 1 to 32, as specified in the A23
manual, and shown in Allwinner's original code.
This patch fixes the N factor in the clock driver, as well as the
comment describing it.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/sunxi/clk-sunxi.c | 5 +++--
1 file changed, 3
The A23 has a R_PIO pin controller, similar to the one found on the A31 SoC.
Add support for the pins controlled by the R_PIO controller.
Signed-off-by: Chen-Yu Tsai
---
drivers/pinctrl/sunxi/Kconfig | 4 +
drivers/pinctrl/sunxi/Makefile | 1 +
drivers/pinctrl/sunx
Hi Prabhakar,
Thanks for this patch series, it looks good to me and I'll make a pull
request for this.
I did find a few issues, but they are all pre-existing problems, so they
can be fixed in follow-up patches.
I'll comment on those in the relevant patches. Since display and capture are
so simil
On Fri, May 23, 2014 at 12:17 PM, Djordje Zekovic wrote:
> The advantage of kcalloc is, that will prevent integer overflows which could
> result from the multiplication of number of elements and size and it is also
> a bit nicer to read.
>
> Signed-off-by: Djordje Zekovic
> ---
> drivers/staging
> as seen in linux-next something is screwed up on the immutable
> branch for STMPE cleanups, can you pull this instead, it is
> the known tested good version with no compilation regressions.
>
> I have no hurry to get this into the GPIO tree anymore, I will push
> additionall changes to the next
Currently sunxi_divs_clk_setup assumes the number of child clocks
to be the same as the number of clock-output-names, and a maximum
of SUNXI_DIVS_MAX_QTY child clocks.
On sun6i, PLL6 only has 1 child clock, but the parent would be used
as well, thereby also having it's own clock-output-names entry
On the A31 and A23, the PLL6 input to the AHB1 clock has a 2 bit wide
pre-divider. This was verified from the A23 user manual and A31/A23 SDK
sources.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/clock/sunxi.txt | 2 ++
drivers/clk/sunxi/clk-sunxi.c | 7 +
Some clock modules on the A31 use PLL6x2 as one of their inputs.
This patch changes the PLL6 implementation for A31 to a divs clock,
i.e. clock with multiple outputs that have different dividers.
This behavior is consistent with previous SoC's by Allwinner.
Signed-off-by: Chen-Yu Tsai
---
drive
The Allwinner A23 is a dual-core Cortex-A7-based SoC. It re-uses most of
the IPs found in previous SoCs, notably the A31.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/Kconfig | 8
arch/arm/mach-sunxi/sunxi.c | 12
2 files changed, 20 insertions(+)
diff --git a/arch
Signed-off-by: Geert Uytterhoeven
---
Documentation/devicetree/bindings/dma/dma.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/dma.txt
b/Documentation/devicetree/bindings/dma/dma.txt
index 8f504e6bae14..82104271e754 100644
--- a/
The Ippo-q8h is a tablet circiut board commonly found in cheap Android
tablets with A23 SoCs. There are at least 2 versions of the board, with
different peripherals, such as WiFi chips.
This patch add supports for v5 of such boards, which has a ESP8089 WiFi
chip (not supported) connected to mmc1.
On the A31, the PLL6 input to the AHB1 clock has a 2 bit wide
pre-divider. This was verified from the A23 user manual and
A31/A23 SDK sources.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/b
On 05/23/2014 04:48 AM, Shawn Guo wrote:
> On 23 May 2014 07:49, Kevin Hilman wrote:
>> On Fri, May 16, 2014 at 2:47 AM, Vlastimil Babka wrote:
>>> Compaction uses compact_checklock_irqsave() function to periodically check
>>> for
>>> lock contention and need_resched() to either abort async comp
On Thu, May 22, 2014 at 02:12:07PM -0700, Guenter Roeck wrote:
> On Thu, May 22, 2014 at 10:34:44PM +0200, Maxime Ripard wrote:
> > On Mon, May 19, 2014 at 05:04:22PM +0200, Maxime Ripard wrote:
> > > On Thu, May 15, 2014 at 11:11:23AM +0200, Maxime Ripard wrote:
> > > > On Wed, May 07, 2014 at 02:
On 05/16/2014 03:33 PM, Lad, Prabhakar wrote:
> From: "Lad, Prabhakar"
>
> this patch adds support to release the buffer by calling
> vb2_buffer_done(), with state marked as VB2_BUF_STATE_QUEUED
> if start_streaming() call back fails.
>
> Signed-off-by: Lad, Prabhakar
> ---
> drivers/media/pla
With sunxi_gates clocks registered with clkdev, we can use the
protected clocks list to enable the "ahb_sdram" clock, instead
of looking for it and adding CLK_IGNORE_UNUSED inline in the
clock setup code.
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/sunxi/clk-sunxi.c | 10 --
1 file chang
The Allwinner A23 is a tablet oriented SoC with 2 Cortex-A7 cores
and a Mali-400MP2 GPU.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a23.dtsi | 524 +++
1 file changed, 524 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-a23.dtsi
diff --
sun6i-a31-apb0-gates supports using clock-indices for holes between
individual gates. However, the driver passes the number of gates
registered in clk_data->clk_num, which of_clk_src_onecell_get uses
to recognize the range of valid indices a consumer can use.
This patch makes the driver pass the m
The Allwinner A31 and A23 SoCs have a reset controller
maintaining the UART in reset by default.
This patch adds optional reset support to the driver.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt | 1 +
drivers/tty/serial/8250/8250_dw.c
PLL6 on sun6i has multiple outputs, just like the other sunxi platforms.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a3
The A23 is a dual Cortex-A7. Add the logic to use the IPs used to
control the CPU configuration and the CPU power so that we can
bring up secondary CPUs at boot.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/platsmp.c | 69 +++
1 file changed, 69 ins
sun6i/sun8i have a UART in the RTC block group, which can be used
as an early console. This is most useful on sun8i as UART0 is muxed
with MMC0, which is not available if we boot from MMC.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
d
(2014/05/23 13:59), Jon Maxwell wrote:
...
> Makita-san,
>
> I recoded this using your idea and ran it through a reproducer.
> It work fine. After some more consideration I agree that
> setting fdb->dst = source is only required when source != fdb->dst.
>
> Thanks for your suggestions. This is t
On Fri, May 23, 2014 at 07:28:44AM +0100, Stephen Rothwell wrote:
> diff --cc arch/arm64/include/asm/thread_info.h
> index 9c086c63f911,7b8e3a2a00fb..
> --- a/arch/arm64/include/asm/thread_info.h
> +++ b/arch/arm64/include/asm/thread_info.h
> @@@ -103,12 -99,7 +102,11 @@@ static inline
On 23/05/2014 at 09:19:41 +0200, Thierry Reding wrote :
> On Thu, May 22, 2014 at 07:24:23PM +1000, Stephen Rothwell wrote:
> > Hi Thierry,
> >
> > Today's linux-next merge of the pwm tree got a conflict in
> > drivers/leds/leds-pwm.c between commit 5f7b03dc2ab5 ("leds: leds-pwm:
> > provide a com
On 05/23/2014 07:32 AM, Stephen Rothwell wrote:
After merging the mmc tree, today's linux-next build (arm multi_v7_defconfig)
failed like this:
drivers/mmc/host/sdhci-dove.c: In function 'sdhci_dove_carddetect_irq':
drivers/mmc/host/sdhci-dove.c:42:24: error: 'struct sdhci_host' has no member
n
On 05/16/2014 03:33 PM, Lad, Prabhakar wrote:
> From: "Lad, Prabhakar"
>
> this patch uses SIMPLE_DEV_PM_OPS, and drops unneeded members
> from io_usrs, usrs and makes use of vb2 helepers instead.
>
> Signed-off-by: Lad, Prabhakar
> ---
> drivers/media/platform/davinci/vpif_display.c | 64
>
On Thu, May 22, 2014 at 04:05:33PM -0700, Kees Cook wrote:
> Normally, task_struct.seccomp.filter is only ever read or modified by
> the task that owns it (current). This property aids in fast access
> during system call filtering as read access is lockless.
>
> Updating the pointer from another t
> > drivers/mfd/stmpe.c: In function 'stmpe_irq_init':
> > drivers/mfd/stmpe.c:1000:15: error: 'struct stmpe' has no member named
> > 'irq_base'
> >base = stmpe->irq_base;
> >^
> >
> > Caused by commit 3ba1d516d5fe ("mfd: stmpe: root out static GPIO and
> > IRQ assignments").
>
From: Eric Dumazet
> On Thu, 2014-05-22 at 20:07 +0100, Jim Baxter wrote:
>
> >
> > I have been investigating a network issue with bursts of network traffic
> > over USB CDC-NCM, the issue is that the kernel is dropping packets
> > because sk_rcvqueues_full() returns true due to skb2->truesize is
As of commit 0dc8153cfebac68c9523b8852b14f10b31209f08 ("tile: Use generic
idle loop"), this applies to arch_cpu_idle() instead of cpu_idle().
Signed-off-by: Geert Uytterhoeven
Cc: Chris Metcalf
---
arch/tile/include/asm/thread_info.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
As of commit 799fef06123f86ff69cf754f996219e6ad1678f8 ("powerpc: Use
generic idle loop"), this applies to arch_cpu_idle() instead of cpu_idle().
Signed-off-by: Geert Uytterhoeven
Cc: Benjamin Herrenschmidt
Cc: linuxppc-...@lists.ozlabs.org
---
arch/powerpc/kernel/irq.c | 2 +-
1 file changed, 1
Hi Thomas,
After all architectures were converted to the generic idle framework,
commit d190e8195b90bc1e65c494fe08e54e9e581bfd16 ("idle: Remove
GENERIC_IDLE_LOOP config switch") removed the last caller of cpu_idle().
This series removes the remaining references to the no-longer existing
c
After all architectures were converted to the generic idle framework,
commit d190e8195b90bc1e65c494fe08e54e9e581bfd16 ("idle: Remove
GENERIC_IDLE_LOOP config switch") removed the last caller of cpu_idle().
The forward declarations in header files were forgotten.
Signed-off-by: Geert Uytterhoeven
As of commit 8dc7c5ecd8d0f739728d844ee794c4fae169f9c2 ("cris: Use generic
idle loop"), cris no longer provides cpu_idle().
- On cris-v10, etrax_gpio_wake_up_check() is called from
default_idle() instead of cpu_idle(),
- On cris-v32, etrax_gpio_wake_up_check() is not called from
default
On Fri, May 23, 2014 at 10:32 AM, Lee Jones wrote:
> Nope, this branch is broken too. I don't think this is a merge error,
> I think it's programmer error (even the greats make mistakes =:-) ).
Yeah you're right :-( :-(
Sorry for the mess.
> In the mean time, it might be worth you looking at
> But although the problem is the same, I believe the driver in question
> isn't the one I have been looking at recently. The posted code snippet
> was from the NCM gadget driver (drivers/usb/gadget/f_ncm.c), isn't that
> right Jim?
Yes this is the NCM Gadget driver.
>
> Yes, judging by this dis
Below is the list of build error/warning regressions/improvements in
v3.15-rc6[1] compared to v3.14[2].
Summarized:
- build errors: +5/-2
- build warnings: +109/-112
JFYI, when comparing v3.15-rc6[1] to v3.15-rc5[3], the summaries are:
- build errors: +1/-3
- build warnings: +31/-37
As
Array of struct of_device_id may be be const as expected by
of_match_table field.
Signed-off-by: Krzysztof Kozlowski
Cc: Graeme Gregory
---
drivers/extcon/extcon-palmas.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-palmas.c b/drivers/extcon/extcon-p
On Fri, 23 May 2014, Geert Uytterhoeven wrote:
> JFYI, when comparing v3.15-rc6[1] to v3.15-rc5[3], the summaries are:
> - build errors: +1/-3
+ error: initramfs.c: undefined reference to `__stack_chk_guard': =>
.init.text+0x1528)
x86_64-randconfig
> [1] http://kisskb.ellerman.id.au/kissk
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> Most of the Qcomm SD card controller registers must be updated to the MCLK
> domain so subsequent writes to registers will be ignored until 3 clock cycles
> have passed.
>
> This patch adds a 3 clock cycle delay required a
On Thu, May 15, 2014 at 11:36 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds wrappers for readl/writel functions used in the driver. The
> reason for this wrappers is to accommodate SOCs like Qualcomm which has
> requirement for delaying the write for few cycles when writing to its
Array of struct of_device_id may be be const as expected by
of_match_table field and of_find_matching_node_and_match() function.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/samsung/clk-exynos4.c| 2 +-
drivers/clk/samsung/clk-exynos5250.c | 2 +-
drivers/clk/samsung/clk-exynos5420.c |
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds ddrmode mask to variant structure giving more flexibility
> to the driver to support more SOCs which have different datactrl register
> layout.
>
> Without this patch datactrl register is updated with wrong
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds 8bit bus enable to variant structure giving more flexibility
> to the driver to support more SOCs which have different clock register layout.
>
> Without this patch other new SOCs like Qcom will have to add
On 05/16/2014 03:33 PM, Lad, Prabhakar wrote:
> From: "Lad, Prabhakar"
>
> Hi,
>
> This patch series upgrades the vpif capture & display
> driver with the all the helpers provided by v4l, this makes
> the driver much simpler and cleaner. This also includes few
> checkpatch issues.
>
> Changes f
Hi Nicholas,
Today's linux-next merge of the target-updates tree got a conflict in
drivers/scsi/virtio_scsi.c between commit b54197c43db8 ("virtio_scsi:
use cmd_size") from the scsi tree and commit 4baaa7d589e2
("virtio-scsi: Enable DIF/DIX modes in SCSI host LLD") from the
target-updates tree.
I
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds edge support for data and command out to variant structure
> giving more flexibility to the driver to support more SOCs which have
> different clock register layout.
>
> Without this patch other new SOCs li
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds specifics of clk and datactrl register on Qualcomm SD
> Card controller. This patch also populates the Qcom variant data with
> these new values specific to Qualcomm SD Card Controller.
>
> Signed-off-by: S
On Wed, 2014-05-14 at 11:28 +0200, Arnd Bergmann wrote:
> On Wednesday 14 May 2014 11:25:50 Paul Bolle wrote:
> > On Wed, 2014-05-14 at 11:17 +0200, Arnd Bergmann wrote:
> > > 'git grep -i arm710' tells me that there is also some arm710
> > > specific code in arch/arm/mm/proc-arm720.S that we may
Hi,
Here is version 4 of platform support for AXM5516 SoC.
The clk driver is now applied to clk-next. The rest should be ready for
arm-soc. Haven't got any response from the power/reset maintainers... I hope
this driver can be taken via arm-soc as well.
Changes:
v4:
* Updated DTS according
From: Anders Berg
Add Axxia (AXM55xx) SoC system reset driver. This driver handles only system
reboot (and not power-off).
Signed-off-by: Anders Berg
Cc: Dmitry Eremin-Solenikov
Cc: David Woodhouse
Acked-by: Linus Walleij
---
.../bindings/power_supply/axxia-reset.txt | 20 +
dr
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> On some SOCs like Qcom there are explicit bits in the command register
> to specify if its a data transfer command or not. So this patch adds
> support to such bits in variant data, giving more flexibility to the
> driver.
Thanks Linus W.
On 23/05/14 10:09, Linus Walleij wrote:
On Thu, May 15, 2014 at 11:37 AM, wrote:
From: Srinivas Kandagatla
On some SOCs like Qcom there are explicit bits in the command register
to specify if its a data transfer command or not. So this patch adds
support to such bits in var
On Fri, May 23, 2014 at 09:32:19AM +0800, Chen Yucong wrote:
> ...if we reach a timeout, there is very little
> chance for recovering. Thought. the probability for this situation to
> happen is very slight, it's not impossible. Indeed, it's hard to know
> the precise causes for timeout.
Ok, enough
From: Anders Berg
Add a defconfig file for the LSI Axxia family of devices (CONFIG_ARCH_AXXIA).
Signed-off-by: Anders Berg
Acked-by: Linus Walleij
---
arch/arm/configs/axm55xx_defconfig | 248 +
1 file changed, 248 insertions(+)
create mode 100644 arch/arm
From: Anders Berg
Add the reset controller to the AXM5xx device tree.
Signed-off-by: Anders Berg
Acked-by: Linus Walleij
---
arch/arm/boot/dts/axm55xx.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
index 3fbd83c..e
On Thu, May 15, 2014 at 11:37 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds support to fbclk that is used to latch data and
> cmd on some controllers like SD Card controller in Qcom SOC.
>
> Signed-off-by: Srinivas Kandagatla
(...)
Isn't this overkill?
@@ -189,6 +192,7 @@ stati
From: Anders Berg
Add device tree for the Amarillo validation board with an AXM5516 SoC.
Signed-off-by: Anders Berg
Acked-by: Linus Walleij
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/axm5516-amarillo.dts | 51 +
arch/arm/boot/dts/axm5516-cpus.dtsi| 204
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