From: Jiri Olsa
Adding c2c report subcommand. It reads the perf.data and displays shared
data analysis.
This patch adds report basic wirings. It gets fully implemented in
following patches.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Ki
(2016-10-19 15:22:26 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-c2c-for-mingo-20161020
for you to fetch changes up to 535bbde62701b2bb298063e9dfa007e8a1ff95d1:
perf c2c report: Add --show-all option (2016-10-1
From: Jiri Olsa
The width of symbol and source line entries could get really long
and not convenient to display. Adding support to display only
patrt of such strings and possibility to switch to full length
by uing --full-symbols option or 's' key in TUI browser.
Signed-off-by: Jiri Olsa
Cc: An
From: Jiri Olsa
Adding 5 hitm related dimension key wrappers.
First 3 are to be displayed in the main cachelines overall output:
tot_hitm, lcl_hitm, rmt_hitm
The latter 2 are to be displayed within single cacheline output:
cl_rmt_hitm, cl_lcl_hitm
They all display bare numbers of remote/
From: Jiri Olsa
It is to be displayed in the main cachelines overall output:
percent_hitm
It displays HITMs percentage for cacheline.
It counts remote HITMs at the moment, but it is changed later to support
local as well, based on the sort configuration.
Signed-off-by: Jiri Olsa
Cc: Andi K
From: Jiri Olsa
Allow to setup number of header lines for c2c hists objects.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/n/tip-4ilsf0ulubrd4y96g7tnp...@git.kernel.org
Signed-off-by: A
From: Jiri Olsa
Add a limit for entries number of the cachelines table entries. By
default now it's the 0.0005% minimum of remote HITMs.
Also display only cachelines with remote hitm or store data.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Nam
From: Jiri Olsa
It is to be displayed in the single cacheline output:
pid
We currently don't have a single 'pid' sort/display entry, which would
output just pid number, hence adding it into c2c code.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc
From: Jiri Olsa
Introducing c2c_add_stats function helper to cumulate c2c_stats.
Original-patch-by: Dick Fowles
Original-patch-by: Don Zickus
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kerne
Am 20.10.2016 um 16:55 schrieb Jani Nikula :
>> So, I really prefer not removing math support.
>
> I wonder if we could cook up a nice way to make the math:: usage
> conditional on actually being able to render it.
>
> I would rather have the math:: directive produce just the preformatted
> inde
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
wrote:
> From: Andre Przywara
>
> The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
> and the typical tablet / TV box peripherals.
> The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
> the peripherals and the mem
From: Jiri Olsa
It is to be displayed in the single cacheline output:
tid
It's a wrapper for global sort_thread sort entry with c2c specific
header.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lk
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
wrote:
> Allow the CCU drivers to specify a multiplier for their clocks.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/clk/sunxi-ng/ccu_mult.c | 2 +-
> drivers/clk/sunxi-ng/ccu_mult.h | 13 +
> drivers/clk/sunxi-ng/ccu_nk.c | 8
From: Jiri Olsa
It is to be displayed in the single cacheline output:
median, mean_rmt, mean_lcl, mean_load, stddev
It displays statistics hits related to cacheline accesses.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter
From: Jiri Olsa
Fallback to standard dimensions in case we don't find the dimension
within c2c ones.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1474558645-19956-16-git-send-email-
From: Jiri Olsa
Adding c2c record subcommand. It setups options related to HITM
cacheline analysis and calls standard perf record command.
$ sudo perf c2c record -v -- -a
calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e
cpu/mem-stores/P -a
...
It produces perf.data, whic
From: Jiri Olsa
Adding bare bones of dimension support for c2c report.
Main interface functions are:
c2c_hists__init
c2c_hists__reinit
which re/initialize 'struct c2c_hists' object with sort/display entries
string, in a similar way that setup_sorting function does.
We overload the dimensi
From: Jiri Olsa
Adding basic sample processing specific hist_entry allocation callbacks
(via hists__add_entry_ops).
Overloading 'struct hist_entry' object with new 'struct c2c_hist_entry'.
The new hist entry object will carry specific stats and nested hists
objects.
Signed-off-by: Jiri Olsa
Cc
From: Jiri Olsa
Decoding and storing c2c_stats for each hist entry. Changing related
function to work with c2c_* objects.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1474558645-19
From: Jiri Olsa
Adding helping macros to define header objects. It will be used in
following patches, that add new dimensions.
The c2c report will support 2 line headers, hence we only define
line[0/1] in macros.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Jo
From: Jiri Olsa
Add 2 LLC load related dimension key wrappers.
They are to be displayed in the main cachelines overall output:
ld_lclhit, ld_rmthit
They display bare numbers of LLC and remote loads for cacheline.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc:
From: Jiri Olsa
It is to be displayed in the single cacheline output:
cl_srcline
It displays source line related to the code address that accessed
cacheline. It's a wrapper to global srcline sort entry.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
From: Jiri Olsa
It is to be displayed in the main cachelines overall output:
tot_loads
It displays sum of all load accesses for cacheline.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.
On Thu, Oct 20, 2016 at 09:32:40AM +0200, Daniel Lezcano wrote:
> On Wed, Oct 19, 2016 at 09:22:25PM -0400, Rich Felker wrote:
> > On Mon, Oct 17, 2016 at 11:30:13AM +0200, Daniel Lezcano wrote:
> > > On Thu, Oct 13, 2016 at 09:51:06PM +, Rich Felker wrote:
> > > > This version of the patch mak
On Thu, Oct 20, 2016 at 03:57:52PM +0100, Lorenzo Pieralisi wrote:
> On Thu, Oct 20, 2016 at 03:31:01PM +0100, Mark Rutland wrote:
> > Hi,
> >
> > On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu@linaro.org wrote:
> > > From: Fu Wei
> >
> > > This patchset depends on the following patchset:
> >
From: Jiri Olsa
It displays cacheline offset as hex number.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/n/tip-m0424ye98lqveg5nopto8...@git.kernel.org
Signed-off-by: Arnaldo Carvalho d
From: Jiri Olsa
Adding c2c command base wirings. Its implementation is going to be added
gradually in following patches.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
http://lkml.kernel.org/r/1474558645-1995
From: Jiri Olsa
It is to be displayed in the single cacheline output:
cpucnt
It displays number of distinct cpus that hit cacheline.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/n/
From: Jiri Olsa
Store cacheline related entries in nested hist object for each cacheline
data. Nested entries are sorted by 'offset' within related cacheline.
We will allow specific sort keys to be configured for nested cacheline
data entries in following patches.
Signed-off-by: Jiri Olsa
Cc:
From: Jiri Olsa
Add 5 stores related dimension key wrappers.
First 3 are to be displayed in the main cachelines overall output:
stores, stores_l1hit, stores_l1miss
The latter 2 are to be displayed within single cacheline output:
cl_stores_l1hit, cl_stores_l1miss
They all display bare num
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
wrote:
> From: Andre Przywara
>
> The Pine64 is a cost-efficient development board based on the
> Allwinner A64 SoC.
> There are three models: the basic version with Fast Ethernet and
> 512 MB of DRAM (Pine64) and two Pine64+ versions, which both
>
From: Jiri Olsa
It displays cacheline address as hex number.
Using c2c wrapper to standard 'dcacheline' object to defined own header
and simple (just address) cacheline output.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe Mario
Cc: Namhyung Kim
Cc: Peter
From: Jiri Olsa
It displays the code address (as hex number) responsible for the
accesses.
Using c2c wrapper to standard 'symbol_iaddr' object to define own header
and simple (just address) code address output.
Signed-off-by: Jiri Olsa
Cc: Andi Kleen
Cc: David Ahern
Cc: Don Zickus
Cc: Joe M
From: Robert Jarzmik
Date: Wed, 19 Oct 2016 23:23:50 +0200
> The patch isolating the u16 writes for pxa assumed all machine_is_*()
> calls were removed, and therefore removed the mach-types.h include which
> provided them.
>
> Unfortunately 2 machine_is_*() remained in smc91x.c file including
>
On Thu, Oct 20, 2016 at 07:36:22PM +0530, Imran Khan wrote:
> The SoC info driver provides information such as Chip ID,
> Chip family, serial number and other such details about
> Qualcomm SoCs.
>
> Signed-off-by: Imran Khan
> ---
> .../devicetree/bindings/soc/qcom/qcom,socinfo.txt | 18 +
>
On Thu, Oct 20, 2016 at 5:29 AM, Matt Fleming wrote:
> On Wed, 19 Oct, at 09:04:29PM, Dan Williams wrote:
>> Hi,
>>
>> I am currently unable to boot a Yoga 900 with latest mainline, but 4.8 boots.
>>
>> The symptom is a reboot before the video console is available.
>>
>> I bisected to commit 816e7
On Thu, 20 Oct 2016, Dmitry Safonov wrote:
> 2016-10-19 20:33 GMT+03:00 Mikulas Patocka :
> >
> >
> > On Wed, 19 Oct 2016, Mikulas Patocka wrote:
> >
> >> Hi
> >>
> >> In the kernel 4.9-rc1, the x32 support is seriously broken, a x32 process
> >> is killed with SIGKILL after returning from any s
Hi Olof, Arnd and Kevin,
Please consider this first round of multi_v7_defconfig updates for v4.10 :
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/li
Hi Linus,
I have recently started testing a omap-lcdk board which uses the
davinci gpio driver,
and im running into an issue when i try to request a gpio larger than 31, which
i think might be a regression of gpiolib-of.
The davinci gpio driver, creates several chips, and relies in a single DT no
On 10/20/2016 04:53 PM, Peter Rosin wrote:
[...]
> Good idea! Then the "envelope-detector,inverted" bool can go, and be
> implied by the compatible string. If some way to rebind the irq trigger
> is later discovered that can be added as a channel attr without
> deprecating any dt bindings stuff. Wh
On Thu, Sep 29, 2016 at 02:17:11AM +0800, fu@linaro.org wrote:
> static void arch_timer_banner(unsigned type)
> {
> - pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz
> (%s%s%s).\n",
> - type & ARCH_CP15_TIMER ? "cp15" : "",
> - type == (ARCH
On 18/10/2016 at 13:58:44 +0200, Nicolas Ferre wrote :
> Le 18/10/2016 à 13:05, Peter Rosin a écrit :
> > Signed-off-by: Peter Rosin
>
> Acked-by: Nicolas Ferre
>
> We may take it in a future at91-x.y-dt branch which will go through arm-soc.
>
> Thanks
>
> > ---
> > Documentation/devicetree/
On Thu, Oct 20, 2016 at 12:50:05PM -0200, Gustavo Padovan wrote:
> From: Gustavo Padovan
>
> Support DRM out-fences by creating a sync_file with a fence for each CRTC
> that sets the OUT_FENCE_PTR property.
I still maintain the out fence should also be per fb (well, per plane
since we can't add
On 20.10.2016 12:08, Mika Westerberg wrote:
> +LinusW
>
> On Wed, Oct 19, 2016 at 08:40:25PM +, Christian Steiner wrote:
>> On 19.10.2016 21:22, Mika Westerberg wrote:
>>> On Wed, Oct 19, 2016 at 06:32:57PM +, Christian Steiner wrote:
Hello,
since Kernel 4.8 I see a lot of t
From: Steve Twiss
Add junction temperature monitoring supervisor device driver, compatible
with the DA9062 and DA9061 PMICs.
If the PMIC's internal junction temperature rises above TEMP_WARN (125
degC) an interrupt is issued. This TEMP_WARN level is defined as the
THERMAL_TRIP_HOT trip-wire insi
Hi Sebastian,
Thanks for the report.
We've encountered this as well, and trying to find the correct way of
solving it.
On 19/10/2016 5:35 PM, Sebastian Ott wrote:
Hi,
After a userspace update (fedora 23->24) I reproducibly run into the
following oops during shutdown (on s390):
[ 71.054832
On 20.10.2016 15:38, zhouxianr...@huawei.com wrote:
> From: z00281421
>
> The bdi flusher should be throttled only depends on
> own bdi and is decoupled with others.
>
> separate PGDAT_WRITEBACK into PGDAT_ANON_WRITEBACK and
> PGDAT_FILE_WRITEBACK avoid scanning anon lru and it is ok
> then th
On Thu, 20 Oct 2016 15:49:06 +0200
Maxime Ripard wrote:
> The allwinner,pull property set to NO_PULL was really considered our
> default (and wasn't even changing the default value in the code).
>
> Remove these properties to make it obvious that we do not set anything in
> such a case.
>
> Sig
On 19/10/2016 at 21:02:04 +0300, ville.syrj...@linux.intel.com wrote :
> From: Ville Syrjälä
>
> Using spin_lock_irq()/spin_unlock_irq() from within the interrupt
> handler is a no-no. Let's save/restore the flags to avoid turning on
> interrupts prematurely.
>
> We hit this in a bunch of our CI
Hi Milo,
On Wed, Oct 19, 2016 at 10:46:08PM +0900, Milo Kim wrote:
> H3 supports two SPI controllers. Four pins (MOSI, MISO, SCLK, SS) are
> configured through the pinctrl subsystem. It is almost same as A31 SPI
> except buffer size, so those DT properties are reusable.
>
> Cc: Maxime Ripard
> C
Hi Stephen
On 10/19/2016 10:32 PM, Stephen Boyd wrote:
On 10/14, gabriel.fernan...@st.com wrote:
@@ -532,10 +618,42 @@ static struct clk_hw *stm32_register_cclk(struct device
*dev, const char *name,
{ 0 },
};
+struct stm32f4_clk_data {
+ const struct stm32f4_gate_data *gat
On Wed, Oct 19, 2016 at 11:02:32PM +0900, Milo Kim wrote:
> H3 SPI has same architecture as A31 except FIFO capacity.
> To configure the buffer size separately, compatible property should be
> different. Optional DMA specifiers and example are added.
>
> Cc: Mark Brown
> Cc: Rob Herring
> Cc: Ma
On Wed, Oct 19, 2016 at 09:18:14PM -0400, Brian Masney wrote:
> On Thu, Oct 20, 2016 at 08:58:53AM +0800, Ike Panhc wrote:
> > On 10/12/2016 04:17 PM, Darren Hart wrote:
> > > On Tue, Oct 11, 2016 at 07:28:02PM -0400, Brian Masney wrote:
> > >> The Lenovo Yoga 910-13IKB does not have a hw rfkill sw
- Original Message -
> From: "Mike Kravetz"
> To: linux...@kvack.org, linux-kernel@vger.kernel.org
> Cc: "Aneesh Kumar K . V" , "Naoya Horiguchi"
> , "Michal
> Hocko" , "Kirill A . Shutemov"
> , "Hillf Danton"
> , "Dave Hansen" , "Jan
> Stancek" , "Mike
> Kravetz"
> Sent: Thursday,
On Thu, Oct 20, 2016 at 04:06:02PM +0200, Richard Cochran wrote:
> On Wed, Oct 19, 2016 at 07:42:52PM -0400, Nicolas Pitre wrote:
> > +static inline void ptp_clock_event(struct ptp_clock *ptp,
> > + struct ptp_clock_event *event)
> > +{ (void)event; }
>
> Just out of c
On Thu, Oct 20, 2016 at 03:52:04PM +0100, Edward Cree wrote:
> On 20/10/16 00:42, Nicolas Pitre wrote:
> > diff --git a/Documentation/kbuild/kconfig-language.txt
> > b/Documentation/kbuild/kconfig-language.txt
> > index 069fcb3eef..c96127f648 100644
> > --- a/Documentation/kbuild/kconfig-language.
Hi,
On Wed, Oct 19, 2016 at 11:02:33PM +0900, Milo Kim wrote:
> H3 has two SPI controllers. The size of the buffer is 64 * 8.
> (8 bit transfer by 64 entry FIFO)
> A31 has four controllers. The size of the buffer is 128 * 8.
> (8 bit transfer by 128 entry FIFO)
>
> Register maps are sharable, so
On Tue, Oct 11, 2016 at 10:28 PM, Maxime Ripard
wrote:
> Add the A64 CCU clocks set.
>
> Acked-by: Rob Herring
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 1 +-
> drivers/clk/sunxi-ng/Kconfig | 11 +-
> drivers/clk/s
On Tue, Aug 30, 2016 at 11:23:36AM -0700, Linus Torvalds wrote:
> On Tue, Aug 30, 2016 at 4:48 AM, Jeff Layton wrote:
> >
> > While this would be good to get in, I don't see any particular urgency
> > here. This seems like it'd be reasonable for v4.9.
>
> Agreed, looks ok to me. It certainly does
Add Synopsys Designware MAC Glue layer for the Oxford Semiconductor OX820.
Signed-off-by: Neil Armstrong
---
.../devicetree/bindings/net/oxnas-dwmac.txt| 44 ++
drivers/net/ethernet/stmicro/stmmac/Kconfig| 11 ++
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
d
On Wed, Oct 19, 2016 at 10:02 PM, Milo Kim wrote:
> H3 has two SPI controllers. The size of the buffer is 64 * 8.
> (8 bit transfer by 64 entry FIFO)
> A31 has four controllers. The size of the buffer is 128 * 8.
> (8 bit transfer by 128 entry FIFO)
>
> Register maps are sharable, so sun6i SPI dri
2016-10-20 Ville Syrjälä :
> On Thu, Oct 20, 2016 at 12:50:05PM -0200, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > Support DRM out-fences by creating a sync_file with a fence for each CRTC
> > that sets the OUT_FENCE_PTR property.
>
> I still maintain the out fence should also be p
On Wed, Oct 19, 2016 at 11:02:34PM +0900, Milo Kim wrote:
> The argument can be removed because the driver private data has it.
>
> Cc: Mark Brown
> Cc: Maxime Ripard
> Cc: Chen-Yu Tsai
> Signed-off-by: Milo Kim
> ---
> drivers/spi/spi-sun6i.c | 10 ++
> 1 file changed, 6 insertions(+
On Thu, Oct 20, 2016 at 11:43:38AM +0800, Chen-Yu Tsai wrote:
> The A31 and A31s also have the DRC as part of the display pipeline.
> As we know virtually nothing about them, just add compatible strings
> for both SoCs to the stub driver.
>
> Signed-off-by: Chen-Yu Tsai
> Acked-by: Rob Herring
On Thu, Oct 20, 2016 at 11:43:39AM +0800, Chen-Yu Tsai wrote:
> We already have some differences between the 2 supported SoCs.
> More will be added as we support other SoCs. To avoid bloating
> the probe function with even more conditionals, move the quirks
> to a separate data structure that's tie
On Thu, Oct 20, 2016 at 11:43:41AM +0800, Chen-Yu Tsai wrote:
> The A31's display pipeline has 2 frontends, 2 backends, and 2 TCONs. It
> also has new display enhancement blocks, such as the DRC (Dynamic Range
> Controller), the DEU (Display Enhancement Unit), and the CMU (Color
> Management Unit).
On Thu, Oct 20, 2016 at 11:43:40AM +0800, Chen-Yu Tsai wrote:
> The A31 TCON has mux controls for how TCON outputs are routed to the
> HDMI and MIPI DSI blocks.
>
> Since the A31s does not have MIPI DSI, it only has a mux for the HDMI
> controller input.
>
> This patch only adds support for the c
On Thu, Oct 20, 2016 at 11:43:43AM +0800, Chen-Yu Tsai wrote:
> The LCD0 controller on the A31 can do RGB output up to 8 bits per
> channel. Add the pins for RGB888 output.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engine
On Thu, Oct 20, 2016 at 11:43:42AM +0800, Chen-Yu Tsai wrote:
> The A31 has 2 parallel display pipelines, which can be intermixed.
> However the driver currently only supports one of them.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux a
1;4402;0c
On Thu, Oct 20, 2016 at 11:43:44AM +0800, Chen-Yu Tsai wrote:
> The Hummingbird A31 board has a RGB-to-VGA bridge which converts RGB
> output from the LCD interface to VGA signals.
>
> Enable this part of the display pipeline.
>
> Signed-off-by: Chen-Yu Tsai
This one looks nice, but I
Hi,
On Thu, Oct 20, 2016 at 05:06:59PM +0900, Milo Kim wrote:
> This patch provides a common file for NanoPi M1 and Neo SBC.
>
> Those have common features below.
> * UART0
> * 2 LEDs
> * USB host (EHCI3, OHCI3) and PHY
> * MicroSD
> * GPIO key switch
>
> Cc: James Pettigrew
> Signed-
Hi Milo,
On Thu, Oct 20, 2016 at 05:07:00PM +0900, Milo Kim wrote:
> Cc: James Pettigrew
> Signed-off-by: Milo Kim
Please add a commit log.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
signature.asc
Description: PGP signatu
Hi Stephen,
On 10/19/2016 10:24 PM, Stephen Boyd wrote:
On 10/14, gabriel.fernan...@st.com wrote:
@@ -292,8 +298,110 @@ static int stm32f4_rcc_lookup_clk_idx(u8 primary, u8
secondary)
return clks[i];
}
+static struct regmap *pdrm;
This can't be part of the stm32_rgate structure?
On Thu, Oct 20, 2016 at 8:52 AM, Bruce Fields wrote:
>
> Jeff was also wondering whether we could instead just allocate this with
> vmalloc--is there any drawback? We only allocate this on nfsd startup,
> so if the only drawback is the allocation itself being expensive then
> that's no big deal.
On Thu, Oct 20, 2016 at 06:08:01PM +0200, Lubomir Rintel wrote:
> This implements only the very basic protocol "Mode A", just to make the
> device functional. Patches to implement "Mode C" that uses better bulking
> and is interrupt-driver may follow.
>
> The device essentially speaks the same pro
On Wed, Oct 19, 2016 at 05:00:12PM -0700, Andrew Morton wrote:
> On Thu, 13 Oct 2016 13:38:01 -0700 Babu Moger wrote:
>
> > Currently we do not have a way to enable/disable arch specific
> > watchdog handlers if it was implemented by any of the architectures.
> >
> > This patch introduces new fu
This implements only the very basic protocol "Mode A", just to make the
device functional. Patches to implement "Mode C" that uses better bulking
and is interrupt-driver may follow.
The device essentially speaks the same protocol as USB CCID devices do over
the bulk endpoints. The driver exchanges
In load_module() in the event of an error, for e.g. unknown module
parameter(s) specified we go to perform some module coming clean up
operations. At this point the module is still in a "formed" state
when it is actually going away.
This patch updates the module's state accordingly to ensure anyon
By default, during the access permission modification of a module's core
and init pages, we only ignore modules that are malformed. There is no
reason not to extend this to modules which are going away too.
This patch makes both set_all_modules_text_rw() and
set_all_modules_text_ro() skip modules
I think there is a race (albeit a hard-to-hit one) between load_module()
error handling and kprobe registration which could cause a kernel page to
become read-only, panic due to protection fault.
In short, the protection that gets applied [at the bug_cleanup label] can be
overridden by another CP
On 2016-10-20 13:29, Peter Meerwald-Stadler wrote:
>> It is assumed the that the dpot is used as a voltage divider between the
>> current dpot wiper setting and the maximum resistance of the dpot. The
>> divided voltage is provided by a vref regulator.
>>
>> .--.
>>.--
Javier Martinez Canillas writes:
> The Amlogic Meson is a DT-only platform, which means the devices are
> registered via OF and not using the legacy platform devices support.
>
> So there's no need to have a MODULE_ALIAS("platform:meson-gxbb-wdt")
> since the reported uevent MODALIAS to user-spac
Javier Martinez Canillas writes:
> The Amlogic Meson is a DT-only platform, which means the devices are
> registered via OF and not using the legacy platform devices support.
>
> So there's no need to have a MODULE_ALIAS("platform:meson-pwm") since
> the reported uevent MODALIAS to user-space wil
Javier Martinez Canillas writes:
> The Amlogic Meson is a DT-only platform, which means the devices are
> registered via OF and not using the legacy platform devices support.
>
> So there's no need to have a MODULE_ALIAS("platform:meson-rng") since
> the reported uevent MODALIAS to user-space wil
Hi Neil,
On 20 October 2016 at 17:54, Neil Armstrong wrote:
> Add Synopsys Designware MAC Glue layer for the Oxford Semiconductor OX820.
>
> Signed-off-by: Neil Armstrong
> ---
> .../devicetree/bindings/net/oxnas-dwmac.txt| 44 ++
> drivers/net/ethernet/stmicro/stmmac/Kconfig
Neil Armstrong writes:
> Enable MMC related defaults configs for MMC, PWM and PWM clock.
>
> Signed-off-by: Neil Armstrong
Applied to v4.10/defconfig
Kevin
Jerome,
On 19/10/16 16:21, Jerome Brunet wrote:
> Add support for the interrupt gpio controller found on Amlogic's meson
> SoC family.
>
> Unlike what the IP name suggest, it is not directly linked to the gpio
> subsystem. It is actually an independent IP that is able to spy on the
> SoC pad. For
show_trace_log_lvl() prints the stack id (e.g. "") without a
newline so that any stack address printed after it will appear on the
same line. That causes the first stack address to be vertically
misaligned with the rest, making it visually cluttered and slightly
confusing:
Call Trace:
[] du
With frame pointers, when a task is interrupted, its stack is no longer
completely reliable because the function could have been interrupted
before it had a chance to save the previous frame pointer on the stack.
So the caller of the interrupted function could get skipped by a stack
trace.
This is
On 19/10/16 16:21, Jerome Brunet wrote:
> Add select MESON_IRQ_GPIO in Kconfig for Amlogic's meson SoC family
>
> Signed-off-by: Jerome Brunet
> ---
> arch/arm64/Kconfig.platforms | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platform
On 10/20/2016 08:44 AM, Jan Stancek wrote:
>
>
>
>
> - Original Message -
>> From: "Mike Kravetz"
>> To: linux...@kvack.org, linux-kernel@vger.kernel.org
>> Cc: "Aneesh Kumar K . V" , "Naoya
>> Horiguchi" , "Michal
>> Hocko" , "Kirill A . Shutemov"
>> , "Hillf Danton"
>> , "Dave Hans
Here's the next round of dumpstack-related patches. This adds a
mechanism to identify any pt_regs on the stack so they can be printed in
the stack dump.
Josh Poimboeuf (6):
x86/entry/unwind: create stack frames for saved interrupt registers
x86/unwind: create stack frames for saved syscall re
The entry code doesn't encode the pt_regs pointer for syscalls. But the
pt_regs are always at the same location, so we can add a manual check
for them.
A later patch prints them as part of the oops stack dump. They could be
useful, for example, to determine the arguments to a system call.
Signe
The RIP address is shown twice in __show_regs(). Before:
RIP: 0010:[] [] native_write_msr+0x6/0x30
After:
RIP: 0010:[] native_write_msr+0x6/0x30
Signed-off-by: Josh Poimboeuf
---
arch/x86/kernel/process_64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x8
Now that we can find pt_regs registers on the stack, print them. Here's
an example of what it looks like:
Call Trace:
[] dump_stack+0x86/0xc3
[] hrtimer_interrupt+0xb3/0x1c0
[] local_apic_timer_interrupt+0x36/0x60
[] smp_apic_timer_interrupt+0x3d/0x50
[] apic_timer_interrupt+
On Thu, Oct 20, 2016 at 01:55:38PM -0200, Gustavo Padovan wrote:
> 2016-10-20 Ville Syrjälä :
>
> > On Thu, Oct 20, 2016 at 12:50:05PM -0200, Gustavo Padovan wrote:
> > > From: Gustavo Padovan
> > >
> > > Support DRM out-fences by creating a sync_file with a fence for each CRTC
> > > that sets t
The value of regs->orig_ax contains potentially useful debugging data:
For syscalls it contains the syscall number. For interrupts it contains
the (negated) vector number. To reduce noise, print it only if it has a
useful value (i.e., something other than -1).
Here's what it looks like for a wri
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against
arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up
automatically, but this will need to be rebased before the next posting
and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu@linaro.org wrote:
> +stati
On Thu, 20 Oct 2016, Richard Cochran wrote:
> On Wed, Oct 19, 2016 at 07:42:53PM -0400, Nicolas Pitre wrote:
> > +config POSIX_TIMERS
> > + bool "Posix Clocks & timers" if EXPERT
> > + default y
> > + help
> > + This includes native support for POSIX timers to the kernel.
> > + Most
On 19 October 2016 at 17:01, Jin Yao wrote:
> diff --git a/tools/perf/util/callchain.h b/tools/perf/util/callchain.h
> index 40ecf25..4f6bf6c 100644
> --- a/tools/perf/util/callchain.h
> +++ b/tools/perf/util/callchain.h
> @@ -115,6 +115,10 @@ struct callchain_list {
> bool
1 - 100 of 981 matches
Mail list logo
