Re: Boot regression with bacf6b499e11 ("x86/mm: Use a struct to reduce parameters for SME PGD mapping") on top of -rc8

* Laura Abbott wrote: > Configuration is at > https://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/fedora.git/commit/?h=rawhide > Note that I do think this is something in the Fedora configuration > because a generic "make defconfig" booted just fine. Hm, it says:

Re: BUG: unable to handle kernel paging request in memset_erms (2)

On Fri, Jan 19, 2018 at 11:04 PM, Andrew Morton wrote: > On Fri, 19 Jan 2018 13:58:01 -0800 syzbot > wrote: > >> Hello, >> >> syzbot hit the following crash on mmots commit >>

RE: [RH72 Spectre] ibpb_enabled = 1 leads to hard LOCKUP under x86_64 host machine

well first of all don't use IBRS, use retpoline and if Andrea says this was a known issue in their code then I think that closes the issue. > -Original Message- > From: David Woodhouse [mailto:dw...@infradead.org] > Sent: Saturday, January 20, 2018 1:03 AM > To: Hou Tao

Re: [PATCH] Intel-IOMMU: Delete an error message for a failed memory allocation in init_dmars()

>> Date: Sat, 20 Jan 2018 13:51:49 +0100 >> >> Omit an extra message for a memory allocation failure in this function. >> >> This issue was detected by using the Coccinelle software. >> >> Signed-off-by: Markus Elfring > > NACK on this one and the other two IOMMU

Re: [PATCH v2 3/8] watchdog: JZ4740: Register a restart handler

On 01/19/2018 11:31 PM, PrasannaKumar Muralidharan wrote: Hi Paul, On 30 December 2017 at 19:21, Paul Cercueil wrote: The watchdog driver can restart the system by simply configuring the hardware for a timeout of 0 seconds. Signed-off-by: Paul Cercueil

Re: [PATCH v7 3/4] iio : Add cm3218 smbus ARA and ACPI support

On Sun, 14 Jan 2018 15:39:24 +0100 "Marc CAPDEVILLE" wrote: > > > On Sat, 13 Jan 2018 14:37:04 +0100 > > Marc CAPDEVILLE wrote: > > > >> On asus T100, Capella cm3218 chip is implemented as ambiant light > >> sensor. This chip expose an smbus

Re: [PATCH v4 00/10] prevent bounds-check bypass via speculative execution

On Fri, Jan 19, 2018 at 10:58:44PM -0800, Dan Williams wrote: > On Thu, Jan 18, 2018 at 4:01 PM, Dan Williams > wrote: > > Changes since v3 [1] > > * Drop 'ifence_array_ptr' and associated compile-time + run-time > > switching and just use the masking approach all the

[PATCH v6 20/41] ARM: da830: add new clock init using common clock framework

This adds the new board-specific clock init in mach-davinci/da830.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner

[PATCH v6 21/41] ARM: da850: add new clock init using common clock framework

This adds the new board-specific clock init in mach-davinci/da850.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner

[PATCH v6 19/41] clk: davinci: New driver for TI DA8XX USB PHY clocks

This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon register on TI DA8XX-type SoCs. The USB0 (USB 2.0) PHY clock is an interesting case because it calls clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled temporarily while we are locking the PLL, which takes

[PATCH v6 16/41] clk: davinci: Add platform information for TI DM646x PSC

This adds platform-specific declarations for the PSC clocks on TI DM646x based systems. Signed-off-by: David Lechner --- v6 changes: - change how clkdev lookups are declared drivers/clk/davinci/Makefile | 1 + drivers/clk/davinci/psc-dm646x.c | 62

[PATCH v6 18/41] clk: davinci: New driver for TI DA8XX CFGCHIP clocks

This adds a new driver for the gate and multiplexer clocks in the CFGCHIPn syscon registers on TI DA8XX-type SoCs. Signed-off-by: David Lechner --- v6 changes: - added DIV4.5 and ASYNC1 clocks - refactored code to be more generic - added functions for registering clocks

[PATCH v6 17/41] dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks

This adds a new binding for the clocks present in the CFGCHIP syscon registers in TI DA8XX SoCs. Signed-off-by: David Lechner --- v6 changes: - combine "dt-bindings: clock: Add bindings for DA8XX CFGCHIP gate clocks", "dt-bindings: clock: Add binding for TI DA8XX CFGCHIP

[PATCH v6 15/41] clk: davinci: Add platform information for TI DM644x PSC

This adds platform-specific declarations for the PSC clocks on TI DM644x based systems. Signed-off-by: David Lechner --- v6 changes: - change how clkdev lookups are declared drivers/clk/davinci/Makefile | 1 + drivers/clk/davinci/psc-dm644x.c | 68

[PATCH v6 14/41] clk: davinci: Add platform information for TI DM365 PSC

This adds platform-specific declarations for the PSC clocks on TI DM365 based systems. Signed-off-by: David Lechner --- v6 changes: - change how clkdev lookups are declared drivers/clk/davinci/Makefile| 1 + drivers/clk/davinci/psc-dm365.c | 79

Re: [Intel-wired-lan] [RFC PATCH] e1000e: Remove Other from EIAC.

On Fri, Jan 19, 2018 at 2:55 PM, Benjamin Poirier wrote: > On 2018/01/20 07:45, Benjamin Poirier wrote: > [...] >> > >> > I'm of the mind that we need to cut down on the code thrash. This >> > driver is supposed to have been in a "maintenance" mode for the last >> >

Re: Boot regression with bacf6b499e11 ("x86/mm: Use a struct to reduce parameters for SME PGD mapping") on top of -rc8

On 1/20/2018 10:52 AM, Laura Abbott wrote: > On 01/20/2018 05:13 AM, Ingo Molnar wrote: >> >> * Ingo Molnar wrote: >> >>> 2) >>> >>> using global variables, which is unsafe in early code if the kernel is >>> relocatable. >>> >>> The bisected to commit uses a new

[PATCH v6 30/41] ARM: davinci: switch to common clock framework

This switches ARCH_DAVINCI to use the common clock framework. The legacy clock code in arch/arm/mach-davinci/ is no longer used. New drivers in drivers/clk/davinci/ are used instead. A few macros had to be moved to prevent compile errors. Signed-off-by: David Lechner ---

[PATCH v6 36/41] ARM: dm646x: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm646x.c. Signed-off-by: David Lechner --- v6 changes: - none arch/arm/mach-davinci/dm646x.c | 329 + 1 file changed, 1 insertion(+), 328 deletions(-) diff

[GIT PULL] spectre variant1 mitigations for 4.16

Hi Thomas, please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/djbw/linux nospec-v4.1 ...to receive a collection of spectre-v1 mitigations, and infrastructure for future mitigations. The infrastructure includes: * __uaccess_begin_nospec: similar to __uaccess_begin this invokes

[PATCH] ARM-SMMU: Delete error messages for a failed memory allocation in three functions

From: Markus Elfring Date: Sat, 20 Jan 2018 15:30:17 +0100 Omit extra messages for a memory allocation failure in these functions. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

Re: [RFP] iio: Support of gesture sensor as a standard IIO sensor

On Thu, 18 Jan 2018 23:40:26 +0100 Pavel Machek wrote: > Hi! > > > From an IIO sensor point of view A Gesture sensor: > > Outputs > > A pre defined activity type > > WAKE > > TILT > > GLANCE > > PICK_UP > >  & > >

[PATCH] Staging: iio: ade7758: Replace mlock with buf_lock

iio_dev->mlock is to be used only by the IIO core for protecting device mode changes between INDIO_DIRECT and INDIO_BUFFER. This patch replaces the use of mlock with the already established buf_lock mutex. Signed-off-by: Shreeya Patel ---

[PATCH v6 33/41] ARM: dm355: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm355.c. Signed-off-by: David Lechner --- v6 changes: - none arch/arm/mach-davinci/dm355.c | 357 +- 1 file changed, 1 insertion(+), 356 deletions(-) diff

[PATCH v6 32/41] ARM: da850: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/da850.c. Signed-off-by: David Lechner --- v6 changes: - rebased arch/arm/mach-davinci/da850.c | 646 -- 1 file changed, 646 deletions(-) diff --git

[PATCH v6 37/41] ARM: da8xx: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/{devices,usb}-da8xx}.c. Signed-off-by: David Lechner --- v6 changes: - rebased arch/arm/mach-davinci/devices-da8xx.c | 29 - arch/arm/mach-davinci/usb-da8xx.c | 238

[PATCH v6 31/41] ARM: da830: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/da830.c. Signed-off-by: David Lechner --- v6 changes: - rebased arch/arm/mach-davinci/da830.c | 413 +- 1 file changed, 1 insertion(+), 412 deletions(-)

Re: [PATCH v2 3/8] watchdog: JZ4740: Register a restart handler

On 01/20/2018 08:04 AM, PrasannaKumar Muralidharan wrote: Hi Guenter, On 20 January 2018 at 21:15, Guenter Roeck wrote: On 01/19/2018 11:31 PM, PrasannaKumar Muralidharan wrote: Hi Paul, On 30 December 2017 at 19:21, Paul Cercueil wrote: The

[PATCH v2] iommu/arm-smmu-v3: limit reporting of MSI allocation failures

Currently, the arm-smmu-v3 driver expects to allocate MSIs for all SMMUs with FEAT_MSI set. This results in unwarranted "failed to allocate MSIs" warnings being printed on systems where FW was either deliberately configured to force the use of SMMU wired interrupts -or- is altogether incapable of

[PATCH] kvm: x86: Use X86_CR4_PAE instead of X86_CR4_PAE_BIT while validating sregs

Use the mask (X86_CR4_PAE) instead of the bit itself (X86_CR4_PAE_BIT) while validating sregs. Cc: Paolo Bonzini Cc: Radim Krčmář Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc:

[RFC 04/10] x86/mm: Only flush indirect branches when switching into non dumpable process

From: Tim Chen Flush indirect branches when switching into a process that marked itself non dumpable. This protects high value processes like gpg better, without having too high performance overhead. Signed-off-by: Andi Kleen Signed-off-by:

[RFC 10/10] x86/enter: Use IBRS on syscall and interrupts

From: Tim Chen Stop Indirect Branch Speculation on every user space to kernel space transition and reenable it when returning to user space./ The NMI interrupt save/restore of IBRS state was based on Andrea Arcangeli's implementation. Here's an explanation by Dave

[RFC 07/10] x86: Simplify spectre_v2 command line parsing

Signed-off-by: KarimAllah Ahmed --- arch/x86/kernel/cpu/bugs.c | 106 + 1 file changed, 58 insertions(+), 48 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 1d5e12f..349c7f4 100644 ---

[RFC 05/10] x86/speculation: Add basic IBRS support infrastructure

From: David Woodhouse Not functional yet; just add the handling for it in the Spectre v2 mitigation selection, and the X86_FEATURE_IBRS flag which will control the code to be added in later patches. Also take the #ifdef CONFIG_RETPOLINE from around the RSB-stuffing; IBRS mode

[RFC 08/10] x86/idle: Control Indirect Branch Speculation in idle

From: Thomas Gleixner Indirect Branch Speculation (IBS) is controlled per physical core. If one thread disables it then it's disabled for the core. If a thread enters idle it makes sense to reenable IBS so the sibling thread can run with full speculation enabled in user

[RFC 09/10] x86/enter: Create macros to restrict/unrestrict Indirect Branch Speculation

From: Tim Chen Create macros to control Indirect Branch Speculation. Name them so they reflect what they are actually doing. The macros are used to restrict and unrestrict the indirect branch speculation. They do not *disable* (or *enable*) indirect branch

Re: [PATCH v5 0/2] printk: Console owner and waiter logic cleanup

Hello, Steven. On Fri, Jan 19, 2018 at 01:20:52PM -0500, Steven Rostedt wrote: > I was thinking about this a bit more, and instead of offloading a > recursive printk, perhaps its best to simply throttle it. Because the > problem may not go away if a printk thread takes over, because the bug > is

Re: [PATCH -next] mtd: onenand: omap2: Remove redundant dev_err call in omap2_onenand_probe()

On Wed, 17 Jan 2018 11:25:33 + Wei Yongjun wrote: > There is a error message within devm_ioremap_resource > already, so remove the dev_err call to avoid redundant > error message. Applied. Thanks, Boris > > Signed-off-by: Wei Yongjun >

Re: [PATCH][V2] mtd: nand: marvell: fix spelling mistake: "suceed"-> "succeed"

On Fri, 19 Jan 2018 07:55:31 + Colin King wrote: > From: Colin Ian King > > Trivial fix to spelling mistakes in dev_err error message text. Applied. Thanks, Boris > > Signed-off-by: Colin Ian King > --- >

Re: [PATCH] acpi, spcr: Make SPCR available to x86

* Prarit Bhargava wrote: > Note on testing: I've tested this on several ARM64 and x86 boxes (only > earlycon, console=ttyS0,115200, and with both options), verified that > functionality on ARM64 has not changed (ie, CONFIG_ACPI_SPCR_TABLE is > always =y), and verified

Re: Possible Memory Leak in KCOV Linux 4.15-rc1

On Sat, Jan 20, 2018 at 4:01 PM, Shankara Pailoor wrote: > Hi Dmitry, > > I will try and get something to you tomorrow. Just wondering, but what > happens to the old struct kcov if a task opens /sys/kernel/debug/kcov > twice? I am looking here >

Re: [PATCH v5 0/2] printk: Console owner and waiter logic cleanup

On Sat, 20 Jan 2018 16:14:02 +0900 Sergey Senozhatsky wrote: > [..] > > asmlinkage int vprintk_emit(int facility, int level, > > const char *dict, size_t dictlen, > > @@ -1849,6 +1918,17 @@ asmlinkage int vprintk_emit(int facility, int

Re: [PATCH v2 4/8] watchdog: JZ4740: Drop module remove function

On 01/19/2018 11:41 PM, PrasannaKumar Muralidharan wrote: Hi Paul, On 30 December 2017 at 19:21, Paul Cercueil wrote: When the watchdog was configured for nowayout, and after the userspace watchdog daemon closed the dev node without sending the magic character, unloading

[PATCH v6 05/41] clk: davinci: Add platform information for TI DM355 PLL

This adds platform-specific declarations for the PLL clocks on TI DM355 based systems. Signed-off-by: David Lechner --- v6 changes: - Added dm355_pll{1,2}_info with controller-specific information - Add empty lines between function calls drivers/clk/davinci/Makefile|

[PATCH v6 08/41] clk: davinci: Add platform information for TI DM646x PLL

This adds platform-specific declarations for the PLL clocks on TI DM646x based systems. Signed-off-by: David Lechner --- v6 changes: - Added dm646x_pll{1,2}_info with controller-specific information - Add empty lines between function calls drivers/clk/davinci/Makefile

[PATCH v6 02/41] clk: davinci: New driver for davinci PLL clocks

This adds a new driver for mach-davinci PLL clocks. This is porting the code from arch/arm/mach-davinci/clock.c to the common clock framework. Additionally, it adds device tree support for these clocks. The ifeq ($(CONFIG_COMMON_CLK), y) in the Makefile is needed to prevent compile errors until

[PATCH v6 07/41] clk: davinci: Add platform information for TI DM644x PLL

This adds platform-specific declarations for the PLL clocks on TI DM644x based systems. Signed-off-by: David Lechner --- v6 changes: - Added dm644x_pll{1,2}_info with controller-specific information - Add empty lines between function calls drivers/clk/davinci/Makefile

[PATCH v6 11/41] clk: davinci: Add platform information for TI DA830 PSC

This adds platform-specific declarations for the PSC clocks on TI DA830/ OMAP-L137/AM17XX SoCs. Signed-off-by: David Lechner --- v6 changes: - change how clkdev lookups are declared drivers/clk/davinci/Makefile| 1 + drivers/clk/davinci/psc-da830.c | 85

[PATCH v6 13/41] clk: davinci: Add platform information for TI DM355 PSC

This adds platform-specific declarations for the PSC clocks on TI DM355 based systems. Signed-off-by: David Lechner --- v6 changes: - change how clkdev lookups are declared drivers/clk/davinci/Makefile| 1 + drivers/clk/davinci/psc-dm355.c | 74

[PATCH v6 12/41] clk: davinci: Add platform information for TI DA850 PSC

This adds platform-specific declarations for the PSC clocks on TI DA850/ OMAP-L138/AM18XX SoCs. Signed-off-by: David Lechner --- v6 changes: - change how clkdev lookups are declared drivers/clk/davinci/Makefile| 1 + drivers/clk/davinci/psc-da850.c | 109

[PATCH v6 10/41] clk: davinci: New driver for davinci PSC clocks

This adds a new driver for mach-davinci PSC clocks. This is porting the code from arch/arm/mach-davinci/psc.c to the common clock framework and is converting it to use regmap to simplify the code. Additionally, it adds device tree support for these clocks. Note: although there are similar clocks

[PATCH v6 09/41] dt-bindings: clock: New bindings for TI Davinci PSC

This adds a new binding for the Power Sleep Controller (PSC) for the mach-davinci family of processors. Note: Although TI Keystone has a very similar PSC, we are not using the existing bindings. Keystone is using a legacy one-node-per-clock binding (actually two nodes if you count the separate

[PATCH v6 06/41] clk: davinci: Add platform information for TI DM365 PLL

This adds platform-specific declarations for the PLL clocks on TI DM365 based systems. Signed-off-by: David Lechner --- v6 changes: - Added dm365_pll{1,2}_info with controller-specific information - Changed OBSCLK data - Add empty lines between function calls

[GIT PULL] KVM fixes for Linux 4.15(-rc9)

Linus, the high amount of new code improves situation around CPU vulnerabilities. The following changes since commit a8750ddca918032d6349adbf9a4b6555e7db20da: Linux 4.15-rc8 (2018-01-14 15:32:30 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/virt/kvm/kvm

Re: [PATCH v2 1/5] powerpc/mm: Enhance 'slice' for supporting PPC32

Hi! On Sat, Jan 20, 2018 at 09:22:50AM +0100, christophe leroy wrote: > >>>On PPC32, the address space is limited to 4Gbytes, hence only the > >>>low > >>>slices will be used. As of today, the code uses > >>>SLICE_LOW_TOP (0x1ul) and compares it with addr to determine >

Re: [PATCH V1] tty: fix data race between tty_init_dev and flush of buf

On Wed, 17 Jan 2018 18:54:19 +0530 Gaurav Kohli wrote: > There can be a race, if receive_buf call comes before > tty initialization completes in n_tty_open and tty->disc_data > may be NULL. > > CPU0 CPU1 >

Re: [PATCH] tty: fix data race in n_tty_receive_buf_common

> Sorry for the delayed response, as i was waiting for test results. > I have uploaded the new patch v1 as per your suggestions and result > looks good. Thanks for all the testing. This looks good to me too. Alan

[RFC 01/10] x86/speculation: Add basic support for IBPB

From: Thomas Gleixner Expose indirect_branch_prediction_barrier() for use in subsequent patches. [karahmed: remove the special-casing of skylake for using IBPB (wtf?), switch to using ALTERNATIVES instead of static_cpu_has] [dwmw2:set up ax/cx/dx in the asm

[RFC 00/10] Speculation Control feature support

Start using the newly-added microcode features for speculation control on both Intel and AMD CPUs to protect against Spectre v2. This patch series covers interrupts, system calls, context switching between processes, and context switching between VMs. It also exposes Indirect Branch Prediction

[RFC 03/10] x86/speculation: Use Indirect Branch Prediction Barrier in context switch

From: Thomas Gleixner [peterz: comment] Signed-off-by: Thomas Gleixner Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: David Woodhouse --- arch/x86/mm/tlb.c | 10 +- 1 file changed, 9

Re: KASAN: use-after-free Read in fib6_ifup (2)

On Thu, Jan 18, 2018 at 09:58:01PM -0800, syzbot wrote: > Hello, > > syzbot hit the following crash on net-next commit > 564737f981fb4b4b3266901508bb9b90d9d43de8 > > So far this crash happened 18 times on mmots, net-next. > C reproducer is attached. > syzkaller reproducer is attached. > Raw

Re: Boot regression with bacf6b499e11 ("x86/mm: Use a struct to reduce parameters for SME PGD mapping") on top of -rc8

* Ingo Molnar wrote: > 2) > > using global variables, which is unsafe in early code if the kernel is > relocatable. > > The bisected to commit uses a new sme_populate_pgd_data to collect variables > that > were already on the stack, which should be position independent

Re: [PATCH v5 0/2] printk: Console owner and waiter logic cleanup

On Sat, 20 Jan 2018 04:19:53 -0800 Tejun Heo wrote: > I'm a bit worried tho because this essentially seems like "detect > recursion, ignore messages" approach. netcons can have a very large > surface for bugs. Suppressing those messages would make them > difficult to debug.

[PATCH 1/4] x86/cpufeatures: Add Intel feature bits for Speculation Control

Add three feature bits exposed by new microcode on Intel CPUs for speculation control. We would now be up to five bits in CPUID(7).RDX so take them out of the 'scattered' features and make a proper word for them instead. Signed-off-by: David Woodhouse ---

[PATCH 0/4] Basic Speculation Control feature support

This is the basis for using the newly-added microcode features for speculation control on both Intel and AMD CPUs. We just add the CPUID feature bits (with associated cleanup now we were using 5 bits out of the same subleaf as "scattered" bits), add the MSR definitions, and turn off KPTI for Intel

Re: Possible Memory Leak in KCOV Linux 4.15-rc1

On Fri, Jan 19, 2018 at 8:29 PM, Shankara Pailoor wrote: > Hi Dmitry, > > I added support for kcov in strace and I have been tracing a fairly > large program but after a little while, I notice that when I mmap a > new cover buffer, the call fails with ENOMEM. After killing

Re: [PATCH] Intel-IOMMU: Delete an error message for a failed memory allocation in init_dmars()

On Sat, Jan 20, 2018 at 02:00:13PM +0100, SF Markus Elfring wrote: > From: Markus Elfring > Date: Sat, 20 Jan 2018 13:51:49 +0100 > > Omit an extra message for a memory allocation failure in this function. > > This issue was detected by using the Coccinelle

[PATCH] Exynos-IOMMU: Delete an error message for a failed memory allocation in exynos_iommu_init()

From: Markus Elfring Date: Sat, 20 Jan 2018 14:28:13 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

Re: [PATCH][V2] mtd: nand: marvell: remove redundant variable 'oob_len'

On Fri, 19 Jan 2018 07:59:54 + Colin King wrote: > From: Colin Ian King > > Variable oob_len is assigned and never read, hence it is redundant and > can be removed. > > Cleans up clang warnings: > >

Re: [PATCH V5 0/2] nvme-pci: fix the timeout case when reset is ongoing

Hi Keith Thanks for you kindly response. On 01/20/2018 10:11 AM, Keith Busch wrote: > On Fri, Jan 19, 2018 at 09:56:48PM +0800, jianchao.wang wrote: >> In nvme_dev_disable, the outstanding requests will be requeued finally. >> I'm afraid the requests requeued on the q->requeue_list will be

Re: [RFC] x86: Avoid CR3 load on compatibility mode with PTI

* Nadav Amit wrote: > > So we are trading a 5-15% slowdown (PTI) for another 5-15% slowdown, plus > > we > > are losing the soft-SMEP feature on older CPUs that PTI enables, which is a > > pretty powerful mitigation technique. > > This soft-SMEP can be kept by keeping

Re: [RH72 Spectre] ibpb_enabled = 1 leads to hard LOCKUP under x86_64 host machine

Hello everyone, On Sat, Jan 20, 2018 at 01:56:08PM +, Van De Ven, Arjan wrote: > well first of all don't use IBRS, use retpoline This issue triggers in the IBPB code during user to user context switch and IBPB is still needed there no matter if kernel is using retpolines or if it uses kernel

Re: [PATCH v7 2/4] i2c-acpi : exclude ARA address for smbus device

On Wed, 17 Jan 2018 11:28:01 +0100 CAPDEVILLE Marc wrote: > Le dimanche 14 janvier 2018 à 11:28 +, Jonathan Cameron a écrit : > > On Sat, 13 Jan 2018 14:37:03 +0100 > > Marc CAPDEVILLE wrote: > > > > > Somme ACPI enumerated devices are

Re: [RFC] x86: Avoid CR3 load on compatibility mode with PTI

On Sat, Jan 20, 2018 at 03:26:27PM +0100, Ingo Molnar wrote: > > * Nadav Amit wrote: > > > > So we are trading a 5-15% slowdown (PTI) for another 5-15% slowdown, plus > > > we > > > are losing the soft-SMEP feature on older CPUs that PTI enables, which is > > > a > > >

Re: [PATCH v4 00/10] prevent bounds-check bypass via speculative execution

On Sat, Jan 20, 2018 at 8:56 AM, Alexei Starovoitov wrote: > On Fri, Jan 19, 2018 at 10:58:44PM -0800, Dan Williams wrote: >> On Thu, Jan 18, 2018 at 4:01 PM, Dan Williams >> wrote: >> > Changes since v3 [1] >> > * Drop 'ifence_array_ptr'

Re: [PATCH] platform/x86: silead_dmi: Add entry for newer BIOS for Trekstor Surftab 7.0

On Tue, Jan 16, 2018 at 08:24:15PM +0100, Hans de Goede wrote: > Some versions of the Trekstor Surftab 7.0 ship with a newer BIOS which uses > different DMI strings. > > Signed-off-by: Hans de Goede Thanks Hans, queued. -- Darren Hart VMware Open Source Technology Center

[PATCH] Intel-IOMMU: Delete an error message for a failed memory allocation in init_dmars()

From: Markus Elfring Date: Sat, 20 Jan 2018 13:51:49 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

Re: [PATCH v3 6/9] irqchip: Add the ingenic-tcu-intc driver

On Thu, 11 Jan 2018 17:25:45 +0100 Paul Cercueil wrote: > Hi Marc, > > >> +static int __init ingenic_tcu_intc_of_init(struct device_node > >> *node, > >> + struct device_node *parent) > >> +{ > >> + struct irq_domain *domain; > >> + struct irq_chip_generic *gc; > >>

Re: [PATCH V5 0/2] nvme-pci: fix the timeout case when reset is ongoing

On 01/20/2018 10:07 PM, jianchao.wang wrote: > Hi Keith > > Thanks for you kindly response. > > On 01/20/2018 10:11 AM, Keith Busch wrote: >> On Fri, Jan 19, 2018 at 09:56:48PM +0800, jianchao.wang wrote: >>> In nvme_dev_disable, the outstanding requests will be requeued finally. >>> I'm

Re: [PATCH v2 4/8] watchdog: JZ4740: Drop module remove function

Hi Guenter, On 20 January 2018 at 21:20, Guenter Roeck wrote: > On 01/19/2018 11:41 PM, PrasannaKumar Muralidharan wrote: >> >> Hi Paul, >> >> On 30 December 2017 at 19:21, Paul Cercueil wrote: >>> >>> When the watchdog was configured for nowayout, and

Re: [PATCH v2 3/8] watchdog: JZ4740: Register a restart handler

Hi Guenter, On 20 January 2018 at 21:15, Guenter Roeck wrote: > On 01/19/2018 11:31 PM, PrasannaKumar Muralidharan wrote: >> >> Hi Paul, >> >> On 30 December 2017 at 19:21, Paul Cercueil wrote: >>> >>> The watchdog driver can restart the system by

[PATCH v6 01/41] dt-bindings: clock: Add new bindings for TI Davinci PLL clocks

This adds a new binding for the PLL IP blocks in the mach-davinci family of processors. Currently, only da850 has device tree support but these bindings can also work for other SoCs in this family just by adding new compatible strings. Note: Although these PLL controllers are very similar to the

[PATCH v6 00/41] ARM: davinci: convert to common clock framework​

This series converts mach-davinci to use the common clock framework. The series works like this, the first 19 patches create new clock drivers using the common clock framework. There are basically 3 groups of clocks - PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each have

[PATCH v6 04/41] clk: davinci: Add platform information for TI DA850 PLL

This adds platform-specific declarations for the PLL clocks on TI DA850/ OMAP-L138/AM18XX SoCs. Signed-off-by: David Lechner --- v6 changes: - Added da850_pll{0,1}_info with controller-specific information - Added OBSCLK data - Add empty lines between function calls

[PATCH v6 03/41] clk: davinci: Add platform information for TI DA830 PLL

This adds platform-specific declarations for the PLL clocks on TI DA830/ OMAP-L137/AM17XX SoCs. Signed-off-by: David Lechner --- v6 changes: - Added da830_pll_info with controller-specific information - Add empty lines between function calls drivers/clk/davinci/Makefile

[PATCH v6 39/41] ARM: davinci: add device tree support to timer

This adds device tree support to the davinci timer so that when clocks are moved to device tree, the timer will still work. Signed-off-by: David Lechner --- v6 changes: - none arch/arm/mach-davinci/Kconfig | 1 + arch/arm/mach-davinci/time.c | 17 ++--- 2

[PATCH v6 38/41] ARM: davinci: remove legacy clocks

This removes the unused legacy clock code from arch/arm/mach-davinci/. Signed-off-by: David Lechner --- v6 changes: - none arch/arm/mach-davinci/clock.c | 745 arch/arm/mach-davinci/clock.h | 72 ---

[PATCH v6 40/41] ARM: da8xx-dt: switch to device tree clocks

This removes all of the clock init code from da8xx-dt.c. This includes all of the OF_DEV_AUXDATA that was just used for looking up clocks. Signed-off-by: David Lechner --- v6 changes: - removed misleading statement from commit message arch/arm/mach-davinci/da8xx-dt.c |

[PATCH v6 34/41] ARM: dm365: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm365.c. Signed-off-by: David Lechner --- v6 changes: - none arch/arm/mach-davinci/dm365.c | 449 +- 1 file changed, 1 insertion(+), 448 deletions(-) diff

[PATCH v6 35/41] ARM: dm644x: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm644x.c. Signed-off-by: David Lechner --- v6 changes: - none arch/arm/mach-davinci/dm644x.c | 300 + 1 file changed, 1 insertion(+), 299 deletions(-) diff

Re: 4.14 kernel and acpi INT3400:00: Unsupported event [0x86]

On Wednesday 15 of November 2017, Zhang Rui wrote: > Hi, Brian, > > thanks for your quick fix, as it is in merge window right now, I will > queue it for for next -rc2. Don't see it merged (4.15.0-rc8). Any problems with it? > > thanks, > rui > > On Tue, 2017-11-14 at 10:50 -0700, Brian Bian

Re: [PATCH 4.4 28/78] netfilter: nfnl_cthelper: fix runtime expectation policy updates

On Fri, 2017-12-22 at 09:46 +0100, Greg Kroah-Hartman wrote: > 4.4-stable review patch.  If anyone has any objections, please let me know. > > -- > > From: Pablo Neira Ayuso > > > [ Upstream commit 2c422257550f123049552b39f7af6e3428a60f43 ] > > We only

[PATCH 2/2] drm/sun4i: Handle DRM_MODE_FLAG_**SYNC_POSITIVE correctly

On previous handling, if specified DRM_MODE_FLAG_N*SYNC, it was ignored, because only PHSYNC and PVSYNC were taken into account. DRM_MODE_FLAG_P*SYNC and DRM_MODE_FLAG_N*SYNC are not exclusive. If flags contains PVSYNC, it doesn't mean it is NVSYNC. And it's true also the contrary. Also, as I've

[PATCH 1/2] drm/sun4i: Handle DRM_BUS_FLAG_PIXDATA_*EDGE

Can't set dclk polarity on sun4i. Handle both positive and negative dclk polarity, according to bus_flags. Signed-off-by: Giulio Benetti --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git

Re: Boot regression with bacf6b499e11 ("x86/mm: Use a struct to reduce parameters for SME PGD mapping") on top of -rc8

* Laura Abbott wrote: > The machines I have are a Lenovo X1 Carbon and a Lenovo T470s. > A Lenovo X220 ThinkPad also reported the problem. > > If I comment out sme_encrypt_kernel it boots: > > diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c > index

Re: [patch -mm 3/4] mm, memcg: replace memory.oom_group with policy tunable

Hello, David. On Fri, Jan 19, 2018 at 12:53:41PM -0800, David Rientjes wrote: > Hearing no response, I'll implement this as a separate tunable in a v2 > series assuming there are no better ideas proposed before next week. One > of the nice things about a separate tunable is that an admin can

[PATCH] iommu/dmar: Delete an error message for a failed memory allocation in dmar_alloc_pci_notify_info()

From: Markus Elfring Date: Sat, 20 Jan 2018 14:55:21 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

Re: [PATCH v22 2/3] virtio-balloon: VIRTIO_BALLOON_F_FREE_PAGE_VQ

Michael S. Tsirkin wrote: > > > > >> + * the page if the vq is full. We are adding one entry each > > > > >> time, > > > > >> + * which essentially results in no memory allocation, so the > > > > >> + * GFP_KERNEL flag below can be ignored. > > > > >> + */ > > > > >> +if

Re: Possible Memory Leak in KCOV Linux 4.15-rc1

Hi Dmitry, I will try and get something to you tomorrow. Just wondering, but what happens to the old struct kcov if a task opens /sys/kernel/debug/kcov twice? I am looking here https://elixir.free-electrons.com/linux/v4.15-rc8/source/kernel/kcov.c#L381 and I don't see where the previous struct

[PATCH v6 26/41] ARM: da8xx: add new USB PHY clock init using common clock framework

This adds the new USB PHY clock init in mach-davinci/usb-da8xx.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Signed-off-by: David Lechner --- v6 changes: - rename stuff to match

  1   2   3   4   5   >