* Rasmus Villemoes wrote:
> [...] Now I finally got around to writing some scripts for that, so here's a
> visualization of (the evolution of) the problem:
>
> https://wildmoose.dk/header-bloat/
Nice! In particular your final conclusion is impressive and scary:
> So the typical (median) tran
On Sun, Feb 25, 2018 at 4:43 PM, Philipp Wagner
wrote:
> Am 22.02.2018 um 16:45 schrieb Arnd Bergmann:
>> While building the cross-toolchains, I noticed that overall, we can build
>> almost
>> all linux target architectures with upstream binutils and gcc these days,
>> however there are still som
On Mon, Feb 26, 2018 at 08:35:52AM +0100, Ingo Molnar wrote:
>
> * Kirill A. Shutemov wrote:
>
> > +#if 0
> > /*
> > * Find a suitable spot for the trampoline.
> > * This code is based on reserve_bios_regions().
> > @@ -49,6 +50,9 @@ struct paging_config paging_prepare(void)
> >
On Mon, Feb 26, 2018 at 08:50:27AM +0100, Ingo Molnar wrote:
>
> * Ingo Molnar wrote:
>
> > We need to re-do this as we have now run into _exactly_ the kind of
> > difficult to
> > debug bug that I was worried about when I insisted on the many iterations
> > of
> > this patch-set...
>
> Ok,
Hi,
On 25-02-18 19:51, Randy Dunlap wrote:
Hi,
On 02/25/2018 07:25 AM, Hans de Goede wrote:
diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig
index a7bca4207f44..de15bf55895b 100644
--- a/drivers/extcon/Kconfig
+++ b/drivers/extcon/Kconfig
@@ -30,7 +30,8 @@ config EXTCON_ARIZONA
I'll rebase it on latest for-next in next version.
Thank you,
Claudiu Beznea
On 24.02.2018 22:49, kbuild test robot wrote:
> Hi Claudiu,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on pwm/for-next]
> [also build test WARNING on v4.16-rc2 next-20180223
On (02/26/18 16:46), Minchan Kim wrote:
[..]
> > hm, I think `huge_size' on it's own is a bit general and cryptic.
> > zs_huge_object_size() or zs_huge_class_size()?
>
> I wanted to use more general word to hide zsmalloc internal but
> I realized it's really impossible to hide them all.
> If so, l
Hi Jacopo,
On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi wrote:
> Initial support for R-Car M3-N (r8a77965), including core and module
> clocks.
>
> Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
> Hardware (Rev. 0.80, Oct 31, 2017)".
>
> Signed-off-by: Jacopo Mondi
> --- a
On Mon, Feb 26, 2018 at 11:02:56AM +0300, Kirill A. Shutemov wrote:
...
> > Also, could do a puts() hexdump of the affected memory area _before_ we
> > overwrite
> > it? Is it empty? Could we add some debug warning that checks that it's all
> > zeroes?
>
> The problem is that we don't really ha
From: Leo Wen
You can use the v4l2-ctl command to capture frames for RK1608.
Add DT-bindings documentation for Rockchip RK1608.
Add the information of the MAINTAINERS.
Leo Wen (2):
[media] Add Rockchip RK1608 driver
dt-bindings: Document the Rockchip RK1608 bindings
Documentation/devicetre
From: Leo Wen
Rk1608 is used as a PreISP to link on Soc, which mainly has two functions.
One is to download the firmware of RK1608, and the other is to match the
extra sensor such as camera and enable sensor by calling sensor's s_power.
use below v4l2-ctl command to capture frames.
v4l2-ctl
From: Ard Biesheuvel
commit 5ea5306c323 upstream.
One important rule of thumb when desiging a secure software system is
that memory should never be writable and executable at the same time.
We mostly adhere to this rule in the kernel, except at boot time, when
regions may be mapped RWX until aft
**
*Hi, all!*
*
Last *Friday* some concerns on #dri-devel were raised wrt "yet
another driver" for Xen and why not virtio-gpu. Let me highlight
on why we need a new paravirtualized driver for Xen and why we
can't just use virtio. Hope this helps the communities (both Xen
and DRI) to have be
From: Yury Norov
commit eef94a3d09aab upstream.
ILP32 series [1] introduces the dependency on for
TASK_SIZE macro. Which in turn requires , and
include , giving a circular dependency,
because TASK_SIZE is currently located in .
In other architectures, TASK_SIZE is defined in , and
moving TASK
From: Catalin Marinas
commit bd38967d406 upstream.
This patch moves the directly coded alternatives for turning PAN on/off
into separate uaccess_{enable,disable} macros or functions. The asm
macros take a few arguments which will be used in subsequent patches.
Note that any (unlikely) access th
From: Robin Murphy
commit 51369e398d0d upstream.
Currently, USER_DS represents an exclusive limit while KERNEL_DS is
inclusive. In order to do some clever trickery for speculation-safe
masking, we need them both to behave equivalently - there aren't enough
bits to make KERNEL_DS exclusive, so we
From: Robin Murphy
commit 022620eed3d0 upstream.
Provide an optimised, assembly implementation of array_index_mask_nospec()
for arm64 so that the compiler is not in a position to transform the code
in ways which affect its ability to inhibit speculation (e.g. by introducing
conditional branches)
From: Will Deacon
commit 669474e772b9 upstream.
For CPUs capable of data value prediction, CSDB waits for any outstanding
predictions to architecturally resolve before allowing speculative execution
to continue. Provide macros to expose it to the arch code.
Reviewed-by: Mark Rutland
Signed-off
From: Mark Rutland
commit 76624175dca upstream.
Currently in arm64's copy_{to,from}_user, we only check the
source/destination object size if access_ok() tells us the user access
is permissible.
However, in copy_from_user() we'll subsequently zero any remainder on
the destination object. If we
From: Dave Martin
commit 35d0e6fb4d upstream.
The upper 32 bits of the syscallno field in thread_struct are
handled inconsistently, being sometimes zero extended and sometimes
sign-extended. In fact, only the lower 32 bits seem to have any
real significance for the behaviour of the code: it's b
From: Robin Murphy
commit 4d8efc2d5ee4 upstream.
Similarly to x86, mitigate speculation past an access_ok() check by
masking the pointer against the address limit before use.
Even if we don't expect speculative writes per se, it is plausible that
a CPU may still speculate at least as far as fet
From: James Morse
commit edf298cfce47 upstream.
Alex Shi rewrite this commit on func this_cpu_has_cap(). The following commit
log is still meaningful.
this_cpu_has_cap() tests caps->desc not caps->matches, so it stops
walking the list when it finds a 'silent' feature, instead of
walk
From: Will Deacon
commit 84624087dd7e upstream.
access_ok isn't an expensive operation once the addr_limit for the current
thread has been loaded into the cache. Given that the initial access_ok
check preceding a sequence of __{get,put}_user operations will take
the brunt of the miss, we can mak
From: Will Deacon
commit 91b2d3442f6a upstream.
The arm64 futex code has some explicit dereferencing of user pointers
where performing atomic operations in response to a futex command. This
patch uses masking to limit any speculative futex operations to within
the user address space.
Signed-off
Minchan Kim writes:
> On Mon, Feb 26, 2018 at 01:18:50PM +0800, Huang, Ying wrote:
>> Minchan Kim writes:
>>
>> > On Fri, Feb 23, 2018 at 04:02:27PM +0800, Huang, Ying wrote:
>> >> writes:
>> >> [snip]
>> >>
>> >> > diff --git a/mm/swap_state.c b/mm/swap_state.c
>> >> > index 39ae7cfad90f..c5
From: Will Deacon
commit 6314d90e6493 upstream.
In a similar manner to array_index_mask_nospec, this patch introduces an
assembly macro (mask_nospec64) which can be used to bound a value under
speculation. This macro is then used to ensure that the indirect branch
through the syscall table is bo
From: Marc Zyngier
commit 06f1494f837 upstream.
Some minor erratum may not be fixed in further revisions of a core,
leading to a situation where the workaround needs to be updated each
time an updated core is released.
Introduce a MIDR_ALL_VERSIONS match helper that will work for all
versions o
From: Marc Zyngier
commit 95e3de3590e3 upstream.
We will soon need to invoke a CPU-specific function pointer after changing
page tables, so move post_ttbr_update_workaround out into C code to make
this possible.
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi
From: Suzuki K Poulose
commit 55b35d070c25 upstream.
When a CPU is brought up after we have finalised the system
wide capabilities (i.e, features and errata), we make sure the
new CPU doesn't need a new errata work around which has not been
detected already. However we don't run enable() method
From: Marc Zyngier
commit 6840bdd73d07 upstream
Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code.
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi
Conflicts:
mv changes from virt/kvm/arm/arm.c to arch/arm/kvm/arm.c
---
arch/arm/i
From: Will Deacon
commit 0f15adbb2861 upstream.
Aliasing attacks against CPU branch predictors can allow an attacker to
redirect speculative control flow on some CPUs and potentially divulge
information from one context to another.
This patch adds initial skeleton code behind a new Kconfig opti
From: Marc Zyngier
commit a8e4c0a919ae upstream.
We call arm64_apply_bp_hardening() from post_ttbr_update_workaround,
which has the unexpected consequence of being triggered on every
exception return to userspace when ARM64_SW_TTBR0_PAN is selected,
even if no context switch actually occured.
T
From: Will Deacon
commit a65d219fe5dc upstream.
Hook up MIDR values for the Cortex-A72 and Cortex-A75 CPUs, since they
will soon need MIDR matches for hardening the branch predictor.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
Signed-off-by: Alex Shi
Conflicts:
pick A7
From: Leo Wen
Add DT bindings documentation for Rockchip RK1608.
Changes V2:
- Delete spi-min-frequency property.
- Add the external sensor's control pin and clock properties.
- Delete the '&pinctrl' node.
Signed-off-by: Leo Wen
---
Documentation/devicetree/bindings/media/rk1608.txt | 97
From: Marc Zyngier
commit d0a144f12a7c upstream.
As we're about to trigger a PSCI version explosion, it doesn't
hurt to introduce a PSCI_VERSION helper that is going to be
used everywhere.
Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Cata
From: Marc Zyngier
commit f5115e8869e1 upstream.
When handling an SMC trap, the "preferred return address" is set
to that of the SMC, and not the next PC (which is a departure from
the behaviour of an SMC that isn't trapped).
Increment PC in the handler, as the guest is otherwise forever
stuck.
From: Will Deacon
commit 5dfc6ed27710 upstream.
Software-step and PC alignment fault exceptions have higher priority than
instruction abort exceptions, so apply the BP hardening hooks there too
if the user PC appears to reside in kernel space.
Reported-by: Dan Hettena
Reviewed-by: Marc Zyngier
From: Marc Zyngier
commit 84684fecd7ea upstream.
Instead of open coding the accesses to the various registers,
let's add explicit SMCCC accessors.
Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
S
From: Marc Zyngier
commit 1a2fb94e6a77 upstream.
As we're about to update the PSCI support, and because I'm lazy,
let's move the PSCI include file to include/kvm so that both
ARM architectures can find it.
Acked-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signe
From: Will Deacon
commit aa6acde65e03 upstream.
Cortex-A57, A72, A73 and A75 are susceptible to branch predictor aliasing
and can theoretically be attacked by malicious code.
This patch implements a PSCI-based mitigation for these CPUs when available.
The call into firmware will invalidate the
From: Marc Zyngier
commit a4097b351118 upstream.
We're about to need kvm_psci_version in HYP too. So let's turn it
into a static inline, and pass the kvm structure as a second
parameter (so that HYP can do a kern_hyp_va on it).
Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-of
From: Marc Zyngier
commit 09e6be12effd upstream.
The new SMC Calling Convention (v1.1) allows for a reduced overhead
when calling into the firmware, and provides a new feature discovery
mechanism.
Make it visible to KVM guests.
Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-o
From: Marc Zyngier
commit 58e0b2239a4d upstream.
PSCI 1.0 can be trivially implemented by providing the FEATURES
call on top of PSCI 0.2 and returning 1.0 as the PSCI version.
We happily ignore everything else, as they are either optional or
are clarifications that do not require any additional
From: Marc Zyngier
commit 90348689d500 upstream.
For those CPUs that require PSCI to perform a BP invalidation,
going all the way to the PSCI code for not much is a waste of
precious cycles. Let's terminate that call as early as possible.
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
From: Marc Zyngier
commit 6167ec5c9145 upstream.
A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.
If the host has some mitigation for this issue, report that
we deal with it using SMCCC_A
From: Marc Zyngier
commit 09a8d6d48499 upstream.
In order to call into the firmware to apply workarounds, it is
useful to find out whether we're using HVC or SMC. Let's expose
this through the psci_ops.
Acked-by: Lorenzo Pieralisi
Reviewed-by: Robin Murphy
Tested-by: Ard Biesheuvel
Signed-of
From: Marc Zyngier
commit e78eef554a91 upstream.
Since PSCI 1.0 allows the SMCCC version to be (indirectly) probed,
let's do that at boot time, and expose the version of the calling
convention as part of the psci_ops structure.
Acked-by: Lorenzo Pieralisi
Reviewed-by: Robin Murphy
Tested-by:
From: Marc Zyngier
commit ded4c39e93f3 upstream.
Function identifiers are a 32bit, unsigned quantity. But we never
tell so to the compiler, resulting in the following:
4ac: b26187e0mov x0, #0x8001
We thus rely on the firmware narrowing it for us, which is not
always
From: Marc Zyngier
commit 3a0a397ff5ff upstream.
Now that we've standardised on SMCCC v1.1 to perform the branch
prediction invalidation, let's drop the previous band-aid.
If vendors haven't updated their firmware to do SMCCC 1.1, they
haven't updated PSCI either, so we don't loose anything.
Te
From: Marc Zyngier
** Not yet queued for inclusion in mainline **
In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB on CPUs that are known to be affected when taking
a prefetch abort on a address that is outside of a user task limit.
Signed-off-by: Marc Zyngier
S
From: Marc Zyngier
commit b092201e0020 upstream.
Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1.
It is lovely. Really.
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi
Conflicts:
From: Will Deacon
Provide some basic guidance about this branch, its layout and how we plan
to deploy changes in the future.
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi
---
SPECTRE-MELTDOWN-MITIGATIONS.README | 41 +
1 file changed, 41 insertions(+)
From: Marc Zyngier
** Not yet queued for inclusion in mainline **
In order to avoid aliasing attacks against the branch predictor,
Cortex-A15 require to invalidate the BTB when switching
from one user context to another. The only way to do so on this
CPU is to perform an ICIALLU, having set ACTL
From: Marc Zyngier
** Not yet queued for inclusion in mainline **
In order to avoid aliasing attacks against the branch predictor
on Cortex-A15, let's invalidate the BTB on guest exit, which can
only be done by invalidating the icache (with ACTLR[0] being set).
We use the same hack as for A12/A
From: Marc Zyngier
** Not yet queued for inclusion in mainline **
In order to avoid aliasing attacks against the branch predictor,
let's invalidate the BTB on guest exit. This is made complicated
by the fact that we cannot take a branch before invalidating the
BTB.
We only apply this to A12 and
On 25/02/2018 01:05, Linus Torvalds wrote:
> On Fri, Feb 23, 2018 at 5:46 PM, Paolo Bonzini wrote:
>>
>> git://git.kernel.org/pub/scm/virt/kvm/kvm.git tags/for-linus
>
> This has 28 fixes that were committed one hour before you sent this email.
>
> I pulled, but I think I'm going to unpull, ju
On Sat, Feb 24, 2018 at 1:15 AM, Florian Fainelli wrote:
> On 02/22/2018 07:45 AM, Arnd Bergmann wrote:
>
> Add blackfin to that list, there have been no responses from the
> maintainers last time I posted patches to remove DSA header files, so we
> had to go these through the networking tree. Hav
From: Marc Zyngier
** Not yet queued for inclusion in mainline **
In order to avoid aliasing attacks against the branch predictor,
some implementations require to invalidate the BTB when switching
from one user context to another.
For this, we reuse the existing implementation for Cortex-A8, an
From: Marc Zyngier
** Not yet queued for inclusion in mainline **
In order to prevent aliasing attacks on the branch predictor,
invalidate the icache on Cortex-A15, which has the side effect
of invalidating the BTB. This requires ACTLR[0] to be set to 1
(secure operation).
Signed-off-by: Marc Z
From: Marc Zyngier
commit f72af90c3783 upstream.
We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible.
So let's intercept it as early as we can by testing for the
function call number as soon as we've identified a HVC call
coming from the guest.
Tested-by: Ard Biesheuvel
Reviewed-by
From: Marc Zyngier
commit f2d3b2e8759a upstream.
One of the major improvement of SMCCC v1.1 is that it only clobbers
the first 4 registers, both on 32 and 64bit. This means that it
becomes very easy to provide an inline version of the SMC call
primitive, and avoid performing a function call to s
From: Will Deacon
commit 30d88c0e3ace upstream.
It is possible to take an IRQ from EL0 following a branch to a kernel
address in such a way that the IRQ is prioritised over the instruction
abort. Whilst an attacker would need to get the stars to align here,
it might be sufficient with enough cal
Hi Arnd, Kevin, Olof
PLease consider this first round of STi dts update for v4.17 :
The following changes since commit 7928b2cbe55b2a410a0f5c1f154610059c57b1b2:
Linux 4.16-rc1 (2018-02-11 15:04:29 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/gi
From: Will Deacon
commit 0a0d111d40fd upstream.
In order to invoke the CPU capability ->matches callback from the ->enable
callback for applying local-CPU workarounds, we need a handle on the
capability structure.
This patch passes a pointer to the capability structure to the ->enable
callback.
From: Will Deacon
commit d68e3ba5303f upstream.
Entry into recent versions of ARM Trusted Firmware will invalidate the CPU
branch predictor state in order to protect against aliasing attacks.
This patch exposes the PSCI "VERSION" function via psci_ops, so that it
can be invoked outside of the P
Hi Jaegeuk,
On 2018/2/25 17:29, Jaegeuk Kim wrote:
> On 02/11, Chao Yu wrote:
>> From: Chao Yu
>>
>> This patch adds a sysfs entry 'extension_list' to support lookup/
>> add/delete item in extension list.
>
> Hi Chao,
>
> We need Doc change as well.
Oh, right, let me add it.
Thanks,
>
> Tha
The RTC range validation code can be factored into rtc_valid_range()
function to avoid duplicate code.
Signed-off-by: Baolin Wang
---
drivers/rtc/interface.c | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/rtc/interface.c b/drivers/r
On Mon, Feb 26, 2018 at 12:54 AM, Robert Abel wrote:
> Signed-off-by: Robert Abel
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical peop
>From our investigation for all RTC drivers, 1 driver will be expired before
year 2017, 7 drivers will be expired before year 2038, 23 drivers will be
expired before year 2069, 72 drivers will be expired before 2100 and 104
drivers will be expired before 2106. Especially for these early expired
dri
For generic pins, parameter "arg" is 0 or 1.
For special pins, bias-disable is set by R0R1,
so we need transmited "00" to set bias-disable
When we set "bias-disable" as high-z property,
the parameter should be "MTK_PUPD_SET_R1R0_00".
Signed-off-by: Zhiyong Tao
---
drivers/pinctrl/mediatek/pinctr
We need use rtc->range_max to valid if the time values are valid,
and the time values are saved by time64_t type. So change the
rtc->range_max to time64_t type for comparison correctly.
Signed-off-by: Baolin Wang
---
include/linux/rtc.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
On Mon, Feb 26, 2018 at 12:54 AM, Robert Abel wrote:
> Signed-off-by: Robert Abel
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical peop
This series includes four patches:
1.Add mt2712 pintcrl head file
2.Add mt2712 pinctrl device node.
3.Add mt2712 pinctrl driver.
4.Support bias-disable of generic and special pins simultaneously
Changes in patch v2:
1)Separate patch4 for supporting bias-disable of generic and special pins.
2)GPIO1
The commit includes mt2712 pinctrl driver.
Signed-off-by: Zhiyong Tao
---
drivers/pinctrl/mediatek/Kconfig |7 +
drivers/pinctrl/mediatek/Makefile |1 +
drivers/pinctrl/mediatek/pinctrl-mt2712.c | 639
drivers/pinctrl/mediatek/pinctrl-mtk-mt2712.h |
This patch adds pinctrl file for mt2712.
Signed-off-by: Zhiyong Tao
---
arch/arm64/boot/dts/mediatek/mt2712-pinfunc.h | 1129 +
1 file changed, 1129 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-pinfunc.h
diff --git a/arch/arm64/boot/dts/mediatek/
From: Will Deacon
Rewritting from commit f71c2ffcb20d upstream. On LTS 4.9, there has no
raw_copy_from/to_user, neither __copy_user_flushcache, and it isn't good
idead to pick up them. The following is origin commit log, that's also
applicable for the new patch.
Like we've done for get_user
This patch adds pintcrl device node for mt2712.
Signed-off-by: Zhiyong Tao
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index d7688bc..f
From: Will Deacon
commit c2f0ad4fc089 upstream.
A mispredicted conditional call to set_fs could result in the wrong
addr_limit being forwarded under speculation to a subsequent access_ok
check, potentially forming part of a spectre-v1 attack using uaccess
routines.
This patch prevents this forw
On Mon, Feb 26, 2018 at 11:15:34AM +0300, Cyrill Gorcunov wrote:
> On Mon, Feb 26, 2018 at 11:02:56AM +0300, Kirill A. Shutemov wrote:
> ...
> > > Also, could do a puts() hexdump of the affected memory area _before_ we
> > > overwrite
> > > it? Is it empty? Could we add some debug warning that ch
From: Catalin Marinas
commit f33bcf03e6 upstream
This patch takes the errata workaround code out of cpu_do_switch_mm into
a dedicated post_ttbr0_update_workaround macro which will be reused in a
subsequent patch.
Cc: Will Deacon
Cc: James Morse
Cc: Kees Cook
Reviewed-by: Mark Rutland
Signed
Hi Tony,
I love your patch! Yet something to improve:
[auto build test ERROR on omap/for-next]
[also build test ERROR on v4.16-rc3 next-20180226]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits
From: Laura Abbott
commit 568c5fe5a54 upstream.
Certain architectures may have the kernel image mapped separately to
alias the linear map. Introduce a macro lm_alias to translate a kernel
image symbol into its linear alias. This is used in part with work to
add CONFIG_DEBUG_VIRTUAL support for a
On 02/25, Jeff Layton wrote:
>On Sun, 2018-02-25 at 23:05 +0800, kernel test robot wrote:
>> Greeting,
>>
>> FYI, we noticed a -18.0% regression of aim7.jobs-per-min due to commit:
>>
>>
>> commit: c0cef30e4ff0dc025f4a1660b8f0ba43ed58426e ("iversion: make
>> inode_cmp_iversion{+raw} return bool
I added a Atto U320 SCSI card into my HP Proliant DL585 (G1 despite the
G naming was not used then). I have not tried earlier kernels.
In dmesg there are actually two sets of BAR assignment failures, the
first bridge may or may not be related.
[0.353439] pci :00:03.0: BAR 15: no space f
On Sat, Feb 24, 2018 at 3:50 PM, Masahiro Yamada
wrote:
> As Documentation/kbuild/kconfig-language.txt notes, 'select' should be
> used with care - it forces a lower limit of another symbol, ignoring
> the dependency.
>
> MFD_SYSCON depends on HAS_IOMEM, but several drivers with COMPILE_TEST
> sel
Hi Stephen, Michael
It's a gentle reminder as this patch is present on mailing list and
acked-by since 01/12/2018
Thanks
Patrice
On 01/16/2018 01:30 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> STM32F769 has 2 SDMMC port, add clock entry for the second one.
>
> Signed-off-b
Hi,
On Sun, Feb 25, 2018 at 09:50:45PM +0800, hao_zhang wrote:
> This patch adds allwinner sun8i pwm binding documents.
>
> Signed-off-by: hao_zhang
> ---
> Documentation/devicetree/bindings/pwm/pwm-sun8i.txt | 18 ++
> 1 file changed, 18 insertions(+)
> create mode 100644 Docu
Hi Robert,
On Mon, Feb 26, 2018 at 12:54 AM, Robert Abel wrote:
> NUL-terminate each individual number to be parsed.
> To do this, the next command character and a pointer to its argument
> are found and stored. The command character is then overwritten by NUL
> before kstr* functions are called
Commit-ID: dfc9327ab7c99bc13e12106448615efba833886b
Gitweb: https://git.kernel.org/tip/dfc9327ab7c99bc13e12106448615efba833886b
Author: Juergen Gross
AuthorDate: Mon, 19 Feb 2018 11:09:04 +0100
Committer: Ingo Molnar
CommitDate: Mon, 26 Feb 2018 08:43:20 +0100
acpi: Introduce acpi_arch
* Kirill A. Shutemov wrote:
> > Also, could do a puts() hexdump of the affected memory area _before_ we
> > overwrite
> > it? Is it empty? Could we add some debug warning that checks that it's all
> > zeroes?
>
> The problem is that we don't really have a way get a message out of there.
Is
On Mon, Feb 26, 2018 at 07:32:03AM +0100, Christophe LEROY wrote:
> Le 25/02/2018 à 18:22, Mathieu Malaterre a écrit :
> >-#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) <
> >max_mapnr)
> >+#define pfn_valid(pfn) \
> >+(((pfn) - ARCH_PFN_OFFSET) < (max_mapnr - A
Hi Ben, Takashi,
The following comments from our Accessory BU hardware team FYI.
//
Most of dock audio is converted from USB if it is connected by cable, but CS13
Mechnical dock is not. We need to know the specific dock model first.
//
Thanks,
Peter Zhang \ 张福平, PMP
ThinkPad & ThinkStation Lin
Commit-ID: 038bac2b02989acf1fc938cedcb7944c02672b9f
Gitweb: https://git.kernel.org/tip/038bac2b02989acf1fc938cedcb7944c02672b9f
Author: Juergen Gross
AuthorDate: Mon, 19 Feb 2018 11:09:05 +0100
Committer: Ingo Molnar
CommitDate: Mon, 26 Feb 2018 08:43:20 +0100
x86/acpi: Add a new x86_i
Commit-ID: c46dacb75cd59a50a2380dcba5e7edf4fde86845
Gitweb: https://git.kernel.org/tip/c46dacb75cd59a50a2380dcba5e7edf4fde86845
Author: Juergen Gross
AuthorDate: Wed, 21 Feb 2018 10:42:32 +0100
Committer: Ingo Molnar
CommitDate: Mon, 26 Feb 2018 08:43:21 +0100
x86/boot: Make the x86_in
On Sun, Feb 25, 2018 at 09:51:34PM +0800, hao_zhang wrote:
> This patch adds pwm node for sun8i.
>
> Signed-off-by: hao_zhang
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi
> b/arch/arm/boot/dts/
Commit-ID: 672c0ae09b33a11d8f31fc61526632e96301164c
Gitweb: https://git.kernel.org/tip/672c0ae09b33a11d8f31fc61526632e96301164c
Author: Jan Beulich
AuthorDate: Fri, 23 Feb 2018 01:27:37 -0700
Committer: Ingo Molnar
CommitDate: Mon, 26 Feb 2018 08:43:21 +0100
x86/mm: Consider effective
Commit-ID: b17d9d1df3c33a4f1d2bf397e2257aecf9dc56d4
Gitweb: https://git.kernel.org/tip/b17d9d1df3c33a4f1d2bf397e2257aecf9dc56d4
Author: Juergen Gross
AuthorDate: Mon, 19 Feb 2018 11:09:06 +0100
Committer: Ingo Molnar
CommitDate: Mon, 26 Feb 2018 08:43:20 +0100
x86/xen: Add pvh specific
On Mon, Feb 26, 2018 at 11:37:09AM +0300, Kirill A. Shutemov wrote:
> On Mon, Feb 26, 2018 at 11:15:34AM +0300, Cyrill Gorcunov wrote:
> > On Mon, Feb 26, 2018 at 11:02:56AM +0300, Kirill A. Shutemov wrote:
> > ...
> > > > Also, could do a puts() hexdump of the affected memory area _before_ we
> >
From: Baegjae Sung
If multipathing is enabled, each NVMe subsystem creates a head
namespace (e.g., nvme0n1) and multiple private namespaces
(e.g., nvme0c0n1 and nvme0c1n1) in sysfs. When creating links for
private namespaces, links of head namespace are used, so the
namespace creation order must
On Mon, Feb 26, 2018 at 10:28:43AM +1000, Andrew Cooks wrote:
> Family 16h Model 30h SMBus controller needs the same port selection fix
> as described and fixed in commit 0fe16195f891 ("i2c: piix4: Fix SMBus port
> selection for AMD Family 17h chips")
>
> commit 6befa3fde65f ("i2c: piix4: Support
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