> -Original Message-
> From: Stephen Boyd [mailto:sb...@codeaurora.org]
> Sent: Wednesday, June 21, 2017 4:42 AM
> To: Dong Aisheng
> Cc: A.s. Dong; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; mturque...@bay
use.com; Andy Duan; ste...@agner.ch;
> Mingkai Hu; Y.b. Lu; nikita.yo...@cogentembedded.com;
> andy.shevche...@gmail.com; donga...@gmail.com; A.s. Dong
> Subject: [PATCH V4 0/7] tty: serial: lpuart: add imx7ulp support
>
> The lpuart in imx7ulp is basically the same as ls1021a. It&#x
Hi Abel,
The patch mostly looks good to me.
Only a few minor comments.
> -Original Message-
> From: Abel Vesa
> Sent: Wednesday, June 20, 2018 8:24 PM
> To: Lucas Stach ; A.s. Dong
>
> Cc: linux-g...@vger.kernel.org; dl-linux-imx ; Shawn
> Guo ; Pengutronix Kernel T
> -Original Message-
> From: Abel Vesa
> Sent: Wednesday, June 20, 2018 8:24 PM
> To: Lucas Stach ; A.s. Dong
>
> Cc: linux-g...@vger.kernel.org; dl-linux-imx ; Shawn
> Guo ; Pengutronix Kernel Team
> ; Linus Walleij ; Rob
> Herring ; Mark Rutland ;
> dev
; Rob Herring ;
> devicet...@vger.kernel.org; A.s. Dong ; Fabio
> Estevam ; Shawn Guo ;
> Stefan Agner ; Pengutronix Kernel Team
> ; Linus Walleij ; linux-
> ker...@vger.kernel.org
> Subject: Re: [RFC] Configure i.MX6 RGMII pad group control registers from
> device tree
>
&
Hi Alexandre,
> -Original Message-
> From: Alexandre Bailon [mailto:abai...@baylibre.com]
> Sent: Wednesday, August 8, 2018 6:01 PM
> To: A.s. Dong ; linux-...@vger.kernel.org;
> sb...@kernel.org
> Cc: Jacky Bai ; Anson Huang ;
> mturque...@baylibre.com; linux-kerne
Kindly ping again... This is really pending too long...
Stephen & Shawn,
Any suggestion on how to proceed this patch set?
Regards
Dong Aisheng
> -Original Message-
> From: A.s. Dong
> Sent: Thursday, July 26, 2018 9:51 AM
> To: linux-...@vger.kernel.org; sb...@kernel
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, August 28, 2018 9:53 AM
> To: linux-kernel@vger.kernel.org
> Cc: Linus Walleij ; A.s. Dong
> ; Fabio Estevam ; Shawn
> Guo ; Stefan Agner ; Pengutronix
> Kernel Team ; Sean W
> -Original Message-
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Wednesday, August 29, 2018 11:09 AM
> To: A.s. Dong
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com; shawn...@kernel.org; dl-linu
> -Original Message-
> From: Hans de Goede [mailto:hdego...@redhat.com]
> Sent: Wednesday, August 29, 2018 9:01 PM
[...]
> > @@ -252,39 +228,21 @@ static int simplefb_clocks_get(struct simplefb_par
> *par,
> > static void simplefb_clocks_enable(struct simplefb_par *par,
> >
Hi Stephen,
Do you have a chance to look at it?
This patch series has been pending for quite a long time without much comments.
Regards
Dong Aisheng
> -Original Message-
> From: A.s. Dong
> Sent: Wednesday, July 18, 2018 9:37 PM
> To: linux-...@vger.kernel.org
> C
> -Original Message-
> From: Jassi Brar [mailto:jassisinghb...@gmail.com]
> Sent: Thursday, July 26, 2018 5:42 PM
> To: Oleksij Rempel
> Cc: Shawn Guo ; Fabio Estevam
> ; Rob Herring ; Mark
> Rutland ; A.s. Dong ;
> Vladimir Zapolskiy ; Sudeep Holla
> ; Devic
> -Original Message-
> From: Jassi Brar [mailto:jassisinghb...@gmail.com]
> Sent: Thursday, July 26, 2018 7:37 PM
> To: A.s. Dong
> Cc: Oleksij Rempel ; Shawn Guo
> ; Fabio Estevam ; Rob
> Herring ; Mark Rutland ;
> Vladimir Zapolskiy ; Sudeep Holla
> ; Devic
Hi Jassi,
> -Original Message-
> From: Jassi Brar [mailto:jassisinghb...@gmail.com]
> Sent: Thursday, July 12, 2018 12:32 AM
> To: A.s. Dong
> Cc: Sascha Hauer ; linux-arm-
> ker...@lists.infradead.org; donga...@gmail.com; linux-
> ker...@vger.kernel.org; Oleksij Rem
Hi Jassi,
> -Original Message-
> From: Jassi Brar [mailto:jassisinghb...@gmail.com]
> Sent: Thursday, July 12, 2018 1:01 AM
> To: A.s. Dong
> Cc: Sascha Hauer ; linux-arm-
> ker...@lists.infradead.org; donga...@gmail.com; linux-
> ker...@vger.kernel.org; Oleksij Rem
> -Original Message-
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Thursday, July 12, 2018 4:07 PM
> To: adrian.hun...@intel.com; ulf.hans...@linaro.org
> Cc: Fabio Estevam ; Bough Chen
> ; A.s. Dong ; linux-
> m...@vger.kernel.org; linux-kernel@vger.ker
> -Original Message-
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Thursday, July 12, 2018 4:07 PM
> To: adrian.hun...@intel.com; ulf.hans...@linaro.org
> Cc: Fabio Estevam ; Bough Chen
> ; A.s. Dong ; linux-
> m...@vger.kernel.org; linux-kernel@vger.ker
il.com]
> Sent: Thursday, January 25, 2018 9:22 PM
> To: A.s. Dong
> Cc: linux-clk ; Jacky Bai ;
> Anson Huang ; Michael Turquette
> ; Stephen Boyd ; linux-
> kernel ; dl-linux-imx ;
> Fabio Estevam ; Shawn Guo
> ; moderated list:ARM/FREESCALE IMX / MXC ARM
> ARCHITECTUR
aylibre.com; shawn...@kernel.org;
> Anson Huang ; Jacky Bai ; dl-
> linux-imx ; Fabio Estevam ;
> A.s. Dong
> Subject: [PATCH V3 10/10] add imx7ulp support
>
> Signed-off-by: Dong Aisheng
>
I'm sorry that this one is for test and was sent out by accidently and should
not
Hi Linus,
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Tuesday, January 09, 2018 10:08 PM
>
> Stefan, would you consider making a patch adding you, Dong Aisheng and
> Shawn Guo as maintainers in MAINTAINERS for
> drivers/pinctrl/freescale/*
> D
> -Original Message-
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Tuesday, March 20, 2018 12:22 AM
> To: A.s. Dong ; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; dl-
> linux-imx ; aisheng.d...@codeauror
er by scu or by mmio using a non-default pad
> config. Increment the counter only if a new map was created.
>
> Fixes: b96eea718bf6 ("pinctrl: fsl: add scu based pinctrl support")
> Cc: A.s. Dong
> Signed-off-by: Martin Kaiser
Thanks for reporting this issue.
The origin
Hi Michael,
> -Original Message-
> From: Michael Turquette [mailto:mturque...@baylibre.com]
[...]
> Hi Dong,
>
> Quoting A.s. Dong (2018-10-21 06:10:48)
> > For dividers with zero indicating clock is disabled, instead of giving
> > a warning each time l
This patch series intends to add imx7ulp clk support.
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
The clocking scheme provides clear separation between M4 domain
and A
For dividers with zero indicating clock is disabled, instead of giving a
warning each time like "clkx: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not
set" in exist code, we'd like to introduce enable/disable function for it.
e.g.
000b - Clock disabled
001b - Divide by 1
010b - Divide by 2
...
Set rat
As the commit 2893c379461a ("clk: make strings in parent name arrays
const"), let's make the parent strings const, otherwise we may meet
the following warning when compiling:
drivers/clk/imx/clk-imx7ulp.c: In function 'imx7ulp_clocks_init':
drivers/clk/imx/clk-imx7ulp.c:73:35: warning: passing arg
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and
denominator value in register are start from 0.
This can be used to support frac dividers like below:
Divider output clock = Divider input clock x [(frac +1) / (div +1)]
where frac/div in register is:
000b - Divide by 1.
001b -
pllv4 is designed for System Clock Generation (SCG) module observed
in IMX ULP SoC series. e.g. i.MX7ULP.
The SCG modules generates clock used to derive processor, system,
peripheral bus and external memory interface clocks while this patch
intends to support the PLL part.
Cc: Stephen Boyd
Cc: M
The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System
Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP.
NOTE pfdv2 can only be operated when clk is gated.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Don
The imx composite clk is designed for Peripheral Clock Control (PCC)
module observed in IMX ULP SoC series.
NOTE pcc can only be operated when clk is gated.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Dong Aisheng
---
ChangeLog:
v4->v5:
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
The clocking scheme provides clear separation between M4 domain
and A7 domain. Except for a few clock sources shared between
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
Note IMX7ULP has two clock domains: M4 and A7. This binding doc
is only for A7 clock domain.
Cc: Rob Herring
Cc: Mark Rutl
Clock providers are recommended to use the new struct clk_hw based API,
so implement IMX clk_hw based provider helpers functions to the new
approach.
Signed-off-by: Dong Aisheng
---
ChangeLog:
v2->v4:
* no changes
v1->v2: new patches
---
drivers/clk/imx/clk.c | 22 ++
drivers/
For dividers with zero indicating clock is disabled, instead of giving a
warning each time like "clkx: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not
set" in exist code, we'd like to introduce enable/disable function for it.
e.g.
000b - Clock disabled
001b - Divide by 1
010b - Divide by 2
...
Set rat
This patch series intends to add imx7ulp clk support.
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
The clocking scheme provides clear separation between M4 domain
and A
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
The clocking scheme provides clear separation between M4 domain
and A7 domain. Except for a few clock sources shared between
The imx composite clk is designed for Peripheral Clock Control (PCC)
module observed in IMX ULP SoC series.
NOTE pcc can only be operated when clk is gated.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Dong Aisheng
---
ChangeLog:
v4->v5:
As the commit 2893c379461a ("clk: make strings in parent name arrays
const"), let's make the parent strings const, otherwise we may meet
the following warning when compiling:
drivers/clk/imx/clk-imx7ulp.c: In function 'imx7ulp_clocks_init':
drivers/clk/imx/clk-imx7ulp.c:73:35: warning: passing arg
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
Note IMX7ULP has two clock domains: M4 and A7. This binding doc
is only for A7 clock domain.
Cc: Rob Herring
Cc: Mark Rutl
pllv4 is designed for System Clock Generation (SCG) module observed
in IMX ULP SoC series. e.g. i.MX7ULP.
The SCG modules generates clock used to derive processor, system,
peripheral bus and external memory interface clocks while this patch
intends to support the PLL part.
Cc: Stephen Boyd
Cc: M
Clock providers are recommended to use the new struct clk_hw based API,
so implement IMX clk_hw based provider helpers functions to the new
approach.
Signed-off-by: Dong Aisheng
---
ChangeLog:
v2->v4:
* no changes
v1->v2: new patches
---
drivers/clk/imx/clk.c | 22 ++
drivers/
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and
denominator value in register are start from 0.
This can be used to support frac dividers like below:
Divider output clock = Divider input clock x [(frac +1) / (div +1)]
where frac/div in register is:
000b - Divide by 1.
001b -
The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System
Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP.
NOTE pfdv2 can only be operated when clk is gated.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Don
Hi Stephen,
[...]
> > I already sent the 12th version of this current patch series and I
> > would really like to get this in ASAP so that the booting up of imx8mq will
> not be delayed.
> >
>
> Ok. Well we're in rc1 right now, and so we're not merging new drivers into
> mainline. I can merge the
Hi Sascha,
> -Original Message-
> From: Sascha Hauer [mailto:s.ha...@pengutronix.de]
> Sent: Tuesday, July 10, 2018 10:20 PM
> To: A.s. Dong
> Cc: linux-arm-ker...@lists.infradead.org; donga...@gmail.com; Jassi Brar
> ; linux-kernel@vger.kernel.org; Oleksij Rempe
> -Original Message-
> From: Sascha Hauer [mailto:s.ha...@pengutronix.de]
> Sent: Wednesday, July 11, 2018 3:55 PM
> To: A.s. Dong
> Cc: linux-arm-ker...@lists.infradead.org; donga...@gmail.com; Jassi Brar
> ; linux-kernel@vger.kernel.org; Oleksij Rempel
> ;
Hi Jassi,
> -Original Message-
> From: Jassi Brar [mailto:jassisinghb...@gmail.com]
> Sent: Wednesday, July 11, 2018 6:44 PM
> To: A.s. Dong
> Cc: Sascha Hauer ; linux-arm-
> ker...@lists.infradead.org; donga...@gmail.com; linux-
> ker...@vger.kernel.org; Oleksij Rem
Hi Stephen,
> -Original Message-
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Saturday, March 24, 2018 12:53 AM
> To: A.s. Dong ; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com; h
> -Original Message-
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Saturday, March 24, 2018 12:57 AM
> To: A.s. Dong ; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com; hdego...@redha
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Friday, March 23, 2018 2:49 PM
> To: A.s. Dong
> Cc: kbuild-...@01.org; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque..
Ping
> -Original Message-
> From: A.s. Dong
> Sent: Friday, May 25, 2018 6:37 PM
> To: linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@kernel.org; mturque...@baylibre.com; shawn...@kernel.org; dl-
>
> -Original Message-
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Wednesday, July 4, 2018 11:08 PM
> To: adrian.hun...@intel.com; ulf.hans...@linaro.org
> Cc: Fabio Estevam ; Bough Chen
> ; A.s. Dong ;
> mich...@amarulasolutions.com; rmk+ker...@armlin
> -Original Message-
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Thursday, June 28, 2018 4:13 PM
> To: adrian.hun...@intel.com; ulf.hans...@linaro.org
> Cc: Fabio Estevam ; Bough Chen
> ; A.s. Dong ;
> mich...@amarulasolutions.com; rmk+ker...@armlin
Hi Stephen,
Do you want me to resend this series for review?
It seems have been pending for quite a long time.
Thor just pinged me for its status as he wants to use it.
Regards
Dong Aisheng
> -Original Message-
> From: A.s. Dong
> Sent: Wednesday, June 20, 2018 10:54 AM
&g
Hi Leonard,
> -Original Message-
> From: Leonard Crestez
> Sent: Monday, October 15, 2018 9:28 PM
[...]
> Subject: [PATCH v2 0/4] Port mxs-dcp to imx6ull and imx6sll
>
> The DCP block is present on 6sll and 6ull but not enabled. The hardware is
> mostly compatible with 6sl, the only im
Gently Ping...
> -Original Message-
> From: A.s. Dong
> Sent: Sunday, October 21, 2018 9:15 PM
> To: sb...@kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com; shawn...@kernel.org; Anson Huang
> ; Jac
> -Original Message-
> From: Leonard Crestez
> Sent: Tuesday, November 6, 2018 11:34 PM
[...]
>
> On Tue, 2018-11-06 at 15:30 +, A.s. Dong wrote:
> > Gently Ping...
>
> > drivers/clk/imx/clk-composite.c| 85 +
>
> Du
Ping
> -Original Message-
> From: A.s. Dong
> Sent: Tuesday, September 25, 2018 5:11 PM
> To: sb...@kernel.org; shawn...@kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com; Anson Huang ; Jacky Bai
> ; d
Ping
> -Original Message-
> From: A.s. Dong
> Sent: Monday, October 8, 2018 6:43 PM
> To: thor.tha...@linux.intel.com; linux-...@vger.kernel.org; sb...@kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> mturque...@baylibre.com; shawn
> > diff --git a/MAINTAINERS b/MAINTAINERS index 9ad052a..d1fb824 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -1462,6 +1462,7 @@ F:arch/arm/mach-mxs/
> > F: arch/arm/boot/dts/imx*
> > F: arch/arm/configs/imx*_defconfig
> > F: drivers/clk/imx/
> > +F: drivers/firmware/imx/
>
>
Hi Stephen,
Gently ping again..
> > >
> > Just checking on the status of this patch. The clock routines (patches
> > 1-3) are useful for one of my drivers but if they aren't accepted or
> > will take a long time to be accepted, I'll need to refactor my driver.
> >
>
> Thanks for this information
This is a rebased version of below patch series against latest clk tree.
[PATCH RESEND V3 0/9] clk: add imx7ulp clk support
https://lkml.org/lkml/2018/3/16/310
It only updates the license to SPDX format as well as a minor fix of
pllv4.
This patch series intends to add imx7ulp clk support.
i.MX7U
For dividers with zero indicating clock is disabled, instead of giving a
warning each time like "clkx: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not
set" in exist code, we'd like to introduce enable/disable function for it.
e.g.
000b - Clock disabled
001b - Divide by 1
010b - Divide by 2
...
Set rat
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
The clocking scheme provides clear separation between M4 domain
and A7 domain. Except for a few clock sources shared between
Clock providers are recommended to use the new struct clk_hw based API,
so implement IMX clk_hw based provider helpers functions to the new
approach.
Signed-off-by: Dong Aisheng
---
ChangeLog:
v2->v4:
* no changes
v1->v2: new patches
---
drivers/clk/imx/clk.c | 22 ++
drivers/
The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System
Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP.
NOTE pfdv2 can only be operated when clk is gated.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Don
As the commit 2893c379461a ("clk: make strings in parent name arrays
const"), let's make the parent strings const, otherwise we may meet
the following warning when compiling:
drivers/clk/imx/clk-imx7ulp.c: In function 'imx7ulp_clocks_init':
drivers/clk/imx/clk-imx7ulp.c:73:35: warning: passing arg
pllv4 is designed for System Clock Generation (SCG) module observed
in IMX ULP SoC series. e.g. i.MX7ULP.
The SCG modules generates clock used to derive processor, system,
peripheral bus and external memory interface clocks while this patch
intends to support the PLL part.
Cc: Stephen Boyd
Cc: M
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and
denominator value in register are start from 0.
This can be used to support frac dividers like below:
Divider output clock = Divider input clock x [(frac +1) / (div +1)]
where frac/div in register is:
000b - Divide by 1.
001b -
The imx composite clk is designed for Peripheral Clock Control (PCC)
module observed in IMX ULP SoC series. e.g. i.MX7ULP.
NOTE pcc can only be operated when clk is gated.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Dong Aisheng
---
Chan
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocks
Note IMX7ULP has two clock domains: M4 and A7. This binding doc
is only for A7 clock domain.
Cc: Rob Herring
Cc: Mark Rutl
sheng
> -Original Message-
> From: A.s. Dong
> Sent: Sunday, October 21, 2018 9:11 PM
> To: linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@kernel.org; mturque...@baylibre.com; shawn...@kernel.org; Anson
> Huang
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, October 23, 2018 6:17 AM
[...]
>
> On Sun, Oct 21, 2018 at 01:11:09PM +, A.s. Dong wrote:
> > i.MX7ULP Clock functions are under joint control of the System Clock
> &g
Ping again
> -Original Message-
> From: A.s. Dong
> Sent: Thursday, September 6, 2018 11:23 AM
> To: linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@kernel.org; mturque...@baylibre.com; shawn...@kern
It's been a few months without comments.
Shawn & Stephen,
Would you provide some suggestions on how to handle this?
Regards
Dong Aisheng
> -Original Message-----
> From: A.s. Dong
> Sent: Thursday, September 6, 2018 11:25 AM
> To: linux-...@vger.kernel.org; sb
Gently ping...
> -Original Message-
> From: A.s. Dong
> Sent: Friday, August 31, 2018 12:46 PM
> To: linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@kernel.org; mturque...@baylibre.com; shawn...@kern
Hi Stephen,
Would you shine some lights on how to proceed?
Regards
Dong Aisheng
> -Original Message-
> From: A.s. Dong
> Sent: Monday, August 27, 2018 11:46 AM
> To: linux-...@vger.kernel.org; sb...@kernel.org; shawn...@kernel.org
> Cc: linux-kernel@vger.kernel.org
> -Original Message-
> From: Thor Thayer [mailto:thor.tha...@linux.intel.com]
> Sent: Wednesday, September 19, 2018 10:47 PM
> To: A.s. Dong ; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@kernel.org; mturq
> -Original Message-
> From: Anson Huang [mailto:anson.hu...@nxp.com]
> Sent: Friday, March 16, 2018 4:55 PM
> To: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
> ; robh...@kernel.org; mark.rutl...@arm.com;
> li...@armlinux.org.uk
> Cc: dl-linux-imx ; linux-arm-ker...@lists.infr
x-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@codeaurora.org; mturque...@baylibre.com; shawn...@kernel.org;
> Anson Huang ; Jacky Bai ; A.s.
> Dong
> Subject: [PATCH RESEND V3 0/9] clk: add imx7ulp clk support
>
> This is a resend patch series.
> See
> -Original Message-
> From: Anson Huang
> Sent: Thursday, April 19, 2018 2:05 PM
> To: daniel.lezc...@linaro.org; t...@linutronix.de; linux-
> ker...@vger.kernel.org
> Cc: dl-linux-imx
> Subject: [PATCH] clocksource: imx-tpm: correct -ETIME return condition
> check
>
> The additional bra
> -Original Message-
> From: Dong Aisheng [mailto:aisheng.d...@nxp.com]
> Sent: Friday, April 14, 2017 10:31 PM
> To: linux-kernel@vger.kernel.org
> Cc: A.S. Dong; Rob Herring; Mark Rutland; devicet...@vger.kernel.org
> Subject: [PATCH v2 1/2] dt-binding: regulator: anat
Hi Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@kernel.org]
> Sent: Wednesday, April 12, 2017 4:37 AM
> To: A.S. Dong
> Cc: Liam Girdwood; linux-kernel@vger.kernel.org; shawn...@kernel.org;
> Robin Gong
> Subject: Re: [PATCH] regulator: core: Allow
> -Original Message-
> From: Jonathan Cameron [mailto:jonathan.came...@huawei.com]
> Sent: Wednesday, July 05, 2017 4:24 PM
> To: A.s. Dong
> Cc: linux-kernel@vger.kernel.org; Jacky Bai; Anson Huang;
> daniel.lezc...@linaro.org; ker...@pengutronix.de; t...@linu
..@linutronix.de; shawn...@kernel.org; Jacky Bai; Anson Huang;
> donga...@gmail.com; ker...@pengutronix.de; A.s. Dong
> Subject: [PATCH V4 0/2] timer: add imx tpm timer support
>
> The Timer/PWM Module (TPM) supports input capture, output compare, and the
> generation of PWM signa
Hi Stefan,
> -Original Message-
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Monday, February 12, 2018 11:06 PM
> To: linus.wall...@linaro.org; A.s. Dong ; Fabio
> Estevam ; shawn...@kernel.org;
> ker...@pengutronix.de
> Cc: linux-arm-ker...@lists.infrad
> -Original Message-
> From: Colin King [mailto:colin.k...@canonical.com]
> Sent: Monday, February 26, 2018 8:04 PM
> To: A.s. Dong ; Fabio Estevam
> ; Shawn Guo ; Stefan
> Agner ; inus Walleij ; linux-
> g...@vger.kernel.org
> Cc: kernel-janit...@vger.
> -Original Message-
> From: Anson Huang [mailto:anson.hu...@nxp.com]
> Sent: Saturday, February 24, 2018 4:03 PM
> To: rui.zh...@intel.com; edubez...@gmail.com; robh...@kernel.org;
> mark.rutl...@arm.com; shawn...@kernel.org; ker...@pengutronix.de;
> Fabio Estevam ; li...@armlinux.org.uk
>
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Wednesday, December 27, 2017 10:32 AM
> To: Peng Fan
> Cc: A.s. Dong ; linux-kernel@vger.kernel.org; Russell
> King ; Fabio Estevam ;
> Sascha Hauer ; van.free...@gmail.com; linux-arm-
> ke
> -Original Message-
> From: Leonard Crestez [mailto:leonard.cres...@nxp.com]
> Sent: Monday, August 28, 2017 7:05 PM
> To: Shawn Guo; Viresh Kumar; Rafael J. Wysocki
> Cc: Anson Huang; Fabio Estevam; A.s. Dong; Lucas Stach; Jacky Bai;
> ker...@pengutronix.de; linux.
> -Original Message-
> From: A.s. Dong
> Sent: Wednesday, July 26, 2017 10:57 AM
> To: A.s. Dong; linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> sb...@codeaurora.org; mturque...@baylibre.com; donga...@gmail.com;
>
Hi Stephen,
> -Original Message-
> From: Dong Aisheng [mailto:donga...@gmail.com]
> Sent: Tuesday, June 20, 2017 5:08 PM
> To: Stephen Boyd
> Cc: A.s. Dong; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; mturque...@bay
Hi Andy,
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Sunday, May 28, 2017 8:04 AM
> To: A.S. Dong
> Cc: linux-ser...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm
> Mailing List; Greg Kroah-Hartman; Jiri Slaby; Andy
> -Original Message-
> From: Nikita Yushchenko [mailto:nikita.yo...@cogentembedded.com]
> Sent: Wednesday, May 17, 2017 1:44 PM
> To: Dong Aisheng
> Cc: A.S. Dong; linux-ser...@vger.kernel.org; Andy Duan;
> gre...@linuxfoundation.org; Y.B. Lu; linux-kernel@vger
Hi Andy,
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Saturday, June 03, 2017 1:11 AM
> To: A.S. Dong
> Cc: linux-ser...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm
> Mailing List; Greg Kroah-Hartman; Jiri Slaby;
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Friday, June 09, 2017 5:26 PM
> To: A.S. Dong
> Cc: linux-ser...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm
> Mailing List; Greg Kroah-Hartman; Jiri Slaby; Andy
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Friday, June 09, 2017 11:49 PM
> To: A.S. Dong
> Cc: linux-ser...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm
> Mailing List; Greg Kroah-Hartman; Jiri Slaby; Andy
> -Original Message-
> From: Andy Duan
> Sent: Tuesday, June 13, 2017 11:09 AM
> To: A.s. Dong; linux-ser...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> gre...@linuxfoundation.org; jsl...@suse.com; ste...@agner.ch; Min
> -Original Message-
> From: Andy Duan
> Sent: Tuesday, June 13, 2017 11:02 AM
> To: A.s. Dong; linux-ser...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> gre...@linuxfoundation.org; jsl...@suse.com; ste...@agner.ch; Min
> -Original Message-
> From: Leonard Crestez [mailto:leonard.cres...@nxp.com]
> Sent: Tuesday, May 02, 2017 10:46 PM
> To: Shawn Guo
> Cc: Leonard Crestez; Sascha Hauer; Jagan Teki; Fabio Estevam; Dong Aisheng;
> linux-arm-ker...@lists.infradead.org; linux...@vger.kernel.org; linux-
> ker..
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