On Mon, 2018-04-30 at 11:59 -0600, Toshi Kani wrote:
> ioremap() supports pmd mappings on x86-PAE. However, kernel's pmd
> tables are not shared among processes on x86-PAE. Therefore, any
> update to sync'd pmd entries need re-syncing. Freeing a pte page
> also leads to a vmalloc fault and hits
On Fri, 2018-04-27 at 08:28 +0200, Ingo Molnar wrote:
> * Kani, Toshi <toshi.k...@hpe.com> wrote:
>
> > On Thu, 2018-04-26 at 17:14 +0200, Joerg Roedel wrote:
> > > From: Joerg Roedel <jroe...@suse.de>
> > >
> > > This reve
On Fri, 2018-04-27 at 09:37 +0200, j...@8bytes.org wrote:
> On Thu, Apr 26, 2018 at 10:30:14PM +0000, Kani, Toshi wrote:
> > Thanks for the clarification. After reading through SDM one more time, I
> > agree that we need a TLB purge here. Here is my current understanding.
>
On Thu, 2018-05-17 at 08:47 +0200, Michal Hocko wrote:
> On Wed 16-05-18 17:32:06, Kani Toshimitsu wrote:
> > From: Chintan Pandya
> >
> > This patch ("mm/vmalloc: Add interfaces to free unmapped
> > page table") adds following 2 interfaces to free the page
> > table in
On Wed, 2018-05-16 at 19:00 +0800, kbuild test robot wrote:
> Hi Toshi,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on arm64/for-next/core]
> [also build test ERROR on v4.17-rc5 next-20180515]
> [cannot apply to tip/x86/core]
> [if your patch is applied to
On Tue, 2018-05-15 at 16:05 +0200, Joerg Roedel wrote:
> On Mon, Apr 30, 2018 at 11:59:24AM -0600, Toshi Kani wrote:
> > int pud_free_pmd_page(pud_t *pud, unsigned long addr)
> > {
> > - pmd_t *pmd;
> > + pmd_t *pmd, *pmd_sv;
> > + pte_t *pte;
> > int i;
> >
> > if
On Wed, 2018-05-23 at 15:01 +0100, Will Deacon wrote:
> Hi Chintan,
>
> [as a side note: I'm confused on the status of this patch series, as part
> of it was reposted separately by Toshi. Please can you work together?]
I do not know the status of my patch series, either... That being said,
I
On Wed, 2018-05-30 at 06:59 +0200, j...@8bytes.org wrote:
> On Tue, May 29, 2018 at 04:10:24PM +0000, Kani, Toshi wrote:
> > Can you explain why you think allocating a page here is a major problem?
>
> Because a larger allocation is more likely to fail. And if you fail the
> al
On Tue, 2018-05-29 at 16:44 +0200, Joerg Roedel wrote:
> On Wed, May 16, 2018 at 05:32:07PM -0600, Toshi Kani wrote:
> > pmd = (pmd_t *)pud_page_vaddr(*pud);
> > + pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
> > + if (!pmd_sv)
> > + return 0;
>
> So your code still needs to
this patch breaks the current ioremap() callers using
2MB mappings by failing pmd_free_pte_page().
2. Add a special page list, instead of memory alloc, in patch 3/3
Quoting his concerns about the memory allocation:
===
On Tue, May 29, 2018 at 04:10:24PM +, Kani, Toshi wrote:
> Can you expl
On Wed, 2018-06-27 at 16:56 +0100, Will Deacon wrote:
> Hi Toshi,
>
> On Wed, Jun 27, 2018 at 08:13:47AM -0600, Toshi Kani wrote:
> > From: Chintan Pandya
> >
> > The following kernel panic was observed on ARM64 platform due to a stale
> > TLB entry.
> >
> > 1. ioremap with 4K size, a valid
On Sun, 2018-06-24 at 15:19 +0200, Thomas Gleixner wrote:
> On Wed, 16 May 2018, Toshi Kani wrote:
>
> > This series fixes two issues in the x86 ioremap free page handlings
> > for pud/pmd mappings.
> >
> > Patch 01 fixes BUG_ON on x86-PAE reported by Joerg. It disables
> > the free page
On Mon, 2018-06-25 at 19:53 +0200, Michal Hocko wrote:
> On Mon 25-06-18 14:56:26, Kani Toshimitsu wrote:
> > On Sun, 2018-06-24 at 15:19 +0200, Thomas Gleixner wrote:
> > > On Wed, 16 May 2018, Toshi Kani wrote:
> > >
> > > > This series fixes two issues in the x86 ioremap free page handlings
>
On Tue, 2018-06-26 at 15:13 -0400, Mike Snitzer wrote:
> On Tue, Jun 26 2018 at 3:07pm -0400,
> Dan Williams wrote:
>
> > On Tue, Jun 26, 2018 at 11:58 AM, Mike Snitzer wrote:
> > > On Tue, Jun 26 2018 at 2:52pm -0400,
> > > Dan Williams wrote:
> > >
> > > > On Tue, Jun 26, 2018 at 10:59
On Thu, 2018-04-26 at 17:14 +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> This reverts commit 28ee90fe6048fa7b7ceaeb8831c0e4e454a4cf89.
>
> This commit is broken for x86, as it unmaps the PTE and PMD
> pages and immediatly frees them without doing a TLB flush.
>
>
On Thu, 2018-04-26 at 19:23 +0200, j...@8bytes.org wrote:
> On Thu, Apr 26, 2018 at 04:21:19PM +0000, Kani, Toshi wrote:
> > All pages under the pmd had been unmapped and then lazy TLB purged with
> > INVLPG before coming to this code path. Speculation is not allowed to
> >
On Thu, 2018-04-26 at 16:19 +0200, Joerg Roedel wrote:
> Hi Toshi, Andrew,
>
> this patch(-set) is broken in several ways, please see below.
>
> On Wed, Mar 14, 2018 at 12:01:55PM -0600, Toshi Kani wrote:
> > Implement pud_free_pmd_page() and pmd_free_pte_page() on x86, which
> > clear a given
On Thu, 2018-04-26 at 22:07 +0200, j...@8bytes.org wrote:
> On Thu, Apr 26, 2018 at 05:49:58PM +0000, Kani, Toshi wrote:
> > On Thu, 2018-04-26 at 19:23 +0200, j...@8bytes.org wrote:
> > > So the PMD entry you clear can still be in a page-walk cache and this
> > > nee
On Mon, 2018-04-30 at 13:00 +0530, Chintan Pandya wrote:
>
> On 4/29/2018 2:24 AM, Kani, Toshi wrote:
> > On Sat, 2018-04-28 at 11:02 +0200, j...@8bytes.org wrote:
> > > On Fri, Apr 27, 2018 at 02:31:51PM +, Kani, Toshi wrote:
> > > > So, we can ad
On Sat, 2018-04-28 at 11:02 +0200, j...@8bytes.org wrote:
> On Fri, Apr 27, 2018 at 02:31:51PM +0000, Kani, Toshi wrote:
> > So, we can add the step 2 on top of this patch.
> > 1. Clear pud/pmd entry.
> > 2. System wide TLB flush <-- TO BE ADDED BY NEW PATCH
> > 3
On Thu, 2017-12-28 at 19:24 +0800, Hanjun Guo wrote:
> From: Hanjun Guo
>
> When we using iounmap() to free the 4K mapping, it just clear the PTEs
> but leave P4D/PUD/PMD unchanged, also will not free the memory of page
> tables.
>
> This will cause issues on ARM64
On Sat, 2018-01-06 at 17:46 +0800, Hanjun Guo wrote:
> On 2018/1/6 6:15, Kani, Toshi wrote:
> > On Thu, 2017-12-28 at 19:24 +0800, Hanjun Guo wrote:
> > > From: Hanjun Guo <hanjun@linaro.org>
> > >
> > > When we using iounmap() to free the 4K mappi
On Fri, 2018-02-02 at 12:31 -0800, Dan Williams wrote:
> On Fri, Feb 2, 2018 at 1:00 PM, Toshi Kani wrote:
> > A NULL pointer reference kernel bug was observed when
> > acpi_nfit_add_dimm() called in acpi_nfit_register_dimms()
> > failed. This error path does not set
On Tue, 2018-02-20 at 14:54 +0530, Chintan Pandya wrote:
>
> On 12/28/2017 4:54 PM, Hanjun Guo wrote:
> > From: Hanjun Guo
> >
> > When we using iounmap() to free the 4K mapping, it just clear the PTEs
> > but leave P4D/PUD/PMD unchanged, also will not free the memory of
On Thu, 2018-08-30 at 18:37 +, Fan Wu wrote:
> For platforms whose firmwares provide valid module handles
> (SMBIOS type 17) in error records, this patch uses the module
> handles to locate corresponding DIMMs and enables per-DIMM
> error counter update.
>
> Signed-off-by: Fan Wu
Tested on
On Wed, 2018-03-07 at 14:54 -0800, Andrew Morton wrote:
> On Wed, 7 Mar 2018 11:32:26 -0700 Toshi Kani wrote:
>
> > On architectures with CONFIG_HAVE_ARCH_HUGE_VMAP set, ioremap()
> > may create pud/pmd mappings. Kernel panic was observed on arm64
> > systems with
On Wed, 2018-03-07 at 15:01 -0800, Andrew Morton wrote:
> On Wed, 7 Mar 2018 11:32:27 -0700 Toshi Kani wrote:
>
> > Implement pud_free_pmd_page() and pmd_free_pte_page() on x86, which
> > clear a given pud/pmd entry and free up lower level page table(s).
> > Address range
On Mon, 2018-02-26 at 20:53 +0800, Hanjun Guo wrote:
> On 2018/2/26 19:04, Will Deacon wrote:
> > On Mon, Feb 26, 2018 at 06:57:20PM +0800, Hanjun Guo wrote:
> > > On 2018/2/21 19:57, Will Deacon wrote:
> > > > [sorry, trying to deal with top-posting here]
> > > >
> > > > On Wed, Feb 21, 2018 at
On Tue, 2018-02-27 at 19:59 +, Will Deacon wrote:
> On Tue, Feb 27, 2018 at 07:49:42PM +0000, Kani, Toshi wrote:
> > On Mon, 2018-02-26 at 20:53 +0800, Hanjun Guo wrote:
> > > On 2018/2/26 19:04, Will Deacon wrote:
> > > > On Mon, Feb 26, 2018 at 06:5
On Thu, 2018-03-15 at 18:15 +0530, Chintan Pandya wrote:
> Huge mapping changes PMD/PUD which could have
> valid previous entries. This requires proper
> TLB maintanance on some architectures, like
> ARM64.
>
> Implent BBM (break-before-make) safe TLB
> invalidation.
>
> Here, I've used
On Thu, 2018-03-08 at 22:38 +, Andy Lutomirski wrote:
> On Thu, Mar 8, 2018 at 9:43 PM, Kani, Toshi <toshi.k...@hpe.com> wrote:
> > On Thu, 2018-03-08 at 14:34 -0600, Gratian Crisan wrote:
:
> >
> > Thanks for the report and analysis! I believe pud_large() and
On Thu, 2018-03-08 at 18:04 +, Will Deacon wrote:
:
> > diff --git a/lib/ioremap.c b/lib/ioremap.c
> > index b808a390e4c3..54e5bbaa3200 100644
> > --- a/lib/ioremap.c
> > +++ b/lib/ioremap.c
> > @@ -91,7 +91,8 @@ static inline int ioremap_pmd_range(pud_t *pud, unsigned
> > long addr,
> >
>
On Thu, 2018-03-08 at 14:34 -0600, Gratian Crisan wrote:
> Hi all,
>
> We are seeing kernel page faults happening on module loads with certain
> drivers like the i915 video driver[1]. This was initially discovered on
> a 4.9 PREEMPT_RT kernel. It takes 5 days on average to reproduce using a
>
On Wed, 2018-03-14 at 15:38 -0700, Andrew Morton wrote:
> On Wed, 14 Mar 2018 12:01:54 -0600 Toshi Kani wrote:
:
>
> whoops.
>
> ---
> a/include/asm-generic/pgtable.h~mm-vmalloc-add-interfaces-to-free-unmapped-page-table-fix
> +++ a/include/asm-generic/pgtable.h
> @@
On Thu, 2018-03-15 at 12:47 +0530, Chintan Pandya wrote:
>
> On 3/14/2018 8:08 PM, Kani, Toshi wrote:
> > On Wed, 2018-03-14 at 14:18 +0530, Chintan Pandya wrote:
> > > Note: I was working on these patches for quite sometime
> > > and realized that Tosh
On Thu, 2018-03-15 at 13:09 +0530, Chintan Pandya wrote:
>
> On 3/14/2018 11:31 PM, Toshi Kani wrote:
> > Implement pud_free_pmd_page() and pmd_free_pte_page() on x86, which
> > clear a given pud/pmd entry and free up lower level page table(s).
> > Address range associated with the pud/pmd entry
On Thu, 2018-03-08 at 14:07 -0800, Matthew Wilcox wrote:
> On Thu, Mar 08, 2018 at 03:56:30PM +0000, Kani, Toshi wrote:
> > On Wed, 2018-03-07 at 20:00 -0800, Matthew Wilcox wrote:
> > > On Wed, Mar 07, 2018 at 11:32:26AM -0700, Toshi Kani wrote:
> > > > +/**
> &g
On Wed, 2018-03-07 at 20:00 -0800, Matthew Wilcox wrote:
> On Wed, Mar 07, 2018 at 11:32:26AM -0700, Toshi Kani wrote:
> > +/**
> > + * pud_free_pmd_page - clear pud entry and free pmd page
> > + *
> > + * Returns 1 on success and 0 on failure (pud not cleared).
> > + */
> > +int
On Wed, 2018-03-14 at 14:18 +0530, Chintan Pandya wrote:
> Note: I was working on these patches for quite sometime
> and realized that Toshi Kani has shared some patches
> addressing the same isssue with subject
> "[PATCH 0/2] fix memory leak / panic in ioremap huge pages".
> I've taken slightly
On Wed, 2018-03-14 at 20:27 +0100, Thomas Gleixner wrote:
> On Tue, 13 Mar 2018, Toshi Kani wrote:
>
> > vmalloc_fault() sets user's pgd or p4d from the kernel page table.
> > Once it's set, all tables underneath are identical. There is no point
> > of following the same page table with two
On Wed, 2018-03-14 at 20:56 +0100, Thomas Gleixner wrote:
> On Wed, 14 Mar 2018, Kani, Toshi wrote:
> > On Wed, 2018-03-14 at 20:27 +0100, Thomas Gleixner wrote:
> > > On Tue, 13 Mar 2018, Toshi Kani wrote:
> > >
> > > > vmalloc_fault() sets user'
On Fri, 2018-03-30 at 12:49 +0800, Yisheng Xie wrote:
> Zhou reported a bug on Hisilicon arm64 D06 platform with 64KB page size:
:
> The cause is the size of PCI IO resource is 32KB, which is 4K aligned but
> not 64KB aligned, so when do ioremap_pte_range(), its incoming end is not
> PAGE_ALIGN
On Tue, 2018-03-27 at 13:31 -0700, Nathan Chancellor wrote:
> On Tue, Mar 27, 2018 at 03:17:00PM -0500, Dan Rue wrote:
> > On Tue, Mar 27, 2018 at 06:27:24PM +0200, Greg Kroah-Hartman wrote:
> > > 4.4-stable review patch. If anyone has any objections, please let me
> > > know.
> > >
:
> >
> >
On Tue, 2018-03-27 at 15:17 -0500, Dan Rue wrote:
> On Tue, Mar 27, 2018 at 06:27:24PM +0200, Greg Kroah-Hartman wrote:
> > 4.4-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > From: Toshi Kani
> >
> > commit
n Chancellor wrote:
> > > > On Tue, Mar 27, 2018 at 08:40:56PM +, Kani, Toshi wrote:
> > > > > On Tue, 2018-03-27 at 13:31 -0700, Nathan Chancellor wrote:
> > > > > > On Tue, Mar 27, 2018 at 03:17:00PM -0500, Dan Rue wrote:
> > > > > > &g
On Fri, 2018-03-16 at 13:10 +0530, Chintan Pandya wrote:
>
> On 3/15/2018 9:42 PM, Kani, Toshi wrote:
> > On Thu, 2018-03-15 at 18:15 +0530, Chintan Pandya wrote:
> > > Huge mapping changes PMD/PUD which could have
> > > valid previous entries. This requires proper
On Thu, 2018-03-15 at 20:08 -0700, Dan Williams wrote:
> Commit 99759869faf1 "acpi: Add acpi_map_pxm_to_online_node()" added
> support for mapping a given proximity to its nearest, by SLIT distance,
> online node. However, it sometimes returns unexpected results due to the
> fact that it switches
On Tue, 2018-03-20 at 17:15 +0530, Chintan Pandya wrote:
> This patch ("mm/vmalloc: Add interfaces to free unmapped
> page table") adds following 2 interfaces to free the page
> table in case we implement huge mapping.
>
> pud_free_pmd_page() and pmd_free_pte_page()
>
> Some architectures (like
On Wed, 2018-03-21 at 21:42 -0700, Dan Williams wrote:
> Per the ACPI specification the only functional purpose for a DIMM
> Control Region to be mapped into the system physical address space, from
> an OSPM perspective, is to support block-apertures. However, there are
> some BIOSen that publish
On Mon, 2018-03-19 at 18:10 +0530, Chintan Pandya wrote:
> Implement pud_free_pmd_page() and pmd_free_pte_page().
>
> Implementation requires,
> 1) Freeing of the un-used next level page tables
> 2) Clearing off the current pud/pmd entry
> 3) Invalidate TLB which could have previously
>
On Mon, 2018-03-19 at 18:10 +0530, Chintan Pandya wrote:
> This patch ("mm/vmalloc: Add interfaces to free unmapped
> page table") adds following 2 interfaces to free the page
> table in case we implement huge mapping.
>
> pud_free_pmd_page() and pmd_free_pte_page()
>
> Some architectures (like
On Fri, 2018-03-02 at 09:34 +1100, Benjamin Herrenschmidt wrote:
> On Thu, 2018-03-01 at 14:31 -0800, Linus Torvalds wrote:
> > On Thu, Mar 1, 2018 at 2:06 PM, Benjamin Herrenschmidt
> > wrote:
> > >
> > > Could be that x86 has the smarts to do the right thing, still trying to
On Fri, 2018-03-02 at 08:57 -0800, Linus Torvalds wrote:
> On Fri, Mar 2, 2018 at 8:22 AM, Kani, Toshi <toshi.k...@hpe.com> wrote:
> >
> > FWIW, this thing is called MTRRs on x86, which are initialized by BIOS.
>
> No.
>
> Or rather, that's simply ju
On Fri, 2018-06-29 at 13:23 +0100, Will Deacon wrote:
> Hi Toshi, Thomas,
>
> On Wed, Jun 27, 2018 at 04:13:22PM +0000, Kani, Toshi wrote:
> > On Wed, 2018-06-27 at 16:56 +0100, Will Deacon wrote:
> > > On Wed, Jun 27, 2018 at 08:13:47AM -0600, Toshi Kani wrote:
>
On Wed, 2018-11-07 at 11:34 -0800, Dan Williams wrote:
> On Wed, Nov 7, 2018 at 10:52 AM Toshi Kani wrote:
> >
> > ndctl zero-labels completes with a large number of zeroed nmems when
> > it fails to do zeroing on a protected NVDIMM.
> >
> > # ndctl zero-labels nmem1
> > zeroed 65504 nmems
On Wed, 2018-09-12 at 11:26 +0100, Will Deacon wrote:
> The recently merged API for ensuring break-before-make on page-table
> entries when installing huge mappings in the vmalloc/ioremap region is
> fairly counter-intuitive, resulting in the arch freeing functions
> (e.g. pmd_free_pte_page())
On Wed, 2018-09-12 at 11:26 +0100, Will Deacon wrote:
> Now that the core code checks this for us, we don't need to do it in the
> backend.
>
> Cc: Chintan Pandya
> Cc: Toshi Kani
> Cc: Thomas Gleixner
> Cc: Michal Hocko
> Cc: Andrew Morton
> Signed-off-by: Will Deacon
> ---
>
On Fri, 2018-09-14 at 14:36 -0600, Toshi Kani wrote:
> On Wed, 2018-09-12 at 11:26 +0100, Will Deacon wrote:
> > The recently merged API for ensuring break-before-make on page-table
> > entries when installing huge mappings in the vmalloc/ioremap region is
> > fairly counter-intuitive, resulting
On Mon, 2018-09-17 at 12:33 +0100, Will Deacon wrote:
> On Fri, Sep 14, 2018 at 09:10:49PM +0000, Kani, Toshi wrote:
> > On Fri, 2018-09-14 at 14:36 -0600, Toshi Kani wrote:
> > > On Wed, 2018-09-12 at 11:26 +0100, Will Deacon wrote:
> > > > The recently merged API
On Mon, 2018-09-17 at 12:33 +0100, Will Deacon wrote:
> On Fri, Sep 14, 2018 at 08:37:48PM +0000, Kani, Toshi wrote:
> > On Wed, 2018-09-12 at 11:26 +0100, Will Deacon wrote:
> > > Now that the core code checks this for us, we don't need to do it in the
> > > backen
: Toshi Kani
> Cc: Thomas Gleixner
> Cc: Michal Hocko
> Cc: Andrew Morton
> Signed-off-by: Will Deacon
Thanks. This keeps the p4d path consistent.
Reviewed-by: Toshi Kani
-Toshi
On Wed, 2018-03-14 at 14:18 +0530, Chintan Pandya wrote:
> Note: I was working on these patches for quite sometime
> and realized that Toshi Kani has shared some patches
> addressing the same isssue with subject
> "[PATCH 0/2] fix memory leak / panic in ioremap huge pages".
> I've taken slightly
On Wed, 2018-03-14 at 20:27 +0100, Thomas Gleixner wrote:
> On Tue, 13 Mar 2018, Toshi Kani wrote:
>
> > vmalloc_fault() sets user's pgd or p4d from the kernel page table.
> > Once it's set, all tables underneath are identical. There is no point
> > of following the same page table with two
On Wed, 2018-03-14 at 20:56 +0100, Thomas Gleixner wrote:
> On Wed, 14 Mar 2018, Kani, Toshi wrote:
> > On Wed, 2018-03-14 at 20:27 +0100, Thomas Gleixner wrote:
> > > On Tue, 13 Mar 2018, Toshi Kani wrote:
> > >
> > > > vmalloc_fault() sets user'
On Tue, 2018-03-27 at 15:17 -0500, Dan Rue wrote:
> On Tue, Mar 27, 2018 at 06:27:24PM +0200, Greg Kroah-Hartman wrote:
> > 4.4-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > From: Toshi Kani
> >
> > commit
On Tue, 2018-03-27 at 13:31 -0700, Nathan Chancellor wrote:
> On Tue, Mar 27, 2018 at 03:17:00PM -0500, Dan Rue wrote:
> > On Tue, Mar 27, 2018 at 06:27:24PM +0200, Greg Kroah-Hartman wrote:
> > > 4.4-stable review patch. If anyone has any objections, please let me
> > > know.
> > >
:
> >
> >
On Wed, 2018-03-21 at 21:42 -0700, Dan Williams wrote:
> Per the ACPI specification the only functional purpose for a DIMM
> Control Region to be mapped into the system physical address space, from
> an OSPM perspective, is to support block-apertures. However, there are
> some BIOSen that publish
n Chancellor wrote:
> > > > On Tue, Mar 27, 2018 at 08:40:56PM +, Kani, Toshi wrote:
> > > > > On Tue, 2018-03-27 at 13:31 -0700, Nathan Chancellor wrote:
> > > > > > On Tue, Mar 27, 2018 at 03:17:00PM -0500, Dan Rue wrote:
> > > > > > &g
; Signed-off-by: Chintan Pandya
Thanks for the update. The change looks good.
Reviewed-by: Toshi Kani
-Toshi
On Wed, 2018-03-07 at 20:00 -0800, Matthew Wilcox wrote:
> On Wed, Mar 07, 2018 at 11:32:26AM -0700, Toshi Kani wrote:
> > +/**
> > + * pud_free_pmd_page - clear pud entry and free pmd page
> > + *
> > + * Returns 1 on success and 0 on failure (pud not cleared).
> > + */
> > +int
On Thu, 2018-03-08 at 18:04 +, Will Deacon wrote:
:
> > diff --git a/lib/ioremap.c b/lib/ioremap.c
> > index b808a390e4c3..54e5bbaa3200 100644
> > --- a/lib/ioremap.c
> > +++ b/lib/ioremap.c
> > @@ -91,7 +91,8 @@ static inline int ioremap_pmd_range(pud_t *pud, unsigned
> > long addr,
> >
>
On Thu, 2018-03-08 at 14:34 -0600, Gratian Crisan wrote:
> Hi all,
>
> We are seeing kernel page faults happening on module loads with certain
> drivers like the i915 video driver[1]. This was initially discovered on
> a 4.9 PREEMPT_RT kernel. It takes 5 days on average to reproduce using a
>
On Thu, 2018-03-08 at 22:38 +, Andy Lutomirski wrote:
> On Thu, Mar 8, 2018 at 9:43 PM, Kani, Toshi wrote:
> > On Thu, 2018-03-08 at 14:34 -0600, Gratian Crisan wrote:
:
> >
> > Thanks for the report and analysis! I believe pud_large() and
> > pmd_large() sho
On Thu, 2018-03-08 at 14:07 -0800, Matthew Wilcox wrote:
> On Thu, Mar 08, 2018 at 03:56:30PM +0000, Kani, Toshi wrote:
> > On Wed, 2018-03-07 at 20:00 -0800, Matthew Wilcox wrote:
> > > On Wed, Mar 07, 2018 at 11:32:26AM -0700, Toshi Kani wrote:
> > > > +/**
> &g
On Wed, 2018-03-14 at 15:38 -0700, Andrew Morton wrote:
> On Wed, 14 Mar 2018 12:01:54 -0600 Toshi Kani wrote:
:
>
> whoops.
>
> ---
> a/include/asm-generic/pgtable.h~mm-vmalloc-add-interfaces-to-free-unmapped-page-table-fix
> +++ a/include/asm-generic/pgtable.h
> @@ -1014,7 +1014,7 @@ static
On Thu, 2018-03-15 at 12:47 +0530, Chintan Pandya wrote:
>
> On 3/14/2018 8:08 PM, Kani, Toshi wrote:
> > On Wed, 2018-03-14 at 14:18 +0530, Chintan Pandya wrote:
> > > Note: I was working on these patches for quite sometime
> > > and realized that Tosh
On Thu, 2018-03-15 at 13:09 +0530, Chintan Pandya wrote:
>
> On 3/14/2018 11:31 PM, Toshi Kani wrote:
> > Implement pud_free_pmd_page() and pmd_free_pte_page() on x86, which
> > clear a given pud/pmd entry and free up lower level page table(s).
> > Address range associated with the pud/pmd entry
On Thu, 2018-03-15 at 18:15 +0530, Chintan Pandya wrote:
> Huge mapping changes PMD/PUD which could have
> valid previous entries. This requires proper
> TLB maintanance on some architectures, like
> ARM64.
>
> Implent BBM (break-before-make) safe TLB
> invalidation.
>
> Here, I've used
On Fri, 2018-03-16 at 13:10 +0530, Chintan Pandya wrote:
>
> On 3/15/2018 9:42 PM, Kani, Toshi wrote:
> > On Thu, 2018-03-15 at 18:15 +0530, Chintan Pandya wrote:
> > > Huge mapping changes PMD/PUD which could have
> > > valid previous entries. This requires proper
On Tue, 2018-02-20 at 14:54 +0530, Chintan Pandya wrote:
>
> On 12/28/2017 4:54 PM, Hanjun Guo wrote:
> > From: Hanjun Guo
> >
> > When we using iounmap() to free the 4K mapping, it just clear the PTEs
> > but leave P4D/PUD/PMD unchanged, also will not free the memory of page
> > tables.
> >
>
On Tue, 2018-05-15 at 16:05 +0200, Joerg Roedel wrote:
> On Mon, Apr 30, 2018 at 11:59:24AM -0600, Toshi Kani wrote:
> > int pud_free_pmd_page(pud_t *pud, unsigned long addr)
> > {
> > - pmd_t *pmd;
> > + pmd_t *pmd, *pmd_sv;
> > + pte_t *pte;
> > int i;
> >
> > if
On Fri, 2018-04-27 at 09:37 +0200, j...@8bytes.org wrote:
> On Thu, Apr 26, 2018 at 10:30:14PM +0000, Kani, Toshi wrote:
> > Thanks for the clarification. After reading through SDM one more time, I
> > agree that we need a TLB purge here. Here is my current understanding.
>
On Fri, 2018-04-27 at 08:28 +0200, Ingo Molnar wrote:
> * Kani, Toshi wrote:
>
> > On Thu, 2018-04-26 at 17:14 +0200, Joerg Roedel wrote:
> > > From: Joerg Roedel
> > >
> > > This reverts commit 28ee90fe6048fa7b7ceaeb8831c0e4e454a4cf89.
> > >
&
On Sat, 2018-04-28 at 11:02 +0200, j...@8bytes.org wrote:
> On Fri, Apr 27, 2018 at 02:31:51PM +0000, Kani, Toshi wrote:
> > So, we can add the step 2 on top of this patch.
> > 1. Clear pud/pmd entry.
> > 2. System wide TLB flush <-- TO BE ADDED BY NEW PATCH
> > 3
On Mon, 2018-04-30 at 13:00 +0530, Chintan Pandya wrote:
>
> On 4/29/2018 2:24 AM, Kani, Toshi wrote:
> > On Sat, 2018-04-28 at 11:02 +0200, j...@8bytes.org wrote:
> > > On Fri, Apr 27, 2018 at 02:31:51PM +, Kani, Toshi wrote:
> > > > So, we can ad
On Thu, 2018-04-26 at 16:19 +0200, Joerg Roedel wrote:
> Hi Toshi, Andrew,
>
> this patch(-set) is broken in several ways, please see below.
>
> On Wed, Mar 14, 2018 at 12:01:55PM -0600, Toshi Kani wrote:
> > Implement pud_free_pmd_page() and pmd_free_pte_page() on x86, which
> > clear a given
On Thu, 2018-04-26 at 17:14 +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> This reverts commit 28ee90fe6048fa7b7ceaeb8831c0e4e454a4cf89.
>
> This commit is broken for x86, as it unmaps the PTE and PMD
> pages and immediatly frees them without doing a TLB flush.
>
> Further this lacks
On Thu, 2018-04-26 at 19:23 +0200, j...@8bytes.org wrote:
> On Thu, Apr 26, 2018 at 04:21:19PM +0000, Kani, Toshi wrote:
> > All pages under the pmd had been unmapped and then lazy TLB purged with
> > INVLPG before coming to this code path. Speculation is not allowed to
> >
On Thu, 2018-04-26 at 22:07 +0200, j...@8bytes.org wrote:
> On Thu, Apr 26, 2018 at 05:49:58PM +0000, Kani, Toshi wrote:
> > On Thu, 2018-04-26 at 19:23 +0200, j...@8bytes.org wrote:
> > > So the PMD entry you clear can still be in a page-walk cache and this
> > > nee
On Wed, 2018-05-16 at 19:00 +0800, kbuild test robot wrote:
> Hi Toshi,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on arm64/for-next/core]
> [also build test ERROR on v4.17-rc5 next-20180515]
> [cannot apply to tip/x86/core]
> [if your patch is applied to
On Thu, 2018-05-17 at 08:47 +0200, Michal Hocko wrote:
> On Wed 16-05-18 17:32:06, Kani Toshimitsu wrote:
> > From: Chintan Pandya
> >
> > This patch ("mm/vmalloc: Add interfaces to free unmapped
> > page table") adds following 2 interfaces to free the page
> > table in case we implement huge
On Mon, 2018-04-30 at 11:59 -0600, Toshi Kani wrote:
> ioremap() supports pmd mappings on x86-PAE. However, kernel's pmd
> tables are not shared among processes on x86-PAE. Therefore, any
> update to sync'd pmd entries need re-syncing. Freeing a pte page
> also leads to a vmalloc fault and hits
On Sat, 2018-01-06 at 17:46 +0800, Hanjun Guo wrote:
> On 2018/1/6 6:15, Kani, Toshi wrote:
> > On Thu, 2017-12-28 at 19:24 +0800, Hanjun Guo wrote:
> > > From: Hanjun Guo
> > >
> > > When we using iounmap() to free the 4K mapping, it just clear the PTEs
&
On Thu, 2017-12-28 at 19:24 +0800, Hanjun Guo wrote:
> From: Hanjun Guo
>
> When we using iounmap() to free the 4K mapping, it just clear the PTEs
> but leave P4D/PUD/PMD unchanged, also will not free the memory of page
> tables.
>
> This will cause issues on ARM64 platform (not sure if other
On Fri, 2018-03-30 at 12:49 +0800, Yisheng Xie wrote:
> Zhou reported a bug on Hisilicon arm64 D06 platform with 64KB page size:
:
> The cause is the size of PCI IO resource is 32KB, which is 4K aligned but
> not 64KB aligned, so when do ioremap_pte_range(), its incoming end is not
> PAGE_ALIGN
node = n; < from this point we're using the
> wrong node for node_distance()
ouch...
>
>
> Fixes: 99759869faf1 ("acpi: Add acpi_map_pxm_to_online_node()")
> Cc:
> Cc: Toshi Kani
> Cc: Rafael J. Wysocki &g
On Mon, 2018-03-19 at 18:10 +0530, Chintan Pandya wrote:
> This patch ("mm/vmalloc: Add interfaces to free unmapped
> page table") adds following 2 interfaces to free the page
> table in case we implement huge mapping.
>
> pud_free_pmd_page() and pmd_free_pte_page()
>
> Some architectures (like
On Mon, 2018-03-19 at 18:10 +0530, Chintan Pandya wrote:
> Implement pud_free_pmd_page() and pmd_free_pte_page().
>
> Implementation requires,
> 1) Freeing of the un-used next level page tables
> 2) Clearing off the current pud/pmd entry
> 3) Invalidate TLB which could have previously
>
On Wed, 2018-03-07 at 14:54 -0800, Andrew Morton wrote:
> On Wed, 7 Mar 2018 11:32:26 -0700 Toshi Kani wrote:
>
> > On architectures with CONFIG_HAVE_ARCH_HUGE_VMAP set, ioremap()
> > may create pud/pmd mappings. Kernel panic was observed on arm64
> > systems with Cortex-A75 in the following
On Wed, 2018-03-07 at 15:01 -0800, Andrew Morton wrote:
> On Wed, 7 Mar 2018 11:32:27 -0700 Toshi Kani wrote:
>
> > Implement pud_free_pmd_page() and pmd_free_pte_page() on x86, which
> > clear a given pud/pmd entry and free up lower level page table(s).
> > Address range associated with the
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