There's a pll4_audio_div clock, an extra divider for pll4, missing
in current clock tree, thus add it.
Signed-off-by: Nicolin Chen
---
.../devicetree/bindings/clock/imx6q-clock.txt |1 +
arch/arm/mach-imx/clk-imx6q.c |9 +
2 files changed, 6 inser
-off-by: Nicolin Chen
---
sound/soc/codecs/cs53l30.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/cs53l30.c b/sound/soc/codecs/cs53l30.c
index fd5502e..2c0d9c4 100644
--- a/sound/soc/codecs/cs53l30.c
+++ b/sound/soc/codecs/cs53l30.c
@@ -592,8 +592,12
The maximum slot number of CS53L30 is 4 while it should support
the situation that's less than 4 channels based on the rx_mask.
So when the driver validates the last slot location, it should
check the last active slot instead of always the 4th one.
Signed-off-by: Nicolin Chen
---
soun
The codec chip has a physical MUTE pin to let users control it via
GPIO. So this patch add a mute control support to the driver.
Signed-off-by: Nicolin Chen
---
.../devicetree/bindings/sound/cs53l30.txt | 2 ++
sound/soc/codecs/cs53l30.c | 30
On Tue, Jun 21, 2016 at 04:34:37PM -0500, Rob Herring wrote:
> On Mon, Jun 20, 2016 at 06:54:44PM -0700, Nicolin Chen wrote:
> > The codec chip has a physical MUTE pin to let users control it via
> > GPIO. So this patch add a mute control support to the driver.
> >
> >
The codec chip has a physical MUTE pin to let users control it via
GPIO. So this patch add a mute control support to the driver.
Signed-off-by: Nicolin Chen
---
Changelog:
v1->v2
* Revise the DT binding part regarding the active state of the mute pin
.../devicetree/bindings/sound/cs53l30.
The codec driver should control the mclk. So this patch adds this support.
Signed-off-by: Nicolin Chen
---
Documentation/devicetree/bindings/sound/rt5659.txt | 3 +++
sound/soc/codecs/rt5659.c | 24 ++
sound/soc/codecs/rt5659.h
On Thu, Jul 28, 2016 at 04:57:32PM +0100, Mark Brown wrote:
> > The codec driver should control the mclk. So this patch adds this support.
>
> > + /* Check if MCLK provided */
> > + rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
> > + if (IS_ERR(rt5659->mclk)) {
> > + if (PTR_ERR(
On Thu, Jul 28, 2016 at 07:55:10PM +0100, Mark Brown wrote:
> > > This device seems to be used on x86 systems so we'll need to ensure that
> > > they register clocks for this. They really should set this up using
> > > quirks keyed off DMI information or similar so it's hidden from other
> > > sys
On Thu, Jul 28, 2016 at 10:40:44PM +0200, Lars-Peter Clausen wrote:
> > + /* Check if MCLK provided */
> > + rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
> > + if (IS_ERR(rt5659->mclk)) {
> > + if (PTR_ERR(rt5659->mclk) == -EPROBE_DEFER)
> > + return -EPROBE_DEF
The codec driver should control the mclk. So this patch adds this support.
Signed-off-by: Nicolin Chen
---
Changlog:
v1->v2
* Only set the mclk pointer to NULL when getting an ENOENT error code
(i.e. no clock is specified) -- corrected by Lars-Peter
Documentation/devicetree/bindings/so
When the clock is specified, there could be other errors besides
the EPROBE_DEFER so don't ignore them.
Signed-off-by: Nicolin Chen
---
sound/soc/codecs/cs53l30.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/cs53l30.c b/sound/soc/codecs/cs53
On Tue, Sep 06, 2016 at 12:52:03PM +0100, Jon Hunter wrote:
> > + /* TODO: ADMA should support up to 8 chunks or periods */
> > + desc->num_periods = 1;
> > + desc->buf_len = buf_len;
> > + desc->period_len = buf_len;
> What would be the benefit of using 8 periods here? My understanding is
ADMA driver will support more than cyclic type of transaction.
So this patch limit the cyclic callback for the cyclic type
only in order to support other types.
Signed-off-by: Nicolin Chen
---
drivers/dma/tegra210-adma.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a
echo 0 > /sys/module/dmatest/parameters/dmatest
echo 1 > /sys/module/dmatest/parameters/run
dmesg | grep dmatest
Started 1 threads using dma1chan0
dma1chan0-copy0: summary 1024 tests, 0 failures 2054 iops 16520 KB/s (0)
Signed-off-by: Nicolin Chen
---
drivers/dma/tegra210-
_CH_CTRL_MODE to unify the marcos
* PATCH-2: Set operation mode depending on cyclic
* PATCH-2: Add TODO comment at period_len
* PATCH-2: Revise the commit log
Nicolin Chen (2):
dmaengine: tegra210-adma: Add pre-check for cyclic callback
dmaengine: tegra210-adma: Add memcpy support
drivers/dma
The DMA_SG is still a type of memory copy operation that should
conform the hardware restriction. So this patch just applies the
copy_align to DMA_SG as well.
Signed-off-by: Nicolin Chen
---
drivers/dma/dmatest.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma
On Thu, Sep 08, 2016 at 03:19:57PM +0100, Jon Hunter wrote:
> I tried this again on my audio testing branch for tegra210 and it worked ...
>
> [ 36.427210] dmatest: Started 1 threads using dma1chan0
> [ 37.036948] dmatest: dma1chan0-copy0: summary 1024 tests, 0 failures 2410
> iops 19419 KB/
There could be something going wrong during the probe() part,
so it would not be ideal for debugging by silently returning.
This patches adds some necessary dev_err() to give the hints.
Signed-off-by: Nicolin Chen
---
drivers/dma/tegra210-adma.c | 12 ++--
1 file changed, 10 insertions
e/dmatest/parameters/dmatest
echo 1 > /sys/module/dmatest/parameters/run
dmesg | grep dmatest
Started 1 threads using dma1chan0
dma1chan0-copy0: summary 1024 tests, 0 failures 2054 iops 16520 KB/s (0)
Signed-off-by: Nicolin Chen
---
drivers/dma/tegra210
On Fri, Sep 02, 2016 at 03:07:23PM +0100, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistakes in dev_dbg messages
>
> Signed-off-by: Colin Ian King
Acked-by: Nicolin Chen
Thanks
> ---
> sound/soc/fsl/fsl_esai.c | 6 +++---
> 1 file cha
Hi Vinod,
On Fri, Sep 02, 2016 at 04:55:32PM +0530, Vinod Koul wrote:
> On Thu, Sep 01, 2016 at 03:43:16PM -0700, Nicolin Chen wrote:
>
> > +#define ADMA_CH_CTRL_MODE_ONCE (1 << 8)
>
> BIT(8)? You should change the existing ones too :)
Ah..
o be behind the "IRQ Control 5" register.
So this patch corrects these addresses.
Signed-off-by: Nicolin Chen
---
Hi Mark,
This patch needs the confirmation from Realtek side (hoping that
at least Bard or Oder would give an Ack) as the datasheets that I
have might not reflect the latest reg
GPIO <> RT5659 GPIO1
The result for the IRQ on the CPU side will be unexpectable.
So this patch enables the IRQ output for GPIO1 pin any way
as long as there's an IRQ assigned from platform data or DT:
[input] [IRQ output]
CPU GPIO << RT5659 GPIO1
Signe
This patch corrects a copy and paste typo.
Signed-off-by: Nicolin Chen
---
sound/soc/tegra/tegra_rt5640.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/tegra/tegra_rt5640.c b/sound/soc/tegra/tegra_rt5640.c
index 773daec..e5ef4e9 100644
--- a/sound/soc/tegra
On Thu, Aug 17, 2017 at 03:46:07PM +0530, Bhumika Goyal wrote:
> Make these const as they are only passed as the 2nd argument to the
> function snd_soc_set_runtime_hwparams, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Acked-by: Nicolin Chen
This patch just simply moves tegra_thermctl_set_trip_temp() behind
those function implementations so that it can remove those forward
declarations.
Signed-off-by: Nicolin Chen
---
drivers/thermal/tegra/soctherm.c | 103 ++-
1 file changed, 47 insertions
On Fri, Sep 15, 2017 at 12:10:13PM -0700, Nicolin Chen wrote:
> Below is the call trace of tegra210_init_pllu() function:
> start_kernel()
> -> time_init()
> --> of_clk_init()
> ---> tegra210_clock_init()
> > tegra210_pll_init()
> -> t
On Thu, Oct 19, 2017 at 11:44:22AM +0200, Thierry Reding wrote:
> > > Below is the call trace of tegra210_init_pllu() function:
> > > start_kernel()
> > > -> time_init()
> > > --> of_clk_init()
> > > ---> tegra210_clock_init()
> > > > tegra210_pll_init()
> > > -> tegra210_init_p
On Thu, Oct 19, 2017 at 11:42:24AM -0700, Nicolin Chen wrote:
> On Thu, Oct 19, 2017 at 11:44:22AM +0200, Thierry Reding wrote:
> > > > Below is the call trace of tegra210_init_pllu() function:
> > > > start_kernel()
> > > > -
registerations even if
one sensor fails to register.
Signed-off-by: Nicolin Chen
---
drivers/thermal/tegra/soctherm.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index 455b58c..73fcd48 100644
e (sync Tx with Rx), hence if the value is true,
> the SYNC field of TCR2 needs to be set to 0x1 ("Synchronous with
> receiver").
>
> Signed-off-by: Stefan Agner
Acked-by: Nicolin Chen
> ---
> Hi Nicolin,
>
> I got this reported from a customer, he tried to use
Change them to #ifdef as CONFIG_PM_SLEEP might not be defined at all.
Reported-by: kbuild test robot
Signed-off-by: Nicolin Chen
---
sound/soc/fsl/fsl_esai.c | 2 +-
sound/soc/fsl/fsl_sai.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_esai.c b/sound
by 32-bit compiler:
int main()
{
unsigned long long cval;
asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval));
return 0;
}
Signed-off-by: Nicolin Chen
---
[ I also added cntfrq here for safety as theoretically it could
trigger the trap as well.
This patch replaces the register read with ssi->i2s_net for
simplification. It also removes masking SSIEN from scr value
since it's handled later by regmap_update_bits() to set this
scr value back.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 ++
The probe() could handle some one-time configurations since
they will not be changed once being configured.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 39 ++-
1 file changed, 26 insertions(+), 13 deletions(-)
diff --git
Since ssi->streams is being updated along with SCR register and
its SSIEN bit, it's simpler to use it instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl
-DT cases.
This patch also moves symmetric_channels of AC97 from the probe
to the structure snd_soc_dai_driver for simplification.
Additionally, since PowerPC and AC97 use the same pdev pointer
to register a platform device, this patch also unifies related
code.
Signed-off-by: Nicolin Chen
Tested
bits for
AC97 in the platform remote() function.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 26 --
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 36e370e
The cpu_dai_drv is only used for symmetric_rates. So this patch replaces
it with a synchronous boolean flag.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a
patch simplifies these helper functions
with the following changes:
- Changing to two helper functions of enable and disable instead
of TX and RX.
- Removing fsl_ssi_rxtx_config() by separately integrating it to
two newly introduced enable & disable functions.
Signed-off-by: Nicolin Chen
Tested-
Since there is a helper function, use it to help readability.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index e75b57d..2c179a7
since regmap_update_bits() won't touch it.
* Moving baudclk check to the switch-case routine to skip the I2S
master check. And moving SxCCR.DC settings after baudclk check.
* Adding format settings for SND_SOC_DAIFMT_AC97 like others.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl
This patch cleans fsl_ssi_setup_regvals() by following changes:
1) Moving DBG bits to the first lines.
2) Setting SSIE, RE/TE as default and cleaning it for AC97
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 17 ++---
1 file changed, 6 insertions
The _fsl_ssi_set_dai_fmt() bypasses an undefined format for AC97
mode. However, it's not really necessary if AC97 has its complete
format defined.
So this patch adds a DAIFMT macro of complete format including a
clock direction and polarity.
Signed-off-by: Nicolin Chen
Tested-by: Caleb
It'd be safer to enable both FIFOs for TX or RX at the same time.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 43
o
use something like ssi_excl_shared_bits.
This patch also bisects fsl_ssi_disable_val into two macros of two
corresponding steps and then shortens its parameter names. It also
updates callers in the fsl_ssi_config() accordingly.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/so
up the ssi->i2s_net instead of reading the register.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index aecd00f..c8bd353 1006
here is
no active stream.
This patch fixes this issue by adding a variable to log the active
streams manually.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b
the AC97 check.
Note that SOR register is safe from offline_config HW limit.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 31 +--
1 file changed, 9 insertions(+), 22 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl
PowerPC and FIQ.
Nicolin Chen (16):
ASoC: fsl_ssi: Keep ssi->i2s_net updated
ASoC: fsl_ssi: Clean up set_dai_tdm_slot()
ASoC: fsl_ssi: Maintain a mask of active streams
ASoC: fsl_ssi: Rename fsl_ssi_disable_val macro
ASoC: fsl_ssi: Clear FIFO directly in fsl_ssi_config()
ASoC: fsl_ss
On Mon, Jan 01, 2018 at 04:17:20PM +0100, Maciej S. Szmigiero wrote:
> > AC97 configures some registers earlier to start a communication
> > with CODECs, so this patch moves those register settings to the
> > dai_probe() as well, along with other register configurations.
> This patch breaks AC'97
On Mon, Jan 01, 2018 at 07:39:52PM +0100, Maciej S. Szmigiero wrote:
> > /* The slot number should be >= 2 if using Network mode or I2S mode */
> > - regmap_read(regs, REG_SSI_SCR, &val);
> > - val &= SSI_SCR_I2S_MODE_MASK | SSI_SCR_NET;
> > - if (val && slots < 2) {
> > + if (ssi->i2s
On Mon, Jan 01, 2018 at 10:29:24PM +0100, Maciej S. Szmigiero wrote:
> > @@ -445,16 +445,10 @@ static void fsl_ssi_config(struct fsl_ssi *ssi, bool
> > enable,
> > bool tx = &ssi->regvals[TX] == vals;
> > + /* Check if the opposite stream is active */
> > + aactive = ssi->streams & BIT(!
On Mon, Jan 01, 2018 at 10:59:30PM +0100, Maciej S. Szmigiero wrote:
> > +static void fsl_ssi_config_enable(struct fsl_ssi *ssi, bool tx)
> > + srcr = vals[tx].srcr;
> > + stcr = vals[tx].stcr;
> > + sier = vals[tx].sier;
>
> Implicit assumption here that RX == 0, T
On Tue, Jan 02, 2018 at 03:28:11PM -0800, Caleb Crome wrote:
> tested this patch set on MX6 SSI against broonie for-next (4.15-rc5),
> no problems.
> Do I send a separate Tested-by for each patch, or just the 00/15 one?
> Tested-by: Caleb Crome
I will include your Tested-by to each patch in v2
On Thu, Jan 04, 2018 at 09:38:52PM +0100, Maciej S. Szmigiero wrote:
> > Hmm...What's the dependency here? Why is it required like this?
> And a AC'97 CODEC probe needs AC'97 communication to be working,
> since it has to detect the CODEC model, configure it, etc.
Okay. If the CODEC configuratio
> sound/soc/fsl/fsl_dma.c:917:34: error: 'CCSR_SSI_SRX0' undeclared
>
> Fixes: a818aa5f967b ("ASoC: fsl_ssi: Rename registers and fields macros")
> Cc: Nicolin Chen
Acked-by: Nicolin Chen
Thanks
> Cc: Maciej S. Szmigiero
> Cc: Timur Tabi
> Signed-of
Hello Marc,
On Thu, Jan 11, 2018 at 08:51:37AM +, Marc Zyngier wrote:
> > [ I also added cntfrq here for safety as theoretically it could
> > trigger the trap as well. However, my another test case (with
> > mrc insturction) doesn't seem to trigger a trap. So I would
> > drop it in the n
On Tue, Jan 16, 2018 at 09:19:13PM +, Marc Zyngier wrote:
> > I understand that it should take care of the condition field as
> > a general instruction handler. Just for curiosity: If we confine
> > the topic to read access of CNTVCT/CNTFRQ, what'd be the penalty
> > by ignoring the condition
On Wed, Jan 17, 2018 at 12:38:09AM +0100, Maciej S. Szmigiero wrote:
> > Example of uncovered tests: AC97, PowerPC and FIQ.
>
> I've tested the whole series in the AC'97 mode on an i.MX6 UDOO board
> and everything seems to work fine as long as few small changes are made
> to patches 13 and 16.
On Tue, Jan 16, 2018 at 01:37:46PM -0800, Nicolin Chen wrote:
> On Tue, Jan 16, 2018 at 09:19:13PM +, Marc Zyngier wrote:
>
> > > I understand that it should take care of the condition field as
> > > a general instruction handler. Just for curiosity: If we confine
ime) via I2S Master and Slave mode
- Background record with foreground playback (starting at different
time) via I2S Master and Slave mode
* All tests above by hacking offline_config to true in imx51.
Caleb has tested v1-v4 with TDM lookback tests on i.MX6.
Example of uncovered tests: AC97, Powe
Using symmetric_rates in the cpu_dai_drv is a bit implicit,
so this patch adds a bool synchronous instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v3
* Removed all cpu_dai_drv changes
sound/soc/fsl/fsl_ssi.c | 13 -
1 file changed, 8 insertions(+), 5
Since there is a helper function, use it to help readability.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index ba06e94..e1fe511
-DT cases.
This patch also moves symmetric_channels of AC97 from the probe
to the structure snd_soc_dai_driver for simplification.
Additionally, since PowerPC and AC97 use the same pdev pointer
to register a platform device, this patch also unifies related
code.
Signed-off-by: Nicolin Chen
Tested
s for SND_SOC_DAIFMT_AC97 like others.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v4
* Added TXBIT0 bit back to play safe
v3
* Put CBM_CFS behind the baudclk check to keep the same program
flow as before
sound/soc/fsl/fsl_ssi.c | 74 +++
Since ssi->streams is being updated along with SCR register and
its SSIEN bit, it's simpler to use it instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl
bits for
AC97 in the platform remote() function.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v5
* Moved fsl_ssi_hw_clean() after unregister CODEC platform dev
* For cleanup sequence, disabled TE and RE first while SSIEN at last
v2
* Moved all to fsl_ssi_hw_init() in
The probe() could handle some one-time configurations since
they will not be changed once being configured.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v2
* Moved all to fsl_ssi_hw_init() in platform probe()
sound/soc/fsl/fsl_ssi.c | 39
patch simplifies these helper functions
with the following changes:
- Changing to two helper functions of enable and disable instead
of TX and RX.
- Removing fsl_ssi_rxtx_config() by separately integrating it to
two newly introduced enable & disable functions.
Signed-off-by: Nicolin Chen
Tested-
This patch cleans fsl_ssi_setup_regvals() by following changes:
1) Moving DBG bits to the first lines.
2) Setting SSIE, RE/TE as default and cleaning it for AC97
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 17 ++---
1 file changed, 6 insertions
It'd be safer to enable both FIFOs for TX or RX at the same time.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index e5
up the ssi->i2s_net instead of reading the register.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 001e453..9847a1d 1006
The _fsl_ssi_set_dai_fmt() bypasses an undefined format for AC97
mode. However, it's not really necessary if AC97 has its complete
format defined.
So this patch adds a DAIFMT macro of complete format including a
clock direction and polarity.
Signed-off-by: Nicolin Chen
Tested-by: Caleb
the AC97 check.
Note that SOR register is safe from offline_config HW limit.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v3
* Replaced "bool dir" with "int dir" and "int adir"
v2
* Replaced bool tx with bool dir
o
use something like ssi_excl_shared_bits.
This patch also bisects fsl_ssi_disable_val into two macros of two
corresponding steps and then shortens its parameter names. It also
updates callers in the fsl_ssi_config() accordingly.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changel
This patch replaces the register read with ssi->i2s_net for
simplification. It also removes masking SSIEN from scr value
since it's handled later by regmap_update_bits() to set this
scr value back.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 ++
here is
no active stream.
This patch fixes this issue by adding a variable to log the active
streams manually.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v3
* Replaced "bool dir" with "int dir"
v2
* Replaced bool tx with bool dir
sound/soc/fsl/fsl_ssi.
limit their value within [0, 1].
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 4
sound/soc/fsl/fsl_ssi.h | 3 ---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index aecd00f..001e453 100644
On Wed, Jan 17, 2018 at 08:38:48PM +0100, Maciej S. Szmigiero wrote:
> However, I have a small nitpick regarding a comment newly added in
> this version of patch 16:
> + /*
> + * Do not set SSI dev as the parent of AC97 CODEC device since
> + * it does not hav
On Wed, Jan 17, 2018 at 09:03:48AM +, Marc Zyngier wrote:
> > So ignoring a condition for a Thumb instruction may cause its IT
> > scope shifting. For ARM mode, the only penalty could be two Rts
> > getting written -- which shouldn't corrupt userspace execution.
> >
> > Please correct me if I
On Wed, Jan 17, 2018 at 11:35:08PM +, Robin Murphy wrote:
> On Wed, 17 Jan 2018 12:41:56 -0800
> Nicolin Chen wrote:
>
> > On Wed, Jan 17, 2018 at 09:03:48AM +, Marc Zyngier wrote:
> >
> > > > So ignoring a condition for a Thumb instruction may cause i
On Sun, Jan 14, 2018 at 11:34:01PM +0100, Maciej S. Szmigiero wrote:
> > + bool dir = (&ssi->regvals[TX] == vals) ? TX : RX;
> Using a bool variable for a bit index (and array index in other parts
> of code) looks just wrong.
>
> Even a simple int would look better IMHO here (and in patch 5 tha
On Sun, Jan 14, 2018 at 11:34:37PM +0100, Maciej S. Szmigiero wrote:
> > + /* Check if the opposite stream is active */
> > + aactive = ssi->streams & BIT(!dir);
>^
> Here an implicit assumption that either RX == 0, TX == 1 or
> RX == 1, TX == 0 still remain
On Sun, Jan 14, 2018 at 11:40:31PM +0100, Maciej S. Szmigiero wrote:
> > case SND_SOC_DAIFMT_I2S:
> > - regmap_update_bits(regs, REG_SSI_STCCR,
> > - SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(2));
> > - regmap_update_bits(regs, REG_SSI_SRCCR,
> > -
On Sun, Jan 14, 2018 at 11:42:59PM +0100, Maciej S. Szmigiero wrote:
> On 11.01.2018 07:43, Nicolin Chen wrote:
> > The cpu_dai_drv is only used for symmetric_rates. So this patch replaces
> > it with a synchronous boolean flag.
>
> You make cpu_dai_drv common to all SSI ins
Caleb has tested v1 with TDM lookback tests on i.MX6.
Example of uncovered tests: AC97, PowerPC and FIQ.
Nicolin Chen (17):
ASoC: fsl_ssi: Redefine RX and TX macros
ASoC: fsl_ssi: Keep ssi->i2s_net updated
ASoC: fsl_ssi: Clean up set_dai_tdm_slot()
ASoC: fsl_ssi: Mainta
the AC97 check.
Note that SOR register is safe from offline_config HW limit.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v3
* Replaced "bool dir" with "int dir" and "int adir"
v2
* Replaced bool tx with bool dir
up the ssi->i2s_net instead of reading the register.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 001e453..9847a1d 1006
Since there is a helper function, use it to help readability.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index ba06e94..e1fe511
Since ssi->streams is being updated along with SCR register and
its SSIEN bit, it's simpler to use it instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl
This patch cleans fsl_ssi_setup_regvals() by following changes:
1) Moving DBG bits to the first lines.
2) Setting SSIE, RE/TE as default and cleaning it for AC97
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 17 ++---
1 file changed, 6 insertions
-DT cases.
This patch also moves symmetric_channels of AC97 from the probe
to the structure snd_soc_dai_driver for simplification.
Additionally, since PowerPC and AC97 use the same pdev pointer
to register a platform device, this patch also unifies related
code.
Signed-off-by: Nicolin Chen
Tested
It'd be safer to enable both FIFOs for TX or RX at the same time.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index e5
Using symmetric_rates in the cpu_dai_drv is a bit implicit,
so this patch adds a bool synchronous instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v3
* Removed all cpu_dai_drv changes in PATCH-15
sound/soc/fsl/fsl_ssi.c | 13 -
1 file changed, 8
bits for
AC97 in the platform remote() function.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v2
* Moved all to fsl_ssi_hw_init() in platform probe()
* Added fsl_ssi_hw_clean() instead of dai remove()
sound/soc/fsl/fsl_ssi.c | 26 --
1 file changed
since regmap_update_bits() won't touch it.
* Moving baudclk check to the switch-case routine to skip the I2S
master check. And moving SxCCR.DC settings after baudclk check.
* Adding format settings for SND_SOC_DAIFMT_AC97 like others.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
The probe() could handle some one-time configurations since
they will not be changed once being configured.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v2
* Moved all to fsl_ssi_hw_init() in platform probe()
sound/soc/fsl/fsl_ssi.c | 39
The _fsl_ssi_set_dai_fmt() bypasses an undefined format for AC97
mode. However, it's not really necessary if AC97 has its complete
format defined.
So this patch adds a DAIFMT macro of complete format including a
clock direction and polarity.
Signed-off-by: Nicolin Chen
Tested-by: Caleb
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