[PATCH v0] clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399

2018-08-04 Thread djw
From: Levin Du PWM2 is commonly used to control voltage of PWM regulator of VDD_LOG in RK3399. On the Firefly-RK3399 board, PWM2 outputs 40 KHz square wave from power on and the VDD_LOG is about 0.9V. When the kernel boots normally into the system, the PWM2 keeps outputing PWM signal. But the ke

[PATCH v1] arm64: dts: rockchip: add support for ROC-RK3399-PC board

2018-07-26 Thread djw
From: Levin Du ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board computer with USB 3.0 and Gigabit Ethernet in a form factor compatible with the Raspberry Pi. It is based on the Rockchip RK3399 SoC, powered by the Type-C port. The devicetree currently supports peripherals of: - Etherne

Re: [PATCH v1] arm64: dts: rockchip: add support for ROC-RK3399-PC board

2018-07-27 Thread djw
Ezequiel Garcia writes: > On Thu, 2018-07-26 at 15:13 +0800, d...@t-chip.com.cn wrote: >> From: Levin Du >> >> ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board >> computer with USB 3.0 and Gigabit Ethernet in a form factor >> compatible with the Raspberry Pi. It is based on the Rockch

[PATCH v2] arm64: dts: rockchip: add support for ROC-RK3399-PC board

2018-07-29 Thread djw
From: Levin Du ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board computer with USB 3.0 and Gigabit Ethernet in a form factor compatible with the Raspberry Pi. It is based on the Rockchip RK3399 SoC, powered by the Type-C port. The devicetree currently supports peripherals of: - Etherne

[PATCH v0] arm64: dts: rockchip: add support for ROC-RK3399-PC board

2018-07-21 Thread djw
From: Levin Du ROC-RK3399-PC is the first power efficient 4GB DDR4 single board computer with USB 3.0 and Gigabit Ethernet in a form factor compatible with the Raspberry Pi. It is based on the Rockchip RK3399 SoC, powered by the Type-C port. The devicetree currently supports peripherals of: - E

[PATCH v4 2/4] arm64: dts: rockchip: add GRF GPIO controller to rk3328

2018-07-30 Thread djw
From: Levin Du Adding a GRF GPIO controller labled "grf_gpio" to rk3328, currently providing access to the GPIO_MUTE pin, which is manupulated by the GRF_SOC_CON10 register. The GPIO_MUTE pin is referred to as <&grf_gpio 0>. Signed-off-by: Levin Du --- Changes in v4: - Use binding of "rockch

[PATCH v4 0/4] Add sdmmc UHS support to ROC-RK3328-CC board.

2018-07-30 Thread djw
From: Levin Du Hi all, this is an attemp to add sdmmc UHS support to the ROC-RK3328-CC board. This patch series adds a new compatible `rockchip,rk3328-grf-gpio` to the gpio-syscon driver, which currently only support for the access of the GPIO_MUTE pin in RK3328. Support for HDMI pins can be ad

[PATCH v4 1/4] gpio: syscon: rockchip: add GRF GPIO support for rk3328

2018-07-30 Thread djw
From: Levin Du In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec mute control, can also be used for general purpose. It is manipulated by the GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI pins can also be set in the same way. Currently this GRF GPIO

[PATCH v4 3/4] arm64: dts: rockchip: add io-domain to roc-rk3328-cc

2018-07-30 Thread djw
From: Levin Du It is necessary for the io domain setting of the SoC to match the voltage supplied by the regulators. Signed-off-by: Levin Du --- Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: - Split from V0. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 ++

[PATCH v4 4/4] arm64: dts: rockchip: add sdmmc UHS support for roc-rk3328-cc

2018-07-30 Thread djw
From: Levin Du In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by a special output only gpio pin labeled "gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10. This special pin can now be

Re: [PATCH v0] arm64: dts: rockchip: add support for ROC-RK3399-PC board

2018-07-24 Thread djw
Hi Heiko, Heiko Stuebner writes: > Hi Levin, > > Am Samstag, 21. Juli 2018, 10:30:26 CEST schrieb d...@t-chip.com.cn: >> From: Levin Du >> >> ROC-RK3399-PC is the first power efficient 4GB DDR4 single board > > maybe "is a power efficient" instead of "the first" ;-) > > [...] > ok :) >> diff -

Re: [PATCH v0] arm64: dts: rockchip: add support for ROC-RK3399-PC board

2018-07-24 Thread djw
Enric Balletbo Serra writes: > Hi Levin, > > Missatge de Heiko Stuebner del dia dt., 24 de jul. > 2018 a les 11:29: >> >> Hi Levin, >> >> Am Samstag, 21. Juli 2018, 10:30:26 CEST schrieb d...@t-chip.com.cn: >> > From: Levin Du >> > >> > ROC-RK3399-PC is the first power efficient 4GB DDR4 single

Re: [PATCH v3 2/5] gpio: syscon: rockchip: add GPIO_MUTE support for rk3328

2018-06-28 Thread djw
Levin writes: > Rob Herring writes: > >> On Sat, Jun 02, 2018 at 04:40:09PM +0800, Levin Du wrote: >>> >>> Rob Herring writes: >>> >>> > On Thu, May 31, 2018 at 9:05 PM, Levin wrote: >>> > > Hi Rob, >>> > > >>> > > >>> > > On 2018-05-31 10:45 PM, Rob Herring wrote: >>> > > > >>> > > > On

[PATCH v3 2/5] gpio: syscon: rockchip: add GPIO_MUTE support for rk3328

2018-05-30 Thread djw
From: Levin Du In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec mute control, can also be used for general purpose. It is manipulated by the GRF_SOC_CON10 register. Signed-off-by: Levin Du --- Changes in v3: - Change from general gpio-syscon to specific rk3328-gpio-mute

[PATCH v3 3/5] arm64: dts: rockchip: Add GPIO_MUTE pin support to rk3328

2018-05-30 Thread djw
From: Levin Du Adding a new gpio controller named "gpio_mute" to rk3328, providing access to the GPIO_MUTE pin, which is manupulated by the GRF_SOC_CON10 register. The GPIO_MUTE pin is referred to as <&gpio_mute 0>. Signed-off-by: Levin Du --- Changes in v3: - Use dedicated "rockchip,rk3328-

[PATCH v3 1/5] gpio: syscon: allow fetching syscon from parent node

2018-05-30 Thread djw
From: Heiko Stuebner Syscon nodes can be a simple-mfd and the syscon-users then be declared as children of this node. That way the parent-child structure can be better represented for devices that are fully embedded in the syscon. Therefore allow getting the syscon from the parent if neither a s

[PATCH v3 0/5] Add sdmmc UHS support to ROC-RK3328-CC board.

2018-05-30 Thread djw
From: Levin Du Hi all, this is an attemp to add sdmmc UHS support to the ROC-RK3328-CC board. This patch series adds a new compatible `rockchip,rk3328-gpio-mute` to the gpio-syscon driver for the access of the GPIO_MUTE pin in rk3328. A new gpio controller named `gpio_mute` is defined in rk332

[PATCH v3 4/5] arm64: dts: rockchip: Add io-domain to roc-rk3328-cc

2018-05-30 Thread djw
From: Levin Du It is necessary for the io domain setting of the SoC to match the voltage supplied by the regulators. Signed-off-by: Levin Du --- Changes in v3: None Changes in v2: None Changes in v1: - Split from V0. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 1 file c

[PATCH v3 5/5] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc

2018-05-30 Thread djw
From: Levin Du In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by a special output only gpio pin labeled "gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10. This special pin can now be

[PATCH v2 0/5] Add sdmmc UHS support to ROC-RK3328-CC board.

2018-05-17 Thread djw
From: Levin Du Hi all, this is an attemp to add sdmmc UHS support to the ROC-RK3328-CC board. This patch series adds a new compatible `rockchip,gpio-syscon` to the gpio-syscon driver for general Rockchip SoC usage. A new gpio controller named `gpio_mute` is defined in rk3328.dtsi so that all r

[PATCH v2 3/5] arm64: dts: rockchip: Add gpio-mute to rk3328

2018-05-17 Thread djw
From: Levin Du Adding a new gpio controller named "gpio-mute" to rk3328, providing access to the GPIO_MUTE pin defined in the syscon GRF_SOC_CON10. The GPIO_MUTE pin is referred to as <&gpio-mute 1>. Signed-off-by: Levin Du --- Changes in v2: - Rename gpio_syscon10 to gpio_mute in rk3328.dts

[PATCH v2 4/5] arm64: dts: rockchip: Add io-domain to roc-rk3328-cc

2018-05-17 Thread djw
From: Levin Du It is necessary for the io domain setting of the SoC to match the voltage supplied by the regulators. Signed-off-by: Levin Du --- Changes in v2: None Changes in v1: - Split from V0. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 1 file changed, 12 insertion

[PATCH v2 1/5] gpio: syscon: allow fetching syscon from parent node

2018-05-17 Thread djw
From: Heiko Stuebner Syscon nodes can be a simple-mfd and the syscon-users then be declared as children of this node. That way the parent-child structure can be better represented for devices that are fully embedded in the syscon. Therefore allow getting the syscon from the parent if neither a s

[PATCH v2 2/5] gpio: syscon: Add gpio-syscon for rockchip

2018-05-17 Thread djw
From: Levin Du Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs, which do not belong to the general pinctrl. Adding gpio-syscon support makes controlling regulator or LED using these special pins very easy by reusing existing drivers, such as gpio-regulator and led-gpio. Signed-off-

[PATCH v2 5/5] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc

2018-05-17 Thread djw
From: Levin Du In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by a special output only gpio pin labeled "gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10. This special pin can now be

Re: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin

2019-10-07 Thread djw
Jagan Teki writes: > Hi Heiko, > > On Mon, Sep 30, 2019 at 2:51 AM Heiko Stuebner wrote: >> >> Hi Jagan, >> >> Am Donnerstag, 19. September 2019, 07:28:17 CEST schrieb Jagan Teki: >> > ROC-PC is not able to boot linux console if PWM2_d is >> > unattached to any pinctrl logic. >> > >> > To be pre

Re: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin

2019-10-21 Thread djw
Yang Date: Thu Sep 19 10:37:36 2019 +0800 rockchip: Update BL31_BASE to 0x4 or use the master branch in git://git.denx.de/u-boot-rockchip.git . This is very important, or you'll be stuck at: U-Boot TPL 2019.10-djw (Oct 22 2019 - 03:08:48) Trying to boot fr

[PATCH v1 1/5] gpio: syscon: allow fetching syscon from parent node

2018-05-10 Thread djw
From: Heiko Stuebner Syscon nodes can be a simple-mfd and the syscon-users then be declared as children of this node. That way the parent-child structure can be better represented for devices that are fully embedded in the syscon. Therefore allow getting the syscon from the parent if neither a s

[PATCH v1 0/5] Add sdmmc UHS support to ROC-RK3328-CC board.

2018-05-10 Thread djw
From: Levin Du Hi all, this is an attemp to add sdmmc UHS support to the ROC-RK3328-CC board. This patch series adds a new compatible `rockchip,gpio-syscon` to the gpio-syscon driver for general Rockchip SoC usage.. A new gpio controller named `gpio_syscon10` is defined in rk3328.dtsi so that a

[PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328

2018-05-10 Thread djw
From: Levin Du Adding a new gpio controller named "gpio-syscon10" to rk3328, providing access to the pins defined in the syscon GRF_SOC_CON10. Boards using these special pins to control regulators or LEDs, can now utilize existing drivers like gpio-regulator and leds-gpio. Signed-off-by: Levin

[PATCH v1 4/5] arm64: dts: rockchip: Add io-domain to roc-rk3328-cc

2018-05-10 Thread djw
From: Levin Du It is necessary for the io domain setting of the SoC to match the voltage supplied by the regulators. Signed-off-by: Levin Du --- Changes in v1: - Split from V0. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 1 file changed, 12 insertions(+) diff --git a/a

[PATCH v1 2/5] gpio: syscon: Add gpio-syscon for rockchip

2018-05-10 Thread djw
From: Levin Du Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs, which do not belong to the general pinctrl. Adding gpio-syscon support makes controlling regulator or LED using these special pins very easy by reusing existing drivers, such as gpio-regulator and led-gpio. Signed-off-

[PATCH v1 5/5] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc

2018-05-10 Thread djw
From: Levin Du In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by a special output only gpio pin labeled "gpiomut_pmuio_iout", corresponding bit 1 of the syscon GRF_SOC_CON10. This special pin can now be

[PATCH v1 4/5] arm64: dts: rockchip: Add io-domain to roc-rk3328-cc

2018-05-10 Thread djw
From: Levin Du It is necessary for the io domain setting of the SoC to match the voltage supplied by the regulators. Signed-off-by: Levin Du --- Changes in v1: - Split from V0. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 1 file changed, 12 insertions(+) diff --git a/a

[PATCH v0 0/2] Add sdmmc UHS support to ROC-RK3328-CC board

2018-05-07 Thread djw
From: Levin Du Hi all, This is an attemp to add sdmmc UHS support to the ROC-RK3328-CC board. It adds a new compatible `rockchip,rk3328-gpio-syscon10` to the gpio-syscon driver, so that a new gpio controller named `gpio_syscon10` can be defined and used in the regulator-gpio. This regulator co

[PATCH v0 2/2] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc

2018-05-07 Thread djw
From: Levin Du In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by a special output only gpio pin. However, this pin, not being a normal gpio in the rockchip pinctrl, is set by bit 1 of system register GR

[PATCH v0 1/2] gpio: syscon: Add gpio-syscon for rk3328

2018-05-07 Thread djw
From: Levin Du In Rockchip RK3328 Soc, there's a output only gpio pin labeled `gpiomut_pmuio_iout`, which can be set by bit[1] of GRF_SOC_CON10. (bit[0] controls the enable state of the pin and defaults to enabled.) This pin is used by the roc-rk3328-cc board to switch sdmmc io signal voltage be