[PATCH v5 4/4] dt-bindings: msm: Update documentation of qcom,llcc
Add reg-names and interrupts for LLCC documentation and the usage
examples. llcc broadcast base is added in addition to llcc base,
which is used for llcc broadcast writes.
Signed-off-by: Venkata Narendra Kumar Gutta
Reviewed-by: Rob Herring
---
.../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
index 5e85749..eaee06b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
@@ -16,11 +16,26 @@ Properties:
- reg:
Usage: required
Value Type:
- Definition: Start address and the the size of the register region.
+ Definition: The first element specifies the llcc base start address and
+ the size of the register region. The second element
specifies
+ the llcc broadcast base address and size of the register
region.
+
+- reg-names:
+Usage: required
+Value Type:
+Definition: Register region names. Must be "llcc_base",
"llcc_broadcast_base".
+
+- interrupts:
+ Usage: required
+ Definition: The interrupt is associated with the llcc edac device.
+ It's used for llcc cache single and double bit error
detection
+ and reporting.
Example:
cache-controller@110 {
compatible = "qcom,sdm845-llcc";
- reg = <0x110 0x25>;
+ reg = <0x110 0x20>, <0x130 0x5> ;
+ reg-names = "llcc_base", "llcc_broadcast_base";
+ interrupts = ;
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v5 4/4] dt-bindings: msm: Update documentation of qcom,llcc
Add reg-names and interrupts for LLCC documentation and the usage
examples. llcc broadcast base is added in addition to llcc base,
which is used for llcc broadcast writes.
Signed-off-by: Venkata Narendra Kumar Gutta
Reviewed-by: Rob Herring
---
.../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
index 5e85749..eaee06b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
@@ -16,11 +16,26 @@ Properties:
- reg:
Usage: required
Value Type:
- Definition: Start address and the the size of the register region.
+ Definition: The first element specifies the llcc base start address and
+ the size of the register region. The second element
specifies
+ the llcc broadcast base address and size of the register
region.
+
+- reg-names:
+Usage: required
+Value Type:
+Definition: Register region names. Must be "llcc_base",
"llcc_broadcast_base".
+
+- interrupts:
+ Usage: required
+ Definition: The interrupt is associated with the llcc edac device.
+ It's used for llcc cache single and double bit error
detection
+ and reporting.
Example:
cache-controller@110 {
compatible = "qcom,sdm845-llcc";
- reg = <0x110 0x25>;
+ reg = <0x110 0x20>, <0x130 0x5> ;
+ reg-names = "llcc_base", "llcc_broadcast_base";
+ interrupts = ;
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
