Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-19 Thread Maxime Ripard
On Mon, Mar 19, 2018 at 10:14:19AM +0800, Chen-Yu Tsai wrote: > On Mon, Mar 19, 2018 at 3:07 AM, Mylène Josserand > wrote: > > Hello Mark, > > > > Please, excuse me for this late answer and thank you for the review! > > > > On Wed, 7 Mar 2018 12:18:33 + > > Marc

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-19 Thread Maxime Ripard
On Mon, Mar 19, 2018 at 10:14:19AM +0800, Chen-Yu Tsai wrote: > On Mon, Mar 19, 2018 at 3:07 AM, Mylène Josserand > wrote: > > Hello Mark, > > > > Please, excuse me for this late answer and thank you for the review! > > > > On Wed, 7 Mar 2018 12:18:33 + > > Marc Zyngier wrote: > > > >> On

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-19 Thread Maxime Ripard
On Sun, Mar 18, 2018 at 08:07:15PM +0100, Mylène Josserand wrote: > Hello Mark, > > Please, excuse me for this late answer and thank you for the review! > > On Wed, 7 Mar 2018 12:18:33 + > Marc Zyngier wrote: > > > On 23/02/18 13:37, Mylène Josserand wrote: > > > On

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-19 Thread Maxime Ripard
On Sun, Mar 18, 2018 at 08:07:15PM +0100, Mylène Josserand wrote: > Hello Mark, > > Please, excuse me for this late answer and thank you for the review! > > On Wed, 7 Mar 2018 12:18:33 + > Marc Zyngier wrote: > > > On 23/02/18 13:37, Mylène Josserand wrote: > > > On Cortex-A7, the CNTVOFF

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-19 Thread Marc Zyngier
Hi Mylène, On 18/03/18 19:07, Mylène Josserand wrote: > Hello Mark, > > Please, excuse me for this late answer and thank you for the review! No worries. > > On Wed, 7 Mar 2018 12:18:33 + > Marc Zyngier wrote: > >> On 23/02/18 13:37, Mylène Josserand wrote: >>> On

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-19 Thread Marc Zyngier
Hi Mylène, On 18/03/18 19:07, Mylène Josserand wrote: > Hello Mark, > > Please, excuse me for this late answer and thank you for the review! No worries. > > On Wed, 7 Mar 2018 12:18:33 + > Marc Zyngier wrote: > >> On 23/02/18 13:37, Mylène Josserand wrote: >>> On Cortex-A7, the CNTVOFF

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-18 Thread Chen-Yu Tsai
On Mon, Mar 19, 2018 at 3:07 AM, Mylène Josserand wrote: > Hello Mark, > > Please, excuse me for this late answer and thank you for the review! > > On Wed, 7 Mar 2018 12:18:33 + > Marc Zyngier wrote: > >> On 23/02/18 13:37, Mylène Josserand

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-18 Thread Chen-Yu Tsai
On Mon, Mar 19, 2018 at 3:07 AM, Mylène Josserand wrote: > Hello Mark, > > Please, excuse me for this late answer and thank you for the review! > > On Wed, 7 Mar 2018 12:18:33 + > Marc Zyngier wrote: > >> On 23/02/18 13:37, Mylène Josserand wrote: >> > On Cortex-A7, the CNTVOFF register from

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-18 Thread Mylène Josserand
Hello Mark, Please, excuse me for this late answer and thank you for the review! On Wed, 7 Mar 2018 12:18:33 + Marc Zyngier wrote: > On 23/02/18 13:37, Mylène Josserand wrote: > > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > > Only on A7?

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-18 Thread Mylène Josserand
Hello Mark, Please, excuse me for this late answer and thank you for the review! On Wed, 7 Mar 2018 12:18:33 + Marc Zyngier wrote: > On 23/02/18 13:37, Mylène Josserand wrote: > > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > > Only on A7? Is that specific to

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-07 Thread Marc Zyngier
On 23/02/18 13:37, Mylène Josserand wrote: > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. Only on A7? Is that specific to your platform? > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode.

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-07 Thread Marc Zyngier
On 23/02/18 13:37, Mylène Josserand wrote: > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. Only on A7? Is that specific to your platform? > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode.

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-07 Thread Marc Zyngier
On 23/02/18 16:17, Chen-Yu Tsai wrote: > On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand > wrote: >> On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. >> It should be done by the bootloader but it is currently not the case, >> even for boot CPU

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-07 Thread Marc Zyngier
On 23/02/18 16:17, Chen-Yu Tsai wrote: > On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand > wrote: >> On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. >> It should be done by the bootloader but it is currently not the case, >> even for boot CPU because this SoC is booting in

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-05 Thread Mylène Josserand
Hello, On Mon, 5 Mar 2018 09:31:14 +0100 Maxime Ripard wrote: > On Mon, Mar 05, 2018 at 08:51:48AM +0100, Mylène Josserand wrote: > > > >> > diff --git a/arch/arm/mach-sunxi/sunxi.c > > > >> > b/arch/arm/mach-sunxi/sunxi.c > > > >> > index 5e9602ce1573..4bb041492b54

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-05 Thread Mylène Josserand
Hello, On Mon, 5 Mar 2018 09:31:14 +0100 Maxime Ripard wrote: > On Mon, Mar 05, 2018 at 08:51:48AM +0100, Mylène Josserand wrote: > > > >> > diff --git a/arch/arm/mach-sunxi/sunxi.c > > > >> > b/arch/arm/mach-sunxi/sunxi.c > > > >> > index 5e9602ce1573..4bb041492b54 100644 > > > >> > ---

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-05 Thread Maxime Ripard
On Mon, Mar 05, 2018 at 08:51:48AM +0100, Mylène Josserand wrote: > > >> > diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c > > >> > index 5e9602ce1573..4bb041492b54 100644 > > >> > --- a/arch/arm/mach-sunxi/sunxi.c > > >> > +++ b/arch/arm/mach-sunxi/sunxi.c > > >> > @@ -37,8

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-05 Thread Maxime Ripard
On Mon, Mar 05, 2018 at 08:51:48AM +0100, Mylène Josserand wrote: > > >> > diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c > > >> > index 5e9602ce1573..4bb041492b54 100644 > > >> > --- a/arch/arm/mach-sunxi/sunxi.c > > >> > +++ b/arch/arm/mach-sunxi/sunxi.c > > >> > @@ -37,8

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-04 Thread Mylène Josserand
Hello, On Mon, 26 Feb 2018 18:25:10 +0800 Chen-Yu Tsai wrote: > On Mon, Feb 26, 2018 at 6:12 PM, Maxime Ripard > wrote: > > On Sat, Feb 24, 2018 at 12:17:13AM +0800, Chen-Yu Tsai wrote: > >> On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand > >>

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-03-04 Thread Mylène Josserand
Hello, On Mon, 26 Feb 2018 18:25:10 +0800 Chen-Yu Tsai wrote: > On Mon, Feb 26, 2018 at 6:12 PM, Maxime Ripard > wrote: > > On Sat, Feb 24, 2018 at 12:17:13AM +0800, Chen-Yu Tsai wrote: > >> On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand > >> wrote: > >> > On Cortex-A7, the CNTVOFF

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-26 Thread Chen-Yu Tsai
On Mon, Feb 26, 2018 at 6:12 PM, Maxime Ripard wrote: > On Sat, Feb 24, 2018 at 12:17:13AM +0800, Chen-Yu Tsai wrote: >> On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand >> wrote: >> > On Cortex-A7, the CNTVOFF register from arch timer is

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-26 Thread Chen-Yu Tsai
On Mon, Feb 26, 2018 at 6:12 PM, Maxime Ripard wrote: > On Sat, Feb 24, 2018 at 12:17:13AM +0800, Chen-Yu Tsai wrote: >> On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand >> wrote: >> > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. >> > It should be done by the bootloader

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-26 Thread Maxime Ripard
On Sat, Feb 24, 2018 at 12:17:13AM +0800, Chen-Yu Tsai wrote: > On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand > wrote: > > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > > It should be done by the bootloader but it is currently not the

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-26 Thread Maxime Ripard
On Sat, Feb 24, 2018 at 12:17:13AM +0800, Chen-Yu Tsai wrote: > On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand > wrote: > > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > > It should be done by the bootloader but it is currently not the case, > > even for boot CPU

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-23 Thread Chen-Yu Tsai
On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand wrote: > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. >

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-23 Thread Chen-Yu Tsai
On Fri, Feb 23, 2018 at 9:37 PM, Mylène Josserand wrote: > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. > It leads to an random offset

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-23 Thread Maxime Ripard
On Fri, Feb 23, 2018 at 02:37:42PM +0100, Mylène Josserand wrote: > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. > It leads to an random

Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF

2018-02-23 Thread Maxime Ripard
On Fri, Feb 23, 2018 at 02:37:42PM +0100, Mylène Josserand wrote: > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. > It leads to an random