On Wed, Feb 2, 2011 at 2:11 AM, Tony Lindgren t...@atomide.com wrote:
* Ohad Ben-Cohen o...@wizery.com [110122 07:47]:
On Sat, Jan 22, 2011 at 5:30 PM, Koen Kooi k...@dominion.thruhere.net
wrote:
That was indeed the problem, not I get:
[ 35.417053] wl1271: firmware booted (Rev
OMAP2 has an irq line dedicated for DISPC interrupts, there is no DSI
on omap2.
OMAP3 has a common irq line for DISPC and DSI interrupts.
OMAP4 has seperate irq lines for DISPC and DSI Interrupts.
Use dss_features to have a common DSS irq handler for all OMAP revisions.
Also, use a member of the
On 2/2/2011 2:20 AM, Hilman, Kevin wrote:
Santosh Shilimkarsantosh.shilim...@ti.com writes:
CPU0 and CPU1 clockdomain is at the offset of 0x18 from the LPRM base.
The header file has set it wrongly to 0x0. Offset 0x0 is for CPUx power
domain control register
Fix the same.
Has this also
On Wed, Feb 02, 2011 at 05:00:13PM +0530, archit taneja wrote:
How can I implement regulator_enable/disable calls in my driver for a
consumer of vcxio without disturbing the mpu and iva etc consumers which
don't use regulator api to enable/disable the regulator at all.
Set the regulator
1) make sure that we have the new watchdog core infrastructure going in for
2.6.32.
This new core integrates the common code that we use over and over again. I
once
wrote code for it and then Alan had different ideas and thoughts and wrote
his updated
code. I reviewed that and I am
Tony,
On Wed, Jan 05, 2011 at 10:03:21PM +0800, tom.leim...@gmail.com wrote:
From: Ming Lei tom.leim...@gmail.com
Panda uses both twl6030 otg phy(vbus, id) and internal
phy(data lines, DP/DM), so removes usb_nop_xceiv_register to make
twl6030 otg driver working since current otg code only
On Wed, Feb 02, 2011 at 01:37:17PM +0200, Felipe Balbi wrote:
Tony,
On Wed, Jan 05, 2011 at 10:03:21PM +0800, tom.leim...@gmail.com wrote:
From: Ming Lei tom.leim...@gmail.com
Panda uses both twl6030 otg phy(vbus, id) and internal
phy(data lines, DP/DM), so removes
Changes invloves:
1) Addition of hwmod data for omap2/3/4.
2) McSPI driver hwmod adaptation with cleanup of base address
macros and using omap-device API's.
3) Runtime Conversion of McSPI driver.
Changes from v5:
---
Rebased on top of 2.6.38-rc3 as per Kevin's
From: Benoit Cousson b-cous...@ti.com
Update omap4 hwmod file with McSPI info.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Govindraj.R govindraj.r...@ti.com
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
McSPI runtime conversion.
Changes involves:
1) remove clock framework apis to use runtime framework apis.
2) context restore from runtime resume which is a callback for get_sync.
3) Remove SYSCONFIG(sysc) register handling
(a) Remove context save and restore of sysc reg and remove soft
From: Charulatha V ch...@ti.com
Update the omap2420 hwmod data with the McSPI info.
Add a device attribute structure which will be used
for passing number of chipselects from hwmod data.
Add revision macros to be passed from rev field from
hwmod.
Signed-off-by: Charulatha V ch...@ti.com
From: Charulatha V ch...@ti.com
Update the 2430 hwmod data file with McSPI info.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Govindraj.R govindraj.r...@ti.com
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 219
From: Charulatha V ch...@ti.com
Update omap3 hwmod data file with McSPI info.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Govindraj.R govindraj.r...@ti.com
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 280
From: Charulatha V ch...@ti.com
Cleans up all base address definitions for omap_mcspi
and adapts the device registration and driver to hwmod framework.
Changes involves:
1) Removing all base address macro defines.
2) Using omap-device layer to register device and utilizing data from
hwmod data
OMAP4 introduces a Hardware Spinlock device, which provides hardware
assistance for synchronization and mutual exclusion between heterogeneous
processors and those not operating under a single, shared operating system
(e.g. OMAP4 has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP).
The intention
From: Simon Que s...@ti.com
Add hwspinlock support for the OMAP4 Hardware Spinlock device.
The Hardware Spinlock device on OMAP4 provides hardware assistance
for synchronization between the multiple processors in the system
(dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP).
[o...@wizery.com:
Add a platform-independent hwspinlock framework.
Hardware spinlock devices are needed, e.g., in order to access data
that is shared between remote processors, that otherwise have no
alternative mechanism to accomplish synchronization and mutual exclusion
operations.
Signed-off-by: Ohad Ben-Cohen
From: Benoit Cousson b-cous...@ti.com
Add hwspinlock hwmod data for OMAP4 chip
Signed-off-by: Cousson, Benoit b-cous...@ti.com
Signed-off-by: Hari Kanigeri h-kanige...@ti.com
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
Cc: Paul Walmsley p...@pwsan.com
Acked-by: Tony Lindgren t...@atomide.com
From: Simon Que s...@ti.com
Build and register an hwspinlock platform device.
Although only OMAP4 supports the hardware spinlock module (for now),
it is still safe to run this initcall on all omaps, because hwmod lookup
will simply fail on hwspinlock-less platforms.
Signed-off-by: Simon Que
On Tue, Feb 01, 2011 at 10:12:38AM +0200, Ohad Ben-Cohen wrote:
On Tue, Feb 1, 2011 at 9:40 AM, Andrew Morton a...@linux-foundation.org
wrote:
On Tue, 1 Feb 2011 09:36:22 +0200 Ohad Ben-Cohen o...@wizery.com wrote:
On Tue, Feb 1, 2011 at 8:38 AM, Andrew Morton a...@linux-foundation.org
From: Jean Pihet j-pi...@ti.com
The new fncpy API is better suited* for copying some
code to SRAM at runtime. This patch changes the ad-hoc
code to the more generic fncpy API.
*: 1. fncpy ensures that the thumb mode bit is propagated,
2. fncpy provides the security of type safety between the
On Wed, Feb 2, 2011 at 1:01 AM, Tony Lindgren t...@atomide.com wrote:
* Dave Martin dave.mar...@linaro.org [110201 08:34]:
On Tue, Jan 25, 2011 at 5:48 PM, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Fix a potential problem with function types when calling the
fncpy
Adding hwmod data for hsmmc device on OMAP2420/OMAP2430/OMAP3/OMAP4.
Adapting the omap_hsmmc driver to hwmod framework.
The patch series is based on v2.6.38-rc3 and tested on OMAP4430SDP
OMAP3430SDP.
Testing pending on OMAP2420SDP OMAP2430SDP since mmc/sd cards are not getting
detected.
Update the omap2420 hwmod data with the HSMMC info.
Add a device attribute structure which will be used
by the host driver to find whether the HSMMC controller
supports DUAL VOLT cards.
Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 88
Changes involves:
1) Remove controller reset in devices.c which is taken care
by hwmod framework.
2) Removing all base address macro defines.
3) Using omap-device layer to register device and utilizing data from
hwmod data file for base address, dma channel number, Irq_number,
device
From: Paul Walmsley p...@pwsan.com
Update the omap3 hwmod data with the HSMMC info.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com
---
From: Benoit Cousson b-cous...@ti.com
Update the omap4 hwmod data with the HSMMC info.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 339
1 files changed, 339
From: Paul Walmsley p...@pwsan.com
Update the omap2430 hwmod data with the HSMMC info.
Also update the device attribute structure.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by:
gpio_pendown in ads7846_probe is not getting initalized (defaulted to 0)
resulting in gpio_free being called without a gpio_request. This
results in the following backtrace in bootup (at least on an OMAP3430 SDP).
[ cut here ]
WARNING: at drivers/gpio/gpiolib.c:1258
The ads7846 driver requests a gpio to detect pendown events,
but does not configure its direction. Configure this gpio
as an input after requesting it.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/input/touchscreen/ads7846.c |1 +
1 files changed, 1 insertions(+), 0
Hi,
On Wed, Feb 02, 2011 at 09:00:46PM +0530, Sourav Poddar wrote:
The ads7846 driver requests a gpio to detect pendown events,
but does not configure its direction. Configure this gpio
as an input after requesting it.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
The following two patches are simple fixes,
the first one fixes a mistake on a previous
commit and the second one lets OMAP use sparse
IRQ numbering scheme.
Boot tested on pandaboard. Note that this is a
rebased version of older patchset [1] which was
resent later [2] but nobody took action on
commit e2a93ecc7fc469dab52323c11a2d8ceaa62aac7b
(ARM: Use genirq definitions from kernel/irq/Kconfig)
made ARM Kconfig use the generic Kconfig symbols from
kernel/irq/Kconfig but did not fix the boards which
were using the older symbols, fix them.
Signed-off-by: Felipe Balbi ba...@ti.com
---
Select HAVE_SPARSE_IRQ to allow OMAP to use
sparse IRQ numbering scheme. The main difference
is that irq_descs will be added to a radix tree
instead of a static array.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/Kconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff
On 2/1/11 2:32 PM, Tony Lindgren wrote:
* Grant Erickson maratho...@gmail.com [110128 16:34]:
Is there any reason, to date, that the ARM architecture has not had the
following kernel configuration option?
config GENERIC_CMOS_UPDATE
def_bool y
Looks like it would just require
Tony Lindgren wrote:
* Anand Gadiyar gadi...@ti.com [110201 04:54]:
I believe this fix is fixing your reboot issue, but it's breaking
EHCI support on the SDP.
The MODE4 above should really be MODE3 - all GPIOs are on MODE3.
By changing
The patch snippet below fixes EHCI on the
From: Benoit Cousson b-cous...@ti.com
Mailbox hwmod data for omap4.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 67
1 files changed, 67 insertions(+), 0
From: Felipe Contreras felipe.contre...@gmail.com
Remove static platform_device and resource data within
omap mailbox driver; use the one defined in the hwmod
database along with omap_device framework for device
build and registration.
Add device latency functions to be used, so clock can be
Mailbox hwmod support for OMAP 2,3,4.
This was tested on OMAP3 (3430, 3630), minor testing
was made on OMAP4.
No testing on OMAP2 since I don't have the hardware.
Highlights from v5 include the comments received from
previous version v4[1].
Benoit Cousson (1):
OMAP4: hwmod data: add mailbox
From: omar ramirez omar.rami...@ti.com
Mailbox hwmod data for omap2430 and 2420.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 74
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 73 +++
Use runtime pm APIs to enable/disable mailbox clocks and
to configure SYSC register.
Based on the patch sent by Felipe Contreras:
https://patchwork.kernel.org/patch/101662/
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/mach-omap2/mailbox.c | 67
From: Felipe Contreras felipe.contre...@gmail.com
Mailbox hwmod data for omap3.
Signed-off-by: Felipe Contreras felipe.contre...@gmail.com
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 72
1 files changed, 72
* Santosh Shilimkar santosh.shilim...@ti.com [110201 22:04]:
It's a ES1.0 blaze, with the patch below it reboots early
during the boot. I also have to disable omap_l2_cache_init
on this board to get it to boot.
Do you still get this problem with 'omap_l2_cache_init' ?
As reported
* Anand Gadiyar gadi...@ti.com [110202 10:51]:
Tony Lindgren wrote:
* Anand Gadiyar gadi...@ti.com [110201 04:54]:
I believe this fix is fixing your reboot issue, but it's breaking
EHCI support on the SDP.
The MODE4 above should really be MODE3 - all GPIOs are on MODE3.
By
Hi David,
* David Cohen david.co...@nokia.com [110131 09:24]:
From: David Cohen david@dhcppc2.(none)
Hi,
OMAP IOMMU prints error messages twice. These patches remove the error
message from the OMAP2,3 specific implementation and let them to be
printed on the above layer only.
Can you
* Felipe Balbi ba...@ti.com [110202 08:31]:
Select HAVE_SPARSE_IRQ to allow OMAP to use
sparse IRQ numbering scheme. The main difference
is that irq_descs will be added to a radix tree
instead of a static array.
Signed-off-by: Felipe Balbi ba...@ti.com
Assuming these two will go through
* Felipe Balbi ba...@ti.com [110202 03:56]:
On Wed, Feb 02, 2011 at 01:37:17PM +0200, Felipe Balbi wrote:
Tony,
On Wed, Jan 05, 2011 at 10:03:21PM +0800, tom.leim...@gmail.com wrote:
From: Ming Lei tom.leim...@gmail.com
Panda uses both twl6030 otg phy(vbus, id) and internal
Hi,
Is there a register that I can read, to determine if an OMAP34xx chip
was powered up because of a cold boot (power cycled off to on), or a warm boot
(software initiated reset or software initiated reboot)?
Elvis Dowson
--
To unsubscribe from this list: send the line unsubscribe
On 2/2/2011 3:03 PM, Elvis Dowson wrote:
Hi,
Is there a register that I can read, to determine if an OMAP34xx chip
was powered up because of a cold boot (power cycled off to on), or a warm boot
(software initiated reset or software initiated reboot)?
Yes, you can read the PRM_RSTST
Rajendra Nayak rna...@ti.com writes:
Hi Kevin,
-Original Message-
From: Kevin Hilman [mailto:khil...@ti.com]
Sent: Wednesday, February 02, 2011 6:49 AM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; p...@pwsan.com; b-cous...@ti.com;
rna...@ti.com; linux-arm-
Nishanth Menon n...@ti.com writes:
Kevin Hilman wrote, on 02/02/2011 04:11 AM:
Shweta Gulatishweta.gul...@ti.com writes:
From: Thara Gopinathth...@ti.com
The smartreflex bit on twl4030 needs to be enabled by default irrespective
of whether smartreflex module is enabled on the OMAP side or
On Tue, 1 Feb 2011, Santosh Shilimkar wrote:
-Original Message-
From: Paul Walmsley [mailto:p...@pwsan.com]
Sent: Tuesday, February 01, 2011 4:44 AM
What does the hardware do when the powerdomain is programmed to
INACTIVE?
Does it actually force the clockdomains idle?
No.
Vishwanath BS vishwanath...@ti.com writes:
This patch introduces accessory APIs for DVFS.
Actually, it begins the implementation of a DVFS layer.
Data structures added:
1. omap_dev_user_list: This structure maintains list of frequency requests per
device basis. When a device needs to be
* Ohad Ben-Cohen o...@wizery.com [110202 00:00]:
On Wed, Feb 2, 2011 at 2:11 AM, Tony Lindgren t...@atomide.com wrote:
* Ohad Ben-Cohen o...@wizery.com [110122 07:47]:
On Sat, Jan 22, 2011 at 5:30 PM, Koen Kooi k...@dominion.thruhere.net
wrote:
That was indeed the problem, not I get:
Kevin Hilman wrote, on 02/03/2011 03:09 AM:
Nishanth Menonn...@ti.com writes:
Kevin Hilman wrote, on 02/02/2011 04:11 AM:
Shweta Gulatishweta.gul...@ti.com writes:
From: Thara Gopinathth...@ti.com
The smartreflex bit on twl4030 needs to be enabled by default irrespective
of whether
Sourav,
On Wed, Feb 2, 2011 at 21:00, Sourav Poddar sourav.pod...@ti.com wrote:
gpio_pendown in ads7846_probe is not getting initalized (defaulted to 0)
resulting in gpio_free being called without a gpio_request. This
results in the following backtrace in bootup (at least on an OMAP3430 SDP).
On Wed, Feb 2, 2011 at 21:00, Sourav Poddar sourav.pod...@ti.com wrote:
The ads7846 driver requests a gpio to detect pendown events,
but does not configure its direction. Configure this gpio
as an input after requesting it.
NACK to this patch too for similar reasons as in patch1 of this
Hi,
-Original Message-
From: Hema HK [mailto:hem...@ti.com]
Sent: Friday, December 10, 2010 8:06 PM
To: linux-...@vger.kernel.org
Cc: linux-omap@vger.kernel.org; Hema HK; Felipe Balbi; Tony
Lindgren; Kevin Hilman; Cousson, Benoit; Paul Walmsley
Subject: [PATCH 1/5 v5] OMAP2430: hwmod
Hi,
-Original Message-
From: Hema HK [mailto:hem...@ti.com]
Sent: Friday, December 10, 2010 8:06 PM
To: linux-...@vger.kernel.org
Cc: linux-omap@vger.kernel.org; Cousson, Benoit; Hema HK;
Felipe Balbi; Tony Lindgren; Kevin Hilman; Paul Walmsley
Subject: [PATCH 3/5 v5] OMAP4430: hwmod
Hi,
-Original Message-
From: Hema HK [mailto:hem...@ti.com]
Sent: Friday, December 10, 2010 8:06 PM
To: linux-...@vger.kernel.org
Cc: linux-omap@vger.kernel.org; Hema HK; Felipe Balbi; Tony
Lindgren; Kevin Hilman; Cousson, Benoit; Paul Walmsley
Subject: [PATCH 2/5 v5] OMAP3xxx: hwmod
Hi,
-Original Message-
From: Hema HK [mailto:hem...@ti.com]
Sent: Friday, December 10, 2010 8:06 PM
To: linux-...@vger.kernel.org
Cc: linux-omap@vger.kernel.org; Hema HK; Felipe Balbi; Tony
Lindgren; Kevin Hilman; Cousson, Benoit; Paul Walmsley
Subject: [PATCH 4/5 v5] OMAP2+: musb: HWMOD
Tony,
On Thu, Jan 20, 2011 at 11:12 PM, Tony Lindgren t...@atomide.com wrote:
* Kishore Kadiyala kishore.kadiy...@ti.com [110118 09:19]:
This patch series adds support for ADMA on MMC1 MMC2 controllers on OMAP4.
There is no performance improvement observed using ADMA over SDMA.
Advantage
Varadarajan, Charulatha wrote:
On Wed, Feb 2, 2011 at 21:00, Sourav Poddar sourav.pod...@ti.com
wrote:
The ads7846 driver requests a gpio to detect pendown events,
but does not configure its direction. Configure this gpio
as an input after requesting it.
NACK to this patch too for
On Thu, Feb 3, 2011 at 12:06, Anand Gadiyar gadi...@ti.com wrote:
Varadarajan, Charulatha wrote:
On Wed, Feb 2, 2011 at 21:00, Sourav Poddar sourav.pod...@ti.com
wrote:
The ads7846 driver requests a gpio to detect pendown events,
but does not configure its direction. Configure this gpio
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