On Saturday 24 November 2012 09:12 AM, Paul Walmsley wrote:
The OMAP4 MPU subsystem power management code contains several unnecessary
shim functions for powerdomain control; remove them.
Signed-off-by: Paul Walmsley
Cc: Santosh Shilimkar
Cc: Kevin Hilman
---
Most of them are inline function
From: Jean Pihet
Fix the trace in the case a power domain did not hit the desired
state, as reported by Paul Walmsley.
Reported-by: Paul Walmsley
Signed-off-by: Jean Pihet
[p...@pwsan.com: split this fix off from the patch
"ARM: OMAP2+: PM debug: trace the functional power domains states"]
Si
The OMAP4 MPU subsystem power management code contains several unnecessary
shim functions for powerdomain control; remove them.
Signed-off-by: Paul Walmsley
Cc: Santosh Shilimkar
Cc: Kevin Hilman
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 43 +
1 file changed
The OMAP3xxx CPUIdle driver contains some code to place a lower bound
on the PER powerdomain's power state. Convert this code to a data-driven
implementation to remove branches and to improve readability.
Signed-off-by: Paul Walmsley
Cc: Kevin Hilman
---
arch/arm/mach-omap2/cpuidle34xx.c | 4
Avoid programming the MPU and CORE powerdomain next-power-state
registers if those powerdomains will never enter low-power states
(e.g., the state that people refer to as "C1").
To avoid making assumptions about CPUIdle states based on their order
in the list, use a flag to mark CPUIdle states tha
On OMAP2xxx chips, the register bitfields for the
PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are
different than those used on OMAP3/4. The order is reversed. So, for
example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0
indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicate
Add the possible logic retention states for the 24xx CORE powerdomain.
Subsequent patches use this data to avoid returning incorrect data, by
skipping reads from register bitfields that don't actually exist.
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/powerdomains2xxx_data.c |1 +
1
Several OMAP2+ power management fixes, optimizations, and cleanup,
intended for 3.9. This series is a prerequisite for the functional
powerdomain conversion series.
- Paul
---
vmlinux object size
(delta in bytes from TEST_cleanup-prcm_c9d501e5_v3.7-rc
(c9d501e5cb0238910337213e12a09127221c35d8
On 11/24/12 00:25, the mail apparently from Alan Stern included:
On Fri, 23 Nov 2012, Felipe Balbi wrote:
Thanks for the example. The only problem is, how do we associate a
regulator to a specific port in the system.
heh, that's the 1 million dollar question, isn't it ? :-)
that's what we ne
On 11/22/2012 08:12 PM, Mark Brown wrote:
On Thu, Nov 22, 2012 at 08:03:53PM -0600, Ricardo Neri wrote:
On 11/21/2012 07:03 PM, Mark Brown wrote:
instantiation infrastructure in there which is rather Linux specific.
But the board files are only for Linux, right? The ASoC drivers will
alw
On Fri, Nov 23, 2012 at 08:54:15AM -0800, Tony Lindgren wrote:
> * Russell King - ARM Linux [121122 12:26]:
> > On Wed, Nov 21, 2012 at 09:42:19AM -0800, Tony Lindgren wrote:
> > > There are few drivers still breaking because of their
> > > use of plat/cpu.h and cpu_is_omap macros. The following
>
AnilKumar Ch wrote:
AM33XX family of devices uses RTC module, one has to manually enable
this support to use RTC features. So this patch enable RTC driver in
omap2plus_defconfig.
Signed-off-by: AnilKumar Ch
---
arch/arm/configs/omap2plus_defconfig |1 +
1 file changed, 1 insertion(+)
diff
* Russell King - ARM Linux [121122 12:26]:
> On Wed, Nov 21, 2012 at 09:42:19AM -0800, Tony Lindgren wrote:
> > There are few drivers still breaking because of their
> > use of plat/cpu.h and cpu_is_omap macros. The following
> > already have patches queued in linux next:
> >
> > - drivers/stagin
On Fri, 23 Nov 2012, Felipe Balbi wrote:
> > And maybe the same sort of scheme could be used for clocks, although I
> > don't know how to do it in a generic way that will work on all
> > platforms.
>
> perhaps making use of pm_clk_add() and letting PM layer do the rest for
> us ? If that doesn'
On Fri, 23 Nov 2012, Felipe Balbi wrote:
> > Thanks for the example. The only problem is, how do we associate a
> > regulator to a specific port in the system.
>
> heh, that's the 1 million dollar question, isn't it ? :-)
>
> that's what we need to figure out now. Luckily we have Alan Stern
> he
On Fri, Nov 23, 2012 at 12:46 AM, Tomi Valkeinen wrote:
> Ok, so hmm... So the overlay is disabled, and the paddr is zero. Can you
> put a printk at dss/apply.c:dss_olv_set_info, and print ovl->id and
> info->paddr? And perhaps also to omapfb-main.c:omapfb_setup_overlay, at
> the point where it
On Tue, Nov 20, 2012 at 10:56:20AM +0100, Peter Ujfalusi wrote:
> This driver only supported the Charging indicator LED.
> New set of drivers going to provide support for both PWMs and LEDs for twl4030
> and twl6030 series of PMICs.
>
> Signed-off-by: Peter Ujfalusi
> ---
> drivers/pwm/Kconfig
On Tue, Nov 20, 2012 at 10:56:22AM +0100, Peter Ujfalusi wrote:
> The driver supports the following LED outputs as generic PWM driver:
> TWL4030 LEDA and LEDB (PWMA and PWMB)
> TWL6030 Charging indicator LED (PWM LED)
>
> On TWL6030 when the PWM requested LED is configured to be controlled by SW.
On Tue, Nov 20, 2012 at 10:56:21AM +0100, Peter Ujfalusi wrote:
> The driver supports the following PWM outputs:
> TWL4030 PWM0 and PWM1
> TWL6030 PWM1 and PWM2
>
> On TWL4030 the PWM signals are muxed. Upon requesting the PWM the driver
> will select the correct mux so the PWM can be used. When t
> "Thierry" == Thierry Reding writes:
Hi,
Thierry> Everybody seems to be doing it with a warning, so I guess
Thierry> that's fine for now. I just find it strange that if you
Thierry> request the default pin group to be selected when in fact the
Thierry> hardware doesn't support pinctrl a
Hi Linus,
Here are a few OMAPDSS fixes for the next -rc. I'm sending these directly
to you, and quite late, as the fbdev tree maintainer (Florian) has been
busy with his work and hasn't had time to manage the fb patches.
Tomi
The following changes since commit ddffeb8c4d0331609ef2581d84de4d7636
On Fri, Nov 23, 2012 at 11:12:15AM +, Philip, Avinash wrote:
> On Fri, Nov 23, 2012 at 16:21:10, Thierry Reding wrote:
> > On Fri, Nov 23, 2012 at 10:34:02AM +, Philip, Avinash wrote:
> > > On Fri, Nov 23, 2012 at 02:29:44, Thierry Reding wrote:
> > > > On Wed, Nov 21, 2012 at 06:41:02PM +0
On Fri, Nov 23, 2012 at 16:21:10, Thierry Reding wrote:
> On Fri, Nov 23, 2012 at 10:34:02AM +, Philip, Avinash wrote:
> > On Fri, Nov 23, 2012 at 02:29:44, Thierry Reding wrote:
> > > On Wed, Nov 21, 2012 at 06:41:02PM +0530, Philip, Avinash wrote:
> > > [...]
> > > > + pinctrl = devm_pi
> "Daniel" == Daniel Mack writes:
Hi,
>> The other comment was about hw-romcode not being a very good
>> name, as it apparently means the 1bit hamming code and ECC layout used
>> on the older omap3, and not E.G. the bch8/elm layout used by
>> E.G. am335x.
Daniel> So which name would yo
On Tue, Nov 20, 2012 at 10:33:44, Philip, Avinash wrote:
> As part of PWM subsystem integration, PWM subsystem are sharing
> resources like clock across submodules (ECAP, EQEP & EHRPWM).
> To handle resource sharing & IP integration
> 1. Rework on parent child relation between PWMSS and
>ECAP,
On Tue, Nov 20, 2012 at 10:33:43, Philip, Avinash wrote:
> EHRPWM module requires explicit clock gating from control module.
> Hence add clock node in clock tree for EHRPWM modules.
>
Is there any review on this patch?
This patch depends on EHRPWM to work in am335x.
Thanks
Avinash
> Signed-off-b
On 23.11.2012 11:47, Peter Korsgaard wrote:
>> "Daniel" == Daniel Mack writes:
>
> Hi,
>
> D> + Layouts for 1-bit ecc: stored at beginning of spare area as romcode:
> D> +
> D> + "hw-romcode"gpmc method & romcode layout
> D> + "bch4" 4-bit BCH ecc code
> D>
On Fri, Nov 23, 2012 at 10:34:02AM +, Philip, Avinash wrote:
> On Fri, Nov 23, 2012 at 02:29:44, Thierry Reding wrote:
> > On Wed, Nov 21, 2012 at 06:41:02PM +0530, Philip, Avinash wrote:
> > [...]
> > > + pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
> > > + if (IS_ERR(pinctrl))
> > >
On Fri, Nov 23, 2012 at 12:23:52PM +0200, Roger Quadros wrote:
> On 11/22/2012 06:12 PM, Felipe Balbi wrote:
> > Hi,
> >
> > On Thu, Nov 22, 2012 at 05:00:45PM +0200, Roger Quadros wrote:
> >> On 11/22/2012 03:56 PM, Felipe Balbi wrote:
> >>> Hi,
> >>>
> >>> On Thu, Nov 22, 2012 at 09:49:05PM +080
On Wed, Nov 21, 2012 at 15:45:23, Daniel Mack wrote:
> On 20.11.2012 16:59, Peter Korsgaard wrote:
> >> "Daniel" == Daniel Mack writes:
> >
> > Hi,
> >
> > In omap2 driver NAND_ECC_HW ecc mode supports 3 ecc layout
> > OMAP_ECC_HAMMING_CODE_HW_ROMCODE
> > OMAP_ECC_BCH4_CODE
> "Daniel" == Daniel Mack writes:
Hi,
D> + Layouts for 1-bit ecc: stored at beginning of spare area as romcode:
D> +
D> + "hw-romcode"gpmc method & romcode layout
D> + "bch4" 4-bit BCH ecc code
D> + "bch8" 8-bit BCH ecc code
D> +
>
Hi,
On Thu, Nov 22, 2012 at 09:35:06PM -0500, Alan Stern wrote:
> On Thu, 22 Nov 2012, Felipe Balbi wrote:
>
> > > The latter, more or less. For example, maybe we can tell usbcore
> > > somehow that regulator X is in control of a device attached to host
> > > controller Y (not sure how we would
On Fri, Nov 23, 2012 at 02:46:16, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:40:57PM +0530, Philip, Avinash wrote:
> > In AM33xx PWM sub modules like ECAP, EHRPWM & EQEP are integrated to
> > PWM subsystem. All these submodules shares the resources (clock) & has
> > a clock gating register
On Fri, Nov 23, 2012 at 02:38:57, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:41:06PM +0530, Philip, Avinash wrote:
> > Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to
> > AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by
> > adding necessary pro
On Fri, Nov 23, 2012 at 02:33:47, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:41:03PM +0530, Philip, Avinash wrote:
> [...]
> > +static const struct of_device_id ehrpwm_of_match[] = {
> > + {
> > + .compatible = "ti,am33xx-ehrpwm",
> > + },
>
> Same comment as for patch 4.
Hi Peter,
On 19.11.2012 21:52, Peter Korsgaard wrote:
>> "D" == Daniel Mack writes:
>
> Hi,
>
> D> This patch adds basic DT bindings for OMAP GPMC.
> D> The actual peripherals are instanciated from child nodes within the GPMC
>
> s/instanciated/instantiated/
Thanks, fixed.
>
> D> nod
On Fri, Nov 23, 2012 at 02:41:47, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:41:07PM +0530, Philip, Avinash wrote:
> [...]
> > diff --git a/arch/arm/boot/dts/am335x-evm.dts
> > b/arch/arm/boot/dts/am335x-evm.dts
> > index 9f65f17..4178ba4 100644
> > --- a/arch/arm/boot/dts/am335x-evm.dts
>
On Fri, Nov 23, 2012 at 02:42:45, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:41:08PM +0530, Philip, Avinash wrote:
> > PWM output from ecap2 uses as backlight source. Also adds low threshold
> > value to have a uniform divisions in brightness-levels scales with
> > inverse polarity.
> >
>
On Fri, Nov 23, 2012 at 02:29:44, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:41:02PM +0530, Philip, Avinash wrote:
> [...]
> > + pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
> > + if (IS_ERR(pinctrl))
> > + dev_warn(&pdev->dev, "failed to configure pins from driver\n
On Fri, Nov 23, 2012 at 02:27:33, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:41:01PM +0530, Philip, Avinash wrote:
> [...]
> > +static const struct of_device_id ecap_of_match[] = {
> > + {
> > + .compatible = "ti,am33xx-ecap",
> > + },
>
> Same here, can be shorter by put
On Fri, Nov 23, 2012 at 02:17:04, Thierry Reding wrote:
> On Wed, Nov 21, 2012 at 06:40:58PM +0530, Philip, Avinash wrote:
> [...]
> > +static const struct of_device_id pwmss_of_match[] = {
> > + {
> > + .compatible = "ti,am33xx-pwmss",
> > + },
>
> For consistency with other dri
On 11/22/2012 06:12 PM, Felipe Balbi wrote:
> Hi,
>
> On Thu, Nov 22, 2012 at 05:00:45PM +0200, Roger Quadros wrote:
>> On 11/22/2012 03:56 PM, Felipe Balbi wrote:
>>> Hi,
>>>
>>> On Thu, Nov 22, 2012 at 09:49:05PM +0800, Andy Green wrote:
> Again it sounds like something that should be done a
Hi Thierry,
On 11/20/2012 12:58 PM, Thierry Reding wrote:
>> Oh, I missed to save the updated comment before I commited the change.
>> Can I just send and update patch instead of the whole series again?
>
> Sure.
>
> Sorry for taking so long to review this. I'm rather busy with other
> things bu
Hi Grant,
On 11/23/2012 10:13 AM, Peter Ujfalusi wrote:
> Hi Grant,
>
> On 11/23/2012 08:55 AM, Grant Likely wrote:
>> Ugh. and this is why I wanted the PWM and GPIO subsystems to use the
>> same namespace and binding. But that's not your fault.
>>
>> It's pretty horrible to have a separate tran
On Thu, 2012-11-22 at 16:44 +0200, Tomi Valkeinen wrote:
> On 2012-11-22 16:34, Tero Kristo wrote:
>
> > I guess you checked that DSS pwrdm is switching between RET and ON in
> > your setup?
>
> Yes:
>
> # cat /debug/pm_debug/count |grep dss
> [ 35.356567] pwrdm state mismatch(l3init_pwrdm) 3
Hi Grant,
On 11/23/2012 08:55 AM, Grant Likely wrote:
> Ugh. and this is why I wanted the PWM and GPIO subsystems to use the
> same namespace and binding. But that's not your fault.
>
> It's pretty horrible to have a separate translator node to convert a PWM
> into a GPIO (with output only of co
On 2012-11-23 08:14, Steve Sakoman wrote:
> On Thu, Nov 22, 2012 at 12:47 AM, Tomi Valkeinen
> wrote:
>
>>> I'll add the printk's to omapfb_setup_plane() that were requested by
>>> Tomi and report back.
>
> Today was a holiday, so family obligations didn't allow much time to
> look at this.
>
Add phy id for CPSW
Signed-off-by: Mugunthan V N
---
The patch is verified with CPSW patches present in the following git repo
git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
arch/arm/boot/dts/am335x-evmsk.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
d
On Thu, 22 Nov 2012 14:42:03 +0100, Peter Ujfalusi
wrote:
> There seams to be board designs using PWM generators as enable/disable
> signals.
> For these boards we used to have custom code as hacks to deal with such a
> situations.
> With the gpio-pwm driver we can emulate the GPIO functionality
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