Gururaja,
On 7/2/2013 11:42 AM, Sekhar Nori wrote:
Changing to Benoit's gmail id since he apparently wont access TI mail
anymore.
On 6/28/2013 3:05 PM, Hebbar Gururaja wrote:
Since AM33xx RTC IP has RTC_IRQWAKEEN to support Alarm Wake-up.
Update the rtc compatible property to
On some platforms (like AM33xx), a special register (RTC_IRQWAKEEN)
is available to enable Alarm Wakeup feature. This register needs to be
properly handled for the rtcwake to work properly.
Platforms using such IP should set ti,am3352-rtc in rtc device dt
compatibility node.
Signed-off-by:
rtc-omap driver modules is used both by OMAP1/2, Davinci SoC platforms.
However, rtc wake support on OMAP1 is broken. Hence the
device_init_wakeup() was removed from rtc-omap driver and moved to
platform board files that supported it (DA850/OMAP-L138). [1]
However, recently [2] it was suggested
Since now rtc-omap driver itself calls deice_init_wakeup(dev, true),
duplicate call from the rtc device registration can be removed.
This is basically a partial revert of the prev commit
commit 75c99bb0006ee065b4e2995078d779418b0fab54
Author: Sekhar Nori nsek...@ti.com
davinci:
Since AM33xx RTC IP has RTC_IRQWAKEEN to support Alarm Wake-up.
Update the rtc compatible property to ti,am3352-rtc to enable handling
of this feature inside rtc-omap driver.
Signed-off-by: Hebbar Gururaja gururaja.heb...@ti.com
---
:100644 100644 77aa1b0... dde180a... M
rtc-omap driver modules is used both by OMAP1/2, Davinci SoC platforms.
However, rtc wake support on OMAP1 is broken. Hence the
device_init_wakeup() was removed from rtc-omap driver and moved to
platform board files that supported it (DA850/OMAP-L138). [1]
However, recently [2] it was suggested
On 07/02/2013 08:17 PM, Alan Stern wrote:
On Tue, 2 Jul 2013, Roger Quadros wrote:
On 07/02/2013 12:01 AM, Alan Stern wrote:
On Mon, 1 Jul 2013, Felipe Balbi wrote:
I don't know what Pad wakeup is. The wakeup signal has to originate
from the EHCI controller, doesn't it? If not, how does
Hi Kishon,
-Original Message-
From: ABRAHAM, KISHON VIJAY
Sent: Wednesday, June 26, 2013 5:17 PM
To: grant.lik...@linaro.org; t...@atomide.com; Balbi, Felipe; ABRAHAM,
KISHON VIJAY; a...@arndb.de; swar...@nvidia.com;
sylvester.nawro...@gmail.com; linux-ker...@vger.kernel.org; linux-
Hi,
On Tue, Jul 2, 2013 at 5:55 PM, Luciano Coelho coe...@ti.com wrote:
Hi,
This is a follow-up on a previous patch set that had a smaller
audience. This time, I added the lists and people who were involved
in the review of the bindings documentation, since most of my changes
in v2 are
From: Mona Anonuevo manonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices. The idea
is to have a common model under drivers/mtd, as also present for other non spi
devices(there is a generic
* Luciano Coelho coe...@ti.com [130702 13:33]:
On Tue, 2013-07-02 at 10:02 -0500, Nishanth Menon wrote:
On 17:55-20130702, Luciano Coelho wrote:
Instead of defining an enumeration with the FW specific values for the
different clock rates, use the actual frequency instead. Also add a
On Wed, 2013-07-03 at 04:33 -0700, Tony Lindgren wrote:
* Luciano Coelho coe...@ti.com [130702 13:33]:
On Tue, 2013-07-02 at 10:02 -0500, Nishanth Menon wrote:
On 17:55-20130702, Luciano Coelho wrote:
Instead of defining an enumeration with the FW specific values for the
different
Hi,
On Tue, Jul 02, 2013 at 01:17:58PM -0400, Alan Stern wrote:
A PCI-based EHCI controller has two power sources: the core well (which
is turned off during suspend) and the auxiliary well (which remains
powered). That's how remote wakeup works; it uses the auxiliary well.
This, kinda,
On Tuesday 02 July 2013, Pekon Gupta wrote:
(+ CC: devicetree-disc...@lists.ozlabs.org)
Changes v3 - v4
- [Patch 1/3] removed MTD_NAND_OMAP_BCH8 MTD_NAND_OMAP_BCH4 from
nand/Kconfig
ECC scheme selectable via nand DT (nand-ecc-opt).
- [*] rebased for l2-mtd.git
Do you also fix
On 07/03/2013 03:57 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 01:17:58PM -0400, Alan Stern wrote:
A PCI-based EHCI controller has two power sources: the core well (which
is turned off during suspend) and the auxiliary well (which remains
powered). That's how remote wakeup works;
On Wed, Jul 03, 2013 at 04:06:04PM +0300, Roger Quadros wrote:
On 07/03/2013 03:57 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 01:17:58PM -0400, Alan Stern wrote:
A PCI-based EHCI controller has two power sources: the core well (which
is turned off during suspend) and the
On Tuesday 02 July 2013, Pekon Gupta wrote:
(+ CC: devicetree-disc...@lists.ozlabs.org)
Changes v3 - v4
- [Patch 1/3] removed MTD_NAND_OMAP_BCH8
MTD_NAND_OMAP_BCH4 from nand/Kconfig
ECC scheme selectable via nand DT (nand-ecc-opt).
- [*] rebased for l2-mtd.git
Do you also
On Wed, 2013-07-03 at 13:16 +, Gupta, Pekon wrote:
[Pekon]: Yes, I'm not seeing these build issues, as I'm cleanly
returning from probe with pr_err(), if the required libraries (/lib/bch.c)
are not build-in the system.
---
[Patch v4 1/4]: mtd:nand:omap2: clean-up BCHx_HW
On Wednesday 03 July 2013, Artem Bityutskiy wrote:
On Wed, 2013-07-03 at 13:16 +, Gupta, Pekon wrote:
[Pekon]: Yes, I'm not seeing these build issues, as I'm cleanly
returning from probe with pr_err(), if the required libraries (/lib/bch.c)
are not build-in the system.
On Wed, 2013-07-03 at 13:13 +0300, Grazvydas Ignotas wrote:
Hi,
Hi GraÅžvydas,
On Tue, Jul 2, 2013 at 5:55 PM, Luciano Coelho coe...@ti.com wrote:
Hi,
This is a follow-up on a previous patch set that had a smaller
audience. This time, I added the lists and people who were involved
Ping..
On Wednesday 19 June 2013 03:52 PM, Santosh Shilimkar wrote:
ARM errata 798181 is applicable for OMAP5 based devices. So enable
the same in the build. Errata extract and workaround information
is as below.
On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
adequately
Read the clock nodes from the device tree and use them to set the
frequency for the refclock and the tcxo clock.
Also, call sdio_set_drvdata() earlier, so the glue is already set in
the driver data when we call wlcore_get_pdata_from_of() and we don't
need to pass it as a parameter.
Add refclock and tcxoclock as clock providers in WiLink. These clocks
are not accesible outside the WiLink module, but they are registered
in the clock framework anyway. Only the WiLink chip consumes these
clocks.
In theory, the WiLink chip could be connected to external clocks
instead of using
Instead of defining an enumeration with the FW specific values for the
different clock rates, use the actual frequency instead. Also add a
boolean to specify whether the clock is XTAL or not.
Change all board files to reflect this.
Cc: Tony Lindgren t...@atomide.com
Cc: Sekhar Nori
The fref and the tcxo clocks settings are optional in some platforms.
WiLink8 doesn't need either, so we don't check the values. WiLink 6
only needs the fref clock, so we check that it is valid or return with
an error. WiLink7 needs both clocks, if either is not available we
return with an
Hi,
This patch series adds device tree support to the wlcore_sdio driver,
which is used by WiLink6, WiLink7 and WiLink8.
The first patches do some clean-up to make the data needed in the
wilink device tree node smaller. The remaining patches implement the
actual device tree node parsing in
If platform data is not available, try to get the required information
from the device tree. Register an OF match table and parse the
appropriate device tree nodes.
Parse interrupt property only, for now.
Signed-off-by: Luciano Coelho coe...@ti.com
---
drivers/net/wireless/ti/wlcore/sdio.c |
Move the wl1251 part of the wl12xx platform data structure into a new
structure specifically for wl1251. Change the platform data built-in
block and board files accordingly.
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Luciano Coelho coe...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
The pwr_in_suspend flag depends on the MMC settings which can be
retrieved from the SDIO subsystem, so it doesn't need to be part of
the platform data structure. Move it to the platform device data that
is passed from SDIO to wlcore.
Signed-off-by: Luciano Coelho coe...@ti.com
---
The platform_quirk element in the platform data was used to change the
way the IRQ is triggered. When set, the EDGE_IRQ quirk would change
the irqflags used and treat edge trigger differently from the rest.
Instead of hiding this irq flag setting behind the quirk, have the
board files set the
On Wed, Jul 03, 2013 at 05:03:22PM +0300, Luciano Coelho wrote:
Move the wl1251 part of the wl12xx platform data structure into a new
structure specifically for wl1251. Change the platform data built-in
block and board files accordingly.
Cc: Tony Lindgren t...@atomide.com
Signed-off-by:
On Wed, Jul 03, 2013 at 05:03:24PM +0300, Luciano Coelho wrote:
The pwr_in_suspend flag depends on the MMC settings which can be
retrieved from the SDIO subsystem, so it doesn't need to be part of
the platform data structure. Move it to the platform device data that
is passed from SDIO to
On Wed, 2013-07-03 at 17:03 +0300, Luciano Coelho wrote:
The platform_quirk element in the platform data was used to change the
way the IRQ is triggered. When set, the EDGE_IRQ quirk would change
the irqflags used and treat edge trigger differently from the rest.
Instead of hiding this irq
On Wed, Jul 03, 2013 at 05:03:25PM +0300, Luciano Coelho wrote:
Instead of defining an enumeration with the FW specific values for the
different clock rates, use the actual frequency instead. Also add a
boolean to specify whether the clock is XTAL or not.
Change all board files to reflect
On Wed, Jul 03, 2013 at 05:03:26PM +0300, Luciano Coelho wrote:
If platform data is not available, try to get the required information
from the device tree. Register an OF match table and parse the
appropriate device tree nodes.
Parse interrupt property only, for now.
Signed-off-by:
On Wed, 2013-07-03 at 17:13 +0300, Felipe Balbi wrote:
Hi,
On Wed, Jul 03, 2013 at 05:03:23PM +0300, Luciano Coelho wrote:
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 56a9a4f..953f620 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
On Wed, Jul 03, 2013 at 05:03:29PM +0300, Luciano Coelho wrote:
The fref and the tcxo clocks settings are optional in some platforms.
WiLink8 doesn't need either, so we don't check the values. WiLink 6
only needs the fref clock, so we check that it is valid or return with
an error. WiLink7
Hi,
On Wed, Jul 03, 2013 at 05:03:23PM +0300, Luciano Coelho wrote:
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 56a9a4f..953f620 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -703,12 +703,30 @@
On Wed, Jul 03, 2013 at 05:18:14PM +0300, Luciano Coelho wrote:
On Wed, 2013-07-03 at 17:13 +0300, Felipe Balbi wrote:
Hi,
On Wed, Jul 03, 2013 at 05:03:23PM +0300, Luciano Coelho wrote:
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index
On Wed, 3 Jul 2013, Felipe Balbi wrote:
On Wed, Jul 03, 2013 at 04:06:04PM +0300, Roger Quadros wrote:
On 07/03/2013 03:57 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 01:17:58PM -0400, Alan Stern wrote:
A PCI-based EHCI controller has two power sources: the core well
On Wed, Jul 3, 2013 at 4:15 PM, Luciano Coelho coe...@ti.com wrote:
On Wed, 2013-07-03 at 17:03 +0300, Luciano Coelho wrote:
The platform_quirk element in the platform data was used to change the
way the IRQ is triggered. When set, the EDGE_IRQ quirk would change
the irqflags used and treat
I'm struggling to determine if AUTORTS mode is currently supported in 3.10 ?
I have dug into the source code, and can see various references to the relevant
bits
in the various UART registers, but I'm at a lose as to how to actually *enable*
the
mode !!
In drivers/tty/omap-serial.c
Hello,
2013/7/3 Sourav Poddar sourav.pod...@ti.com:
From: Mona Anonuevo manonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices. The idea
is to have a common model under drivers/mtd, as also
Copying some more lists are we're also discussing the DMA controller in the
SoCs. Thanks.
On 07/03/2013 04:43 AM, Mark Brown wrote:
On Wed, Jul 03, 2013 at 11:09:22AM +0200, Lars-Peter Clausen wrote:
On 07/02/2013 02:13 PM, Mark Brown wrote:
This sort of cyclic thing tends to be best,
On Wednesday 03 July 2013, Artem Bityutskiy wrote:
On Wed, 2013-07-03 at 13:16 +, Gupta, Pekon wrote:
[Pekon]: Yes, I'm not seeing these build issues, as I'm cleanly
returning from probe with pr_err(), if the required libraries (/lib/bch.c)
are not build-in the system.
On Wed, Jul 03, 2013 at 12:55:36PM -0500, Joel Fernandes wrote:
When would it not be possible to cope with a large period size? Are there any
guidelines on what to consider when fixing a period size?
This is an application issue not a driver issue. An application that
wants low latency may
On 07/03/2013 01:12 PM, Mark Brown wrote: On Wed, Jul 03, 2013 at 12:55:36PM
-0500, Joel Fernandes wrote:
When would it not be possible to cope with a large period size? Are there any
guidelines on what to consider when fixing a period size?
This is an application issue not a driver issue.
On Tue, 2 Jul 2013, Nishanth Menon wrote:
On 07/01/2013 11:29 PM, Hiremath, Vaibhav wrote:
-Original Message-
From: Paul Walmsley [mailto:p...@pwsan.com]
Sent: Monday, July 01, 2013 7:46 AM
To: Vutla, Lokesh
Cc: Nayak, Rajendra; Hiremath, Vaibhav; Kevin Hilman; Rini,
Hi Mike,
On 07/03/2013 08:17 AM, Mike Looijmans wrote:
On 07/03/2013 11:43 AM, Mark Brown wrote:
On Wed, Jul 03, 2013 at 11:09:22AM +0200, Lars-Peter Clausen wrote:
On 07/02/2013 02:13 PM, Mark Brown wrote:
This sort of cyclic thing tends to be best, ideally you don't need
interrupts at all
Hi,
On Wednesday 03 July 2013 10:47 PM, Florian Fainelli wrote:
Hello,
2013/7/3 Sourav Poddarsourav.pod...@ti.com:
From: Mona Anonuevomanonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices. The
On 7/3/2013 7:33 PM, Luciano Coelho wrote:
The platform_quirk element in the platform data was used to change the
way the IRQ is triggered. When set, the EDGE_IRQ quirk would change
the irqflags used and treat edge trigger differently from the rest.
Instead of hiding this irq flag setting
Correction of the omap_usb3_dpll_params array when the sys_clk_rate is
20MHz.
Signed-off-by: Nikhil Devshatwar nikhil...@ti.com
Signed-off-by: Ruchika Kharwar ruch...@ti.com
---
drivers/usb/phy/phy-omap-usb3.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
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