Hi Russ,
On 05/03/12 22:08, Russ Dill wrote:
On Wed, May 2, 2012 at 3:38 AM, Raja, Govindraj govindraj.r...@ti.com wrote:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Mon, Mar 19, 2012 at
On Thu, May 3, 2012 at 11:03 PM, Igor Grinberg grinb...@compulab.co.il wrote:
Hi Russ,
On 05/03/12 22:08, Russ Dill wrote:
On Wed, May 2, 2012 at 3:38 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at
On 05/04/12 12:06, Russ Dill wrote:
On Thu, May 3, 2012 at 11:03 PM, Igor Grinberg grinb...@compulab.co.il
wrote:
Hi Russ,
On 05/03/12 22:08, Russ Dill wrote:
On Wed, May 2, 2012 at 3:38 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill
On Thu, May 3, 2012 at 6:55 AM, Russ Dill russ.d...@ti.com wrote:
On Wed, May 2, 2012 at 3:38 AM, Raja, Govindraj govindraj.r...@ti.com wrote:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On
On Wed, May 2, 2012 at 3:38 AM, Raja, Govindraj govindraj.r...@ti.com wrote:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
Op 2 mei 2012, om 10:47 heeft Russ Dill het volgende geschreven:
[0.198272] omap-mcbsp.3: alias fck already exists
[3.461212] clock: dpll1_ck failed transition to 'locked'
What's happening in those 3.3 seconds?
regards,
Koen
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On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that
Op 2 mei 2012, om 12:38 heeft Raja, Govindraj het volgende geschreven:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
keshava_mgo...@ti.com
On Wed, May 2, 2012 at 4:20 PM, Koen Kooi k...@dominion.thruhere.net wrote:
Op 2 mei 2012, om 12:38 heeft Raja, Govindraj het volgende geschreven:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Wed, May 2, 2012 at 3:38 AM, Raja, Govindraj govindraj.r...@ti.com wrote:
On Wed, May 2, 2012 at 2:17 PM, Russ Dill russ.d...@ti.com wrote:
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com
wrote:
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
On Mon, Mar 19, 2012 at 6:34 AM, Raja, Govindraj govindraj.r...@ti.com wrote:
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random
Hi Samuel,
On 04/16/12 19:46, Samuel Ortiz wrote:
Hi Keshava,
On Wed, Apr 11, 2012 at 05:15:03PM +0530, Munegowda, Keshava wrote:
On Tue, Mar 27, 2012 at 8:40 PM, Igor Grinberg grinb...@compulab.co.il
wrote:
On 03/19/12 08:42, Keshava Munegowda wrote:
From: Keshava Munegowda
On Mon, Apr 16, 2012 at 10:16 PM, Samuel Ortiz sa...@linux.intel.com wrote:
Hi Keshava,
On Wed, Apr 11, 2012 at 05:15:03PM +0530, Munegowda, Keshava wrote:
On Tue, Mar 27, 2012 at 8:40 PM, Igor Grinberg grinb...@compulab.co.il
wrote:
On 03/19/12 08:42, Keshava Munegowda wrote:
From:
Hi Keshava,
On Wed, Apr 11, 2012 at 05:15:03PM +0530, Munegowda, Keshava wrote:
On Tue, Mar 27, 2012 at 8:40 PM, Igor Grinberg grinb...@compulab.co.il
wrote:
On 03/19/12 08:42, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of
On Tue, Mar 27, 2012 at 8:40 PM, Igor Grinberg grinb...@compulab.co.il wrote:
On 03/19/12 08:42, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random timing of programming
the associated
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Felipe, Samuel,
On 03/20/12 17:55, Felipe Balbi wrote:
On Tue, Mar 20, 2012 at 04:53:53PM +0100, Samuel Ortiz wrote:
Hi Keshava,
On Mon, Mar 19, 2012 at 12:12:47PM +0530, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
Hi Igor,
On Tue, Mar 27, 2012 at 04:18:49PM +0200, Igor Grinberg wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Felipe, Samuel,
On 03/20/12 17:55, Felipe Balbi wrote:
On Tue, Mar 20, 2012 at 04:53:53PM +0100, Samuel Ortiz wrote:
Hi Keshava,
On Mon, Mar 19, 2012 at
On 03/19/12 08:42, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random timing of programming
the associated GPIOs of the ULPI PHYs of the EHCI for reset.
If the PHYs are reset at during
On Tue, Mar 20, 2012 at 9:25 PM, Felipe Balbi ba...@ti.com wrote:
On Tue, Mar 20, 2012 at 04:53:53PM +0100, Samuel Ortiz wrote:
Hi Keshava,
On Mon, Mar 19, 2012 at 12:12:47PM +0530, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports
Hi Keshava,
On Mon, Mar 19, 2012 at 12:12:47PM +0530, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random timing of programming
the associated GPIOs of the ULPI PHYs of the EHCI for
On Tue, Mar 20, 2012 at 04:53:53PM +0100, Samuel Ortiz wrote:
Hi Keshava,
On Mon, Mar 19, 2012 at 12:12:47PM +0530, Keshava Munegowda wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random timing of
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random timing of programming
the associated GPIOs of the ULPI PHYs of the EHCI for
On Mon, Mar 19, 2012 at 7:04 PM, Raja, Govindraj govindraj.r...@ti.com wrote:
On Mon, Mar 19, 2012 at 12:12 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
It is observed that the echi ports of 3430 sdp board
are not working due to the random
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