Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
On Wed, Oct 14, 2009 at 2:26 AM, Tony Lindgren t...@atomide.com wrote: * kishore kadiyala kishorek.kadiy...@gmail.com [091012 23:54]: Tony, On Fri, Oct 9, 2009 at 11:16 PM, Tony Lindgren t...@atomide.com wrote: * G, Manjunath Kondaiah manj...@ti.com [091008 00:41]: Govind, -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Govindraj Sent: Thursday, October 08, 2009 11:44 AM To: Tony Lindgren Cc: Raja, Govindraj; linux-omap@vger.kernel.org; linux-ker...@vger.kernel.org; linux-ser...@vger.kernel.org Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support. On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren t...@atomide.com wrote: * Govindraj.R govindraj.r...@ti.com [090924 03:29]: From: Govindraj R govindraj.r...@ti.com This patch adds support for OMAP3430-HIGH SPEED UART Controller. Signed-off-by: Govindraj R govindraj.r...@ti.com Reviewed-by: Alan Cox a...@lxorguk.ukuu.org.uk Reviewed-by: Tony Lindgren t...@atomide.com You should only add Reviewed-by if Alan or me have replied with it. So far I've only replied with some comments that have not yet been fixed, so we're few more steps from being Reviewd-by. snip diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 6553833..67a7129 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM Currently, only 8250 compatible ports are supported, but others can easily be added. +config SERIAL_OMAP + bool OMAP serial port support + depends on ARM ARCH_OMAP + select SERIAL_CORE + help + If you have a machine based on an Texas Instruments OMAP CPU you + can enable its onboard serial ports by enabling this option. + +config SERIAL_OMAP_CONSOLE + bool Console on OMAP serial port + depends on SERIAL_OMAP + select SERIAL_CORE_CONSOLE + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can make it the console by answering Y to this option. + + Even if you say Y here, the currently visible virtual console + (/dev/tty0) will still be used as the system console by default, but + you can alter that using a kernel command line option such as + console=ttyS0. (Try man bootparam or see the documentation of + your boot loader (lilo or loadlin) about how to pass options to the + kernel at boot time.) + +config SERIAL_OMAP_DMA_UART1 + bool UART1 DMA support + depends on SERIAL_OMAP + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can enable the DMA transfer on UART 1 by answering + to this option. + +config SERIAL_OMAP_DMA_UART2 + bool UART2 DMA support + depends on SERIAL_OMAP + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can enable the DMA transfer on UART 2 by answering + to this option. + +config SERIAL_OMAP_DMA_UART3 + bool UART3 DMA support + depends on SERIAL_OMAP + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can enable the DMA transfer on UART 3 by answering + to this option. + config SERIAL_OF_PLATFORM_NWPSERIAL tristate NWP serial port driver depends on PPC_OF PPC_DCR There's absolutely no need for having Kconfig options for the DMA support. Please pass that in platform_data from the board-*.c files. This is the third time I'm commenting on the same issue! What's the point of posting these patches for review if the issues don't get solved? The omap-serial uart driver is designed to work either in interrupt mode or in DMA mode, We have provided this option so that one can select interrupt mode or DMA mode based on the uart usage, if somebody is using uart as console then interrupt mode will do, else if used with bluetooth which does huge data transfer then DMA mode can be selected. Don't you think this should be a configurable option using kconfig rather than passing as platform data? Nope. I think it should be platform_data and should be possible to override vith a kernel cmdline option. That's because we support compiling in and booting many boards the same kernel binary. if used as platform data then one has to modify platform data to switch between the interrupt and DMA mode. How about set some kernel cmdline options if you want to override the default settings? Using cmdline options, will make specific UART switch dynamically between Non-DMA and
Re: [alsa-devel] [PATCH 4/4 v2] ASoC: TWL4030: Driver registration via twl4030_codec MFD
On Fri, Oct 23, 2009 at 08:27:55AM +0300, Peter Ujfalusi wrote: Hmm, what do you mean by that? I have checked it, and selecting the machine driver will enables the MFD_CORE and TWL4030_CODEC in .config, also disabling the machine driver will also disable the MFD_CORE and the TWL4030_CODEC. Can you go into details? Kconfig has never guaranteed to pay any attention to dependencies of things that were enabled as a result of a select statement - they would be silently ignored. I've done some tests and it does seem that this is doing what would be expected at the minute but looking at the Kconfig changelogs I can't see anything that makes this an intentional change. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 12/32] OMAP: PM: DMA context save/restore for off-mode support
On Fri, Oct 23, 2009 at 4:39 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
From: Tero Kristo tero.kri...@nokia.com
For HS/EMU devices, these additional features are also used:
- DMA interrupt disable routine added
- Added DMA controller reset to DMA context restore
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 3 ++
arch/arm/plat-omap/dma.c | 41
+
arch/arm/plat-omap/include/plat/dma.h | 5
3 files changed, 49 insertions(+), 0 deletions(-)
mode change 100644 = 100755 arch/arm/plat-omap/include/plat/dma.h
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index bab9b48..54fea79 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -34,6 +34,7 @@
#include plat/sdrc.h
#include plat/prcm.h
#include plat/gpmc.h
+#include plat/dma.h
#include asm/tlbflush.h
@@ -95,6 +96,7 @@ static void omap3_core_save_context(void)
omap3_gpmc_save_context();
/* Save the system control module context, padconf already save above*/
omap3_control_save_context();
+ omap_dma_global_context_save();
}
static void omap3_core_restore_context(void)
@@ -105,6 +107,7 @@ static void omap3_core_restore_context(void)
omap3_gpmc_restore_context();
/* Restore the interrupt controller context */
omap_intc_restore_context();
+ omap_dma_global_context_restore();
}
/*
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 3edffde..c0a6060 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -54,6 +54,12 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
static int enable_1510_mode;
+static struct omap_dma_global_context_registers {
+ u32 dma_irqenable_l0;
+ u32 dma_ocp_sysconfig;
+ u32 dma_gcr;
+} omap_dma_global_context;
+
struct omap_dma_lch {
int next_lch;
int dev_id;
@@ -2341,6 +2347,41 @@ void omap_stop_lcd_dma(void)
}
EXPORT_SYMBOL(omap_stop_lcd_dma);
+void omap_dma_global_context_save(void)
+{
+ omap_dma_global_context.dma_irqenable_l0 =
+ dma_read(IRQENABLE_L0);
+ omap_dma_global_context.dma_ocp_sysconfig =
+ dma_read(OCP_SYSCONFIG);
+ omap_dma_global_context.dma_gcr = dma_read(GCR);
+}
+EXPORT_SYMBOL(omap_dma_global_context_save);
+
+void omap_dma_global_context_restore(void)
+{
+ dma_write(0x2, OCP_SYSCONFIG);
+ while (!__raw_readl(omap_dma_base + OMAP_DMA4_SYSSTATUS))
+ ;
+ dma_write(omap_dma_global_context.dma_gcr, GCR);
+ dma_write(omap_dma_global_context.dma_ocp_sysconfig,
+ OCP_SYSCONFIG);
+ dma_write(omap_dma_global_context.dma_irqenable_l0,
+ IRQENABLE_L0);
+}
+EXPORT_SYMBOL(omap_dma_global_context_restore);
+
+void omap_dma_disable_irq(int lch)
+{
+ u32 val;
+
+ if (cpu_class_is_omap2()) {
+ /* Disable interrupts */
+ val = dma_read(IRQENABLE_L0);
+ val = ~(1 lch);
+ dma_write(val, IRQENABLE_L0);
+ }
+}
+
Just curious - Doesn't it need EXPORT_SYMBOL() ?
Is this used somewhere ? If yes,
would be nice to have omap_dma_enable_irq as well
/**/
static int __init omap_init_dma(void)
diff --git a/arch/arm/plat-omap/include/plat/dma.h
b/arch/arm/plat-omap/include/plat/dma.h
old mode 100644
new mode 100755
index 72f680b..1c017b2
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -633,6 +633,11 @@ extern void omap_set_dma_dst_endian_type(int lch, enum
end_type etype);
extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
extern int omap_get_dma_index(int lch, int *ei, int *fi);
+void omap_dma_global_context_save(void);
+void omap_dma_global_context_restore(void);
+
+extern void omap_dma_disable_irq(int lch);
+
/* Chaining APIs */
#ifndef CONFIG_ARCH_OMAP1
extern int omap_request_dma_chain(int dev_id, const char *dev_name,
--
1.6.4.3
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Re: [PATCH 1/4 v2] MFD: twl4030: add twl4030_codec MFD as a new child to the core
Hi Peter,
On Thu, Oct 22, 2009 at 01:26:45PM +0300, Peter Ujfalusi wrote:
New MFD child to twl4030 MFD device.
Reason for the twl4030_codec MFD: the vibra control is actually in the codec
part of the twl4030. If both the vibra and the audio functionality is needed
from the twl4030 at the same time, than they need to control the codec power
and APLL at the same time without breaking the other driver.
Also these two has to be able to work without the need for the other driver.
This MFD device will be used by the drivers, which needs resources
from the twl4030 codec like audio and vibra.
The platform specific configuration data is passed along to the
child drivers (audio, vibra).
Signed-off-by: Peter Ujfalusi peter.ujfal...@nokia.com
As agreed, Mark is taking this one. So:
Acked-by: Samuel Ortiz sa...@linux.intel.com
Cheers,
Samuel.
---
drivers/mfd/Kconfig |6 +
drivers/mfd/Makefile |1 +
drivers/mfd/twl4030-codec.c | 241 +
drivers/mfd/twl4030-core.c| 14 ++
include/linux/i2c/twl4030.h | 18 +++
include/linux/mfd/twl4030-codec.h | 271
+
6 files changed, 551 insertions(+), 0 deletions(-)
create mode 100644 drivers/mfd/twl4030-codec.c
create mode 100644 include/linux/mfd/twl4030-codec.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 570be13..08f2d07 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -121,6 +121,12 @@ config TWL4030_POWER
and load scripts controling which resources are switched off/on
or reset when a sleep, wakeup or warm reset event occurs.
+config TWL4030_CODEC
+ bool
+ depends on TWL4030_CORE
+ select MFD_CORE
+ default n
+
config MFD_TMIO
bool
default n
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index f3b277b..af0fc90 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_MENELAUS) += menelaus.o
obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o
obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
+obj-$(CONFIG_TWL4030_CODEC) += twl4030-codec.o
obj-$(CONFIG_MFD_MC13783)+= mc13783-core.o
diff --git a/drivers/mfd/twl4030-codec.c b/drivers/mfd/twl4030-codec.c
new file mode 100644
index 000..9710307
--- /dev/null
+++ b/drivers/mfd/twl4030-codec.c
@@ -0,0 +1,241 @@
+/*
+ * MFD driver for twl4030 codec submodule
+ *
+ * Author: Peter Ujfalusi peter.ujfal...@nokia.com
+ *
+ * Copyright: (C) 2009 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include linux/module.h
+#include linux/types.h
+#include linux/kernel.h
+#include linux/fs.h
+#include linux/platform_device.h
+#include linux/i2c/twl4030.h
+#include linux/mfd/core.h
+#include linux/mfd/twl4030-codec.h
+
+#define TWL4030_CODEC_CELLS 2
+
+static struct platform_device *twl4030_codec_dev;
+
+struct twl4030_codec_resource {
+ int request_count;
+ u8 reg;
+ u8 mask;
+};
+
+struct twl4030_codec {
+ struct mutex mutex;
+ struct twl4030_codec_resource resource[TWL4030_CODEC_RES_MAX];
+ struct mfd_cell cells[TWL4030_CODEC_CELLS];
+};
+
+/*
+ * Modify the resource, the function returns the content of the register
+ * after the modification.
+ */
+static int twl4030_codec_set_resource(enum twl4030_codec_res id, int enable)
+{
+ struct twl4030_codec *codec = platform_get_drvdata(twl4030_codec_dev);
+ u8 val;
+
+ twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, val,
+ codec-resource[id].reg);
+
+ if (enable)
+ val |= codec-resource[id].mask;
+ else
+ val = ~codec-resource[id].mask;
+
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ val, codec-resource[id].reg);
+
+ return val;
+}
+
+static inline int twl4030_codec_get_resource(enum twl4030_codec_res id)
+{
+ struct twl4030_codec *codec = platform_get_drvdata(twl4030_codec_dev);
+ u8 val;
+
+ twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, val,
+ codec-resource[id].reg);
+
+ return val;
+}
+
+/*
+ * Enable the resource.
+ * The function returns with error
Re: [PATCH v2] twl4030: Enable low-power mode to 32kHz oscillator
Hi Ilkka,
On Thu, Oct 22, 2009 at 02:14:09PM +0300, Ilkka Koskinen wrote:
Allows TWL's 32kHz oscillator to go in low-power mode when
main battery voltage is running low.
Patch applied, thanks a lot.
Cheers,
Samuel.
Signed-off-by: Ilkka Koskinen ilkka.koski...@nokia.com
---
drivers/mfd/twl4030-core.c |9 +++--
include/linux/i2c/twl4030.h |5 +
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index eee5af8..004a8be 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -177,6 +177,7 @@
#define HFCLK_FREQ_26_MHZ(2 0)
#define HFCLK_FREQ_38p4_MHZ (3 0)
#define HIGH_PERF_SQ (1 3)
+#define CK32K_LOWPWR_EN (1 7)
/* chip-specific feature flags, for i2c_device_id.driver_data */
@@ -681,7 +682,8 @@ static inline int __init unprotect_pm_master(void)
return e;
}
-static void clocks_init(struct device *dev)
+static void clocks_init(struct device *dev,
+ struct twl4030_clock_init_data *clock)
{
int e = 0;
struct clk *osc;
@@ -728,6 +730,9 @@ static void clocks_init(struct device *dev)
}
ctrl |= HIGH_PERF_SQ;
+ if (clock clock-ck32k_lowpwr_enable)
+ ctrl |= CK32K_LOWPWR_EN;
+
e |= unprotect_pm_master();
/* effect-MADC+USB ck en */
e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
@@ -806,7 +811,7 @@ twl4030_probe(struct i2c_client *client, const struct
i2c_device_id *id)
inuse = true;
/* setup clock framework */
- clocks_init(client-dev);
+ clocks_init(client-dev, pdata-clock);
/* load power event scripts */
if (twl_has_power() pdata-power)
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index 4a2fb27..10e68cb 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -313,6 +313,10 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg,
unsigned num_bytes);
/*--*/
+struct twl4030_clock_init_data {
+ bool ck32k_lowpwr_enable;
+};
+
struct twl4030_bci_platform_data {
int *battery_tmp_tbl;
unsigned int tblsize;
@@ -407,6 +411,7 @@ extern void twl4030_power_init(struct twl4030_power_data
*triton2_scripts);
struct twl4030_platform_data {
unsignedirq_base, irq_end;
+ struct twl4030_clock_init_data *clock;
struct twl4030_bci_platform_data*bci;
struct twl4030_gpio_platform_data *gpio;
struct twl4030_madc_platform_data *madc;
--
1.6.0.4
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http://oss.intel.com/
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RE: [PATCH V4 3/3] OMAP: I2C: Add mpu wake up latency constraint in i2c
Hello Jokiniemi!
-Original Message-
From: Kalle Jokiniemi [mailto:kalle.jokini...@digia.com]
Sent: Wednesday, October 21, 2009 6:51 AM
To: khil...@deeprootsystems.com
Cc: linux-omap@vger.kernel.org; Kalle Jokiniemi; Sonasath, Moiz; Jarkko
Nikula; Paul Walmsley; Menon, Nishanth
Subject: [PATCH V4 3/3] OMAP: I2C: Add mpu wake up latency constraint in
i2c
While waiting for completion of the i2c transfer, the
MPU could hit OFF mode and cause several msecs of
delay that made i2c transfers fail more often. The
extra delays and subsequent re-trys cause i2c clocks
to be active more often. This has also an negative
effect on power consumption.
Created a mechanism for passing and using the
constraint setting function in driver code. The used
mpu wake up latency constraints are now set individually
per bus, and they are calculated based on clock rate
and fifo size.
Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley,
and Nishanth Menon for tuning out the details of
this patch.
Cc: Moiz Sonasath m-sonas...@ti.com
Cc: Jarkko Nikula jhnik...@gmail.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Nishanth Menon n...@ti.com
Signed-off-by: Kalle Jokiniemi kalle.jokini...@digia.com
---
dev-speed = speed;
dev-idle = 1;
@@ -911,6 +923,11 @@ omap_i2c_probe(struct platform_device *pdev)
*/
dev-fifo_size = (dev-fifo_size / 2);
dev-b_hw = 1; /* Enable hardware fixes */
+
+ /* calculate wakeup latency constraint for MPU */
+ if (dev-set_mpu_wkup_lat != NULL)
+ dev-latency = (100 * dev-fifo_size) /
+(1000 * speed / 8);
}
IMHO, here instead of using 'dev-fifo_size' for calculating the
'dev-latency', we need to use:
1. For RX case, to avoid Reciver overrun:
if (msg-flags I2C_M_RD)
Use [(FIFO Depth)bytes - (FIFO THRSH)bytes] in calculating
dev-latency
Because conceptually, RDR/RRDY interrupts are generated when RTRSH is reached,
so we want the MPU to be wake up within the time it takes to fill the FIFO from
RTRSH to FIFO Depth (FIFO full).
2. For TX case, to avoid Transmitter Underflow:
if (!(msg-flags I2C_M_RD))
Use (FIFO THRSH)bytes in calculating dev-latency
Because conceptually, XDR/XRDY interrupts are generated when XTRSH is reached,
so we want the MPU to be wake up within the time it takes to drain the FIFO
from XTRSH to Zero (FIFO empty).
Using, dev-fifo_size instead, works in the present code because we have a
RTRSH/XTRSH = dev-fifo_size/2 = 4 bytes
And therefore,
(FIFO Depth)bytes - (FIFO THRSH)bytes
= 8 - 4 = 4 bytes
But, to make it more generic in future and to make it independent of any
changes in the RTRSH/XTRSH values or FIFO depths in future, we should use a
generic code here.
/* reset ASAP, clearing any IRQs */
diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h
new file mode 100644
index 000..1362fba
--- /dev/null
+++ b/include/linux/i2c-omap.h
@@ -0,0 +1,9 @@
+#ifndef __I2C_OMAP_H__
+#define __I2C_OMAP_H__
+
+struct omap_i2c_bus_platform_data {
+ u32 clkrate;
+ void(*set_mpu_wkup_lat)(struct device *dev, int set);
+};
+
+#endif
--
1.5.4.3
Regards
Moiz Sonasath
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[PATCH] [OMAP] GPIO Module disable if all pins inactive
From: Charulatha V ch...@ti.com
This patch disables a GPIO module when all the pins of GPIO
module are inactive (clock gating forced at module level) and
enables the module when any gpio in the module is requested.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index cdc2a58..2304a5d 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -194,6 +194,7 @@ struct gpio_bank {
spinlock_t lock;
struct gpio_chip chip;
struct clk *dbck;
+ u32 gpio_status;
};
#define METHOD_MPUIO 0
@@ -1080,6 +1081,7 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ u32 ctrl = 0;
spin_lock_irqsave(bank-lock, flags);
@@ -1097,6 +1099,15 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
__raw_writel(__raw_readl(reg) | (1 offset), reg);
}
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is enabled, clocks are not gated */
+ ctrl = 0xFFFE;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ bank-gpio_status |= 1 offset;
+ }
spin_unlock_irqrestore(bank-lock, flags);
return 0;
@@ -1106,6 +1117,7 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ u32 ctrl = 0;
spin_lock_irqsave(bank-lock, flags);
#ifdef CONFIG_ARCH_OMAP16XX
@@ -1123,6 +1135,15 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
__raw_writel(1 offset, reg);
}
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ bank-gpio_status = ~(1 offset);
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is disabled, clocks are gated */
+ ctrl |= 1;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ }
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
}
@@ -1700,6 +1721,7 @@ static int __init _omap_gpio_init(void)
gpio_count = 32;
}
#endif
+ bank-gpio_status = 0;
/* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones
*/
--
1.6.0.4
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[PATCH] [OMAP] GPIO Module is reset during initialization
From: Charulatha V ch...@ti.com
During initialization, GPIO module is reset using soft reset bit
of SYSCONFIG register
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 12 +++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 2304a5d..4579650 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -21,6 +21,7 @@
#include linux/err.h
#include linux/clk.h
#include linux/io.h
+#include linux/delay.h
#include mach/hardware.h
#include asm/irq.h
@@ -1670,7 +1671,7 @@ static int __init _omap_gpio_init(void)
}
#endif
for (i = 0; i gpio_bank_count; i++) {
- int j, gpio_count = 16;
+ int j, gpio_count = 16, attempt = 0;
bank = gpio_bank[i];
spin_lock_init(bank-lock);
@@ -1698,6 +1699,15 @@ static int __init _omap_gpio_init(void)
static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040
};
+
+ /* Software Reset of GPIO module */
+ __raw_writel(0x0002, bank-base + OMAP24XX_GPIO_SYSCONFIG);
+ while (((__raw_readl(bank-base + OMAP24XX_GPIO_SYSSTATUS)
+0x1) == 0) attempt 5) {
+ udelay(1);
+ attempt++;
+ }
+
if (cpu_is_omap44xx()) {
__raw_writel(0x, bank-base +
OMAP4_GPIO_IRQSTATUSCLR0);
--
1.6.0.4
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[PATCHv2 0/11] Misc fixes [for PM branch]
From: Tero Kristo tero.kri...@nokia.com This set is now missing following patches compared to the previous set: - IVA2 suspend fix - Dynamic check for core target state - Block core off when DSS active - Next state check for IVA2, USB and PER - USBHOST powerdomain force to sleep after warm reset Also removed one of the patches Kevin already applied. I am still trying to figure out what to do with the remaining patches, but I decided I would send this partial set which I have modified according to comments already. -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/11] OMAP3: Disable Smartreflex before pwrdm enters RET
From: Tero Kristo tero.kri...@nokia.com
Smartreflex for the corresponding powerdomain (MPU/CORE) must be disabled
before the domain enters retention, otherwise the device may hang. This is
caused by overlapping smartreflex / auto retention command on the voltage
channel resulting in incorrect voltage.
This fix has been confirmed from TI.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/pm34xx.c | 22 +-
1 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8353764..6782792 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -403,11 +403,17 @@ void omap_sram_idle(void)
if (pwrdm_read_pwrst(cam_pwrdm) == PWRDM_POWER_ON)
omap2_clkdm_deny_idle(mpu_pwrdm-pwrdm_clkdms[0]);
- /* CORE */
- if (core_next_state PWRDM_POWER_ON) {
- /* Disable smartreflex before entering WFI */
+ /*
+* Disable smartreflex before entering WFI.
+* Only needed if we are going to enter retention or off.
+*/
+ if (mpu_next_state = PWRDM_POWER_RET)
disable_smartreflex(SR1);
+ if (core_next_state = PWRDM_POWER_RET)
disable_smartreflex(SR2);
+
+ /* CORE */
+ if (core_next_state PWRDM_POWER_ON) {
omap_uart_prepare_idle(0);
omap_uart_prepare_idle(1);
if (core_next_state == PWRDM_POWER_OFF) {
@@ -480,10 +486,16 @@ void omap_sram_idle(void)
prm_clear_mod_reg_bits(OMAP3430_AUTO_RET,
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
- /* Enable smartreflex after WFI */
+ }
+
+ /*
+* Enable smartreflex after WFI. Only needed if we entered
+* retention or off
+*/
+ if (mpu_next_state = PWRDM_POWER_RET)
enable_smartreflex(SR1);
+ if (core_next_state = PWRDM_POWER_RET)
enable_smartreflex(SR2);
- }
/* PER */
if (per_next_state PWRDM_POWER_ON) {
--
1.5.4.3
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[PATCH 04/11] OMAP3: PM: Ack pending interrupts before entering suspend
From: Tero Kristo tero.kri...@nokia.com
Suspending drivers may still generate interrupts just before their suspend is
completed. Any pending interrupts here will prevent sleep.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/irq.c |6 ++
arch/arm/mach-omap2/pm34xx.c |2 +-
arch/arm/plat-omap/include/mach/irqs.h |1 +
3 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index aceedd8..ee8c68a 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -266,4 +266,10 @@ void omap3_intc_restore_context(void)
}
/* MIRs are saved and restore with other PRCM registers */
}
+
+void omap3_intc_suspend(void)
+{
+ /* A pending interrupt would prevent OMAP from entering suspend */
+ omap_ack_irq(0);
+}
#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 6782792..53544d3 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -640,7 +640,7 @@ static int omap3_pm_suspend(void)
}
omap_uart_prepare_suspend();
-
+ omap3_intc_suspend();
regset_save_on_suspend = 1;
omap_sram_idle();
regset_save_on_suspend = 0;
diff --git a/arch/arm/plat-omap/include/mach/irqs.h
b/arch/arm/plat-omap/include/mach/irqs.h
index 2473910..ff1faa8 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -485,6 +485,7 @@ extern void omap_init_irq(void);
extern int omap_irq_pending(void);
void omap3_intc_save_context(void);
void omap3_intc_restore_context(void);
+void omap3_intc_suspend(void);
#endif
#include mach/hardware.h
--
1.5.4.3
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[PATCH 03/11] OMAP2/3: DMTIMER: Clear pending interrupts when stopping a timer
From: Tero Kristo tero.kri...@nokia.com
OMAP GP timers keep running for a few cycles after they are stopped,
which can cause the timer to expire and generate an interrupt. The pending
interrupt will prevent e.g. OMAP from entering suspend, thus we ack it
manually.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/plat-omap/dmtimer.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 830b072..09a623d 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -551,6 +551,16 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
if (l OMAP_TIMER_CTRL_ST) {
l = ~0x1;
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
+ /* Readback to make sure write has completed */
+ omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
+/*
+ * Wait for functional clock period x 3.5 to make sure that
+ * timer is stopped
+ */
+ udelay(350 / clk_get_rate(timer-fclk) + 1);
+ /* Ack possibly pending interrupt */
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
+ OMAP_TIMER_INT_OVERFLOW);
}
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
--
1.5.4.3
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[PATCH 06/11] OMAP3: PM: Disable interrupt controller AUTOIDLE before WFI
From: Tero Kristo tero.kri...@nokia.com
OMAP interrupt controller goes to unknown state when there is right
combination of l3,l4 sleep/wake-up transitions, l4 autoidle in
interrupt controller and some interrupt. When this happens, interrupts
are not delivered to ARM anymore and ARM will remain in WFI (wait for
interrupt) until interrupt controller is forced to wake-up
(i.e. lauterbach).
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/irq.c | 12
arch/arm/mach-omap2/pm34xx.c |2 ++
arch/arm/plat-omap/include/mach/irqs.h |2 ++
3 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index ee8c68a..9241b87 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -272,4 +272,16 @@ void omap3_intc_suspend(void)
/* A pending interrupt would prevent OMAP from entering suspend */
omap_ack_irq(0);
}
+
+void omap3_intc_prepare_idle(void)
+{
+ /* Disable autoidle as it can stall interrupt controller */
+ intc_bank_write_reg(0, irq_banks[0], INTC_SYSCONFIG);
+}
+
+void omap3_intc_resume_idle(void)
+{
+ /* Re-enable autoidle */
+ intc_bank_write_reg(1, irq_banks[0], INTC_SYSCONFIG);
+}
#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 492458e..fec9c38 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -431,6 +431,7 @@ void omap_sram_idle(void)
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
omap3_enable_io_chain();
}
+ omap3_intc_prepare_idle();
/*
* On EMU/HS devices ROM code restores a SRDC value
@@ -487,6 +488,7 @@ void omap_sram_idle(void)
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
}
+ omap3_intc_resume_idle();
/*
* Enable smartreflex after WFI. Only needed if we entered
diff --git a/arch/arm/plat-omap/include/mach/irqs.h
b/arch/arm/plat-omap/include/mach/irqs.h
index ff1faa8..b736c5d 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -486,6 +486,8 @@ extern int omap_irq_pending(void);
void omap3_intc_save_context(void);
void omap3_intc_restore_context(void);
void omap3_intc_suspend(void);
+void omap3_intc_prepare_idle(void);
+void omap3_intc_resume_idle(void);
#endif
#include mach/hardware.h
--
1.5.4.3
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[PATCH 07/11] OMAP3: Fixed ARM aux ctrl register save/restore
From: Tero Kristo tero.kri...@nokia.com
Current value is stored on SDRAM and it is written back during wakeup.
Previously a static value of 0x72 was written there.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Jouni Hogander jouni.hogan...@nokia.com
---
arch/arm/mach-omap2/control.c |1 +
arch/arm/mach-omap2/sleep34xx.S | 23 ---
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 296f2c2..730fc53 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -94,6 +94,7 @@ void *omap3_secure_ram_storage;
* during the restore path.
*/
u32 omap3_arm_context[128];
+u32 omap3_aux_ctrl[2] = { 0x1, 0x0 };
struct omap3_control_regs {
u32 sysconfig;
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index f4f5ebe..0b03bf9 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,6 +26,7 @@
*/
#include linux/linkage.h
#include asm/assembler.h
+#include asm/memory.h
#include mach/io.h
#include mach/control.h
@@ -278,7 +279,11 @@ restore:
mov r1, #0 @ set task id for ROM code in r1
mov r2, #4 @ set some flags in r2, r6
mov r6, #0xff
- adr r3, write_aux_control_params@ r3 points to parameters
+ ldr r3, write_aux_control_params@ r3 points to parameters
+ ldr r4, phys_offset
+ addsr3, r3, r4
+ ldr r4, page_offset
+ subsr3, r3, r4
mcr p15, 0, r0, c7, c10, 4 @ data write barrier
mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
.word 0xE1600071 @ call SMI monitor (smi #1)
@@ -287,13 +292,18 @@ restore:
l2_inv_api_params:
.word 0x1, 0x00
write_aux_control_params:
- .word 0x1, 0x72
+ .word omap3_aux_ctrl
l2_inv_gp:
/* Execute smi to invalidate L2 cache */
mov r12, #0x1 @ set up to invalide L2
smi:.word 0xE1600070 @ Call SMI monitor (smieq)
/* Write to Aux control register to set some bits */
- mov r0, #0x72
+ ldr r1, write_aux_control_params
+ ldr r0, phys_offset
+ addsr1, r1, r0
+ ldr r0, page_offset
+ subsr1, r1, r0
+ ldr r0, [r1, #4]
mov r12, #0x3
.word 0xE1600070@ Call SMI monitor (smieq)
logic_l1_restore:
@@ -420,6 +430,9 @@ usettbr0:
save_context_wfi:
/*b save_context_wfi*/ @ enable to debug save code
mov r8, r0 /* Store SDRAM address in r8 */
+ mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary Control Register
+ ldr r5, write_aux_control_params
+ str r4, [r5, #4]
/* Check what that target sleep state is:stored in r1*/
/* 1 - Only L1 and logic lost */
/* 2 - Only L2 lost */
@@ -605,6 +618,10 @@ wait_dll_lock:
bne wait_dll_lock
bx lr
+phys_offset:
+ .word PHYS_OFFSET
+page_offset:
+ .word PAGE_OFFSET
cm_idlest1_core:
.word CM_IDLEST1_CORE_V
sdrc_dlla_status:
--
1.5.4.3
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[PATCH 08/11] OMAP3: PM: Disabled I2C4 repeated start operation mode
From: Tero Kristo tero.kri...@nokia.com Repeated start forces I2C4 pads low during idle, which increases power consumption through external pull-ups. On the other hand, this change increases I2C4 command latencies a bit. Signed-off-by: Tero Kristo tero.kri...@nokia.com --- arch/arm/mach-omap2/pm34xx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fec9c38..154cd31 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -1219,7 +1219,7 @@ static void __init configure_vc(void) prm_write_mod_reg(OMAP3430_CMD1 | OMAP3430_RAV1, OMAP3430_GR_MOD, OMAP3_PRM_VC_CH_CONF_OFFSET); - prm_write_mod_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN | OMAP3430_SREN, + prm_write_mod_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN, OMAP3430_GR_MOD, OMAP3_PRM_VC_I2C_CFG_OFFSET); -- 1.5.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 05/11] OMAP3: PM: Enable system control module autoidle
From: Tero Kristo tero.kri...@nokia.com This saves some power. Signed-off-by: Mika Westerberg ext-mika.1.westerb...@nokia.com --- arch/arm/mach-omap2/pm34xx.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 53544d3..492458e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -900,6 +900,8 @@ static void __init prcm_setup_regs(void) CM_AUTOIDLE); } + omap_ctrl_writel(OMAP3430_AUTOIDLE, OMAP2_CONTROL_SYSCONFIG); + /* * Set all plls to autoidle. This is needed until autoidle is * enabled by clockfw -- 1.5.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/11] OMAP3: PM: Added support for L2 aux ctrl register save and restore
From: Tero Kristo tero.kri...@nokia.com
This patch adds a save and restore mechanism for ARM L2 auxiliary control
register. This feature is enabled via Kconfig option
OMAP3_L2_AUX_SECURE_SAVE_RESTORE and the service ID for PPA can be provided
via option OMAP3_L2_AUX_SECURE_SERVICE_SET_ID. If bootloader does not modify
L2 aux register, using this save and restore logic for it is not needed.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/control.c |1 +
arch/arm/mach-omap2/sleep34xx.S | 31 +++
arch/arm/plat-omap/Kconfig | 17 +
3 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 730fc53..82d8f1a 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -95,6 +95,7 @@ void *omap3_secure_ram_storage;
*/
u32 omap3_arm_context[128];
u32 omap3_aux_ctrl[2] = { 0x1, 0x0 };
+u32 omap3_l2_aux_ctrl[2] = { 0x1, 0x0 };
struct omap3_control_regs {
u32 sysconfig;
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 0b03bf9..e291d6d 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -288,11 +288,30 @@ restore:
mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
.word 0xE1600071 @ call SMI monitor (smi #1)
+#ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE
+ /* Restore L2 aux control register */
+ @ set service ID for PPA
+ mov r0, #CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
+ mov r12, r0 @ copy service ID in r12
+ mov r1, #0 @ set task ID for ROM code in r1
+ mov r2, #4 @ set some flags in r2, r6
+ mov r6, #0xff
+ ldr r3, write_l2_aux_control_params @ r3 points to parameters
+ ldr r4, phys_offset
+ addsr3, r3, r4
+ ldr r4, page_offset
+ subsr3, r3, r4
+ mcr p15, 0, r0, c7, c10, 4 @ data write barrier
+ mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
+ .word 0xE1600071 @ call SMI monitor (smi #1)
+#endif
b logic_l1_restore
l2_inv_api_params:
.word 0x1, 0x00
write_aux_control_params:
.word omap3_aux_ctrl
+write_l2_aux_control_params:
+ .word omap3_l2_aux_ctrl
l2_inv_gp:
/* Execute smi to invalidate L2 cache */
mov r12, #0x1 @ set up to invalide L2
@@ -306,6 +325,15 @@ smi:.word 0xE1600070 @ Call SMI monitor
(smieq)
ldr r0, [r1, #4]
mov r12, #0x3
.word 0xE1600070@ Call SMI monitor (smieq)
+ /* Restore L2 AUX control register */
+ ldr r1, write_l2_aux_control_params
+ ldr r0, phys_offset
+ addsr1, r1, r0
+ ldr r0, page_offset
+ subsr1, r1, r0
+ ldr r0, [r1, #4]
+ mov r12, #0x2
+ .word 0xE1600070@ Call SMI monitor (smieq)
logic_l1_restore:
mov r1, #0
/* Invalidate all instruction caches to PoU
@@ -433,6 +461,9 @@ save_context_wfi:
mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary Control Register
ldr r5, write_aux_control_params
str r4, [r5, #4]
+ mrc p15, 1, r4, c9, c0, 2 @ Read L2 AUX ctrl register
+ ldr r5, write_l2_aux_control_params
+ str r4, [r5, #4]
/* Check what that target sleep state is:stored in r1*/
/* 1 - Only L1 and logic lost */
/* 2 - Only L2 lost */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 2143db5..3ff1a5f 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -185,6 +185,23 @@ config OMAP3_DEBOBS
help
Use ETK pads for debug observability
+config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
+ bool OMAP3 HS/EMU save and restore for L2 AUX control register
+ depends on ARCH_OMAP3 PM
+ default n
+ help
+ Without this option, L2 Auxiliary control register contents are
+ lost during off-mode entry on HS/EMU devices. This feature
+ requires support from PPA / boot-loader in HS/EMU devices, which
+ currently does not exist by default.
+
+config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
+ int Service ID for the support routine to set L2 AUX control
+ depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE
+ default 43
+ help
+ PPA routine service ID for setting L2 auxiliary control register.
+
config OMAP_32K_TIMER_HZ
int Kernel internal timer frequency for 32KHz timer
range 32 1024
--
1.5.4.3
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[PATCH 10/11] OMAP3: PM: Write voltage and clock setup times dynamically in idle loop
From: Tero Kristo tero.kri...@nokia.com
It is suggested by TI (SWPA152 February 2009) to write clksetup,
voltsetup_time1, voltsetup_time2, voltsetup2 dynamically in idle loop.
This allows us to optimize the voltage + clock setup times according to the
used power save mode.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/pm.h | 10 -
arch/arm/mach-omap2/pm34xx.c | 86 --
2 files changed, 57 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index f8d11a2..b384eb1 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -24,12 +24,18 @@ extern int omap3_can_sleep(void);
extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
extern int omap3_idle_init(void);
-struct prm_setup_vc {
+struct prm_setup_times_vc {
u16 clksetup;
u16 voltsetup_time1;
u16 voltsetup_time2;
- u16 voltoffset;
u16 voltsetup2;
+ u16 voltsetup1;
+};
+
+struct prm_setup_vc {
+ struct prm_setup_times_vc *setup_times;
+ struct prm_setup_times_vc *setup_times_off;
+ u16 voltoffset;
/* PRM_VC_CMD_VAL_0 specific bits */
u16 vdd0_on;
u16 vdd0_onlp;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 154cd31..5eb7321 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -82,12 +82,17 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static struct prm_setup_vc prm_setup = {
+static struct prm_setup_times_vc prm_setup_times_default = {
.clksetup = 0xff,
.voltsetup_time1 = 0xfff,
.voltsetup_time2 = 0xfff,
- .voltoffset = 0xff,
.voltsetup2 = 0xff,
+};
+
+static struct prm_setup_vc prm_setup_default = {
+ .setup_times = prm_setup_times_default,
+ .setup_times_off = NULL,
+ .voltoffset = 0xff,
.vdd0_on = 0x30,/* 1.2v */
.vdd0_onlp = 0x20, /* 1.0v */
.vdd0_ret = 0x1e, /* 0.975v */
@@ -98,6 +103,8 @@ static struct prm_setup_vc prm_setup = {
.vdd1_off = 0x00, /* 0.6v */
};
+static struct prm_setup_vc *prm_setup = prm_setup_default;
+
static inline void omap3_per_save_context(void)
{
omap3_gpio_save_context();
@@ -338,6 +345,16 @@ static void restore_table_entry(void)
restore_control_register(control_reg_value);
}
+static void prm_program_setup_times(struct prm_setup_times_vc *times)
+{
+ prm_write_mod_reg(times-voltsetup1, OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTSETUP1_OFFSET);
+ prm_write_mod_reg(times-voltsetup2, OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTSETUP2_OFFSET);
+ prm_write_mod_reg(times-clksetup, OMAP3430_GR_MOD,
+ OMAP3_PRM_CLKSETUP_OFFSET);
+}
+
void omap_sram_idle(void)
{
/* Variable to tell what needs to be saved and restored
@@ -422,6 +439,9 @@ void omap_sram_idle(void)
OMAP3_PRM_VOLTCTRL_OFFSET);
omap3_core_save_context();
omap3_prcm_save_context();
+ if (prm_setup-setup_times_off != NULL)
+ prm_program_setup_times(prm_setup-
+ setup_times_off);
} else if (core_next_state == PWRDM_POWER_RET) {
prm_set_mod_reg_bits(OMAP3430_AUTO_RET,
OMAP3430_GR_MOD,
@@ -479,11 +499,13 @@ void omap_sram_idle(void)
}
omap_uart_resume_idle(0);
omap_uart_resume_idle(1);
- if (core_next_state == PWRDM_POWER_OFF)
+ if (core_next_state == PWRDM_POWER_OFF) {
prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF,
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
- else if (core_next_state == PWRDM_POWER_RET)
+ if (prm_setup-setup_times_off != NULL)
+ prm_program_setup_times(prm_setup-setup_times);
+ } else if (core_next_state == PWRDM_POWER_RET)
prm_clear_mod_reg_bits(OMAP3430_AUTO_RET,
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
@@ -1043,21 +1065,19 @@ int omap3_pm_set_suspend_state(struct powerdomain
*pwrdm, int state)
return -EINVAL;
}
+static void omap3_init_prm_setup_times(struct prm_setup_times_vc *conf)
+{
+ if (conf == NULL)
+ return;
+
+ conf-voltsetup1 =
+ (conf-voltsetup_time2 OMAP3430_SETUP_TIME2_SHIFT) |
+ (conf-voltsetup_time1 OMAP3430_SETUP_TIME1_SHIFT);
+}
[PATCH 01/11] OMAP3: PM: Fixed padconf save done check
From: Carlos Chinea carlos.chi...@nokia.com Previously the operator precedence dictated that the delay loop was exited immediately, potentially causing off-mode to be entered too soon. Signed-off-by: Carlos Chinea carlos.chi...@nokia.com Signed-off-by: Jouni Hogander jouni.hogan...@nokia.com --- arch/arm/mach-omap2/pm34xx.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 01260ec..8353764 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -146,8 +146,8 @@ static void omap3_core_save_context(void) control_padconf_off |= START_PADCONF_SAVE; omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); /* wait for the save to complete */ - while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) -PADCONF_SAVE_DONE) + while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) +PADCONF_SAVE_DONE)) ; /* Save the Interrupt controller context */ omap3_intc_save_context(); -- 1.5.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] OMAP3: PM: add CPUidle support
This series adds CPUidle support for OMAP3. This includes power states for full-chip retention and full-chip OFF during idle. This series is based on top of Tony's for-next branch plus the recently posted off-mode series. [PATCH v2 00/32] OMAP3: PM: base off-mode support This series is also available in my linux-omap-pm repo[1] as a branch named pm-upstream/pm-cpuidle. Kevin Jouni Hogander (1): OMAP3: PM: Use pwrdm_set_next_pwrst instead of set_pwrdm_state in idle loop Kalle Jokiniemi (1): OMAP3: PM: CPUidle: fix init sequencing Kevin Hilman (2): OMAP3: PM: CPUidle: obey enable_off_mode flag OMAP3: PM: CPUidle: check activity for C2, C3, correct accounting Peter 'p2' De Schrijver (2): OMAP3: PM: CPUidle: Add new lower-latency C1 state OMAP3: PM: idle: Remove fclk check for idle loop Rajendra Nayak (2): OMAP3: PM: CPUidle: base driver and support for C1-C2 OMAP3: PM: CPUidle: support retention and off-mode C-states Sanjeev Premi (1): OMAP3: PM: CPUidle: Start C-state definitions from base 0 Tero Kristo (1): OMAP3: PM: Added resched check into idle calls arch/arm/mach-omap2/Makefile |2 +- arch/arm/mach-omap2/cpuidle34xx.c | 318 + arch/arm/mach-omap2/pm.h |4 + arch/arm/mach-omap2/pm34xx.c | 55 +-- 4 files changed, 329 insertions(+), 50 deletions(-) create mode 100644 arch/arm/mach-omap2/cpuidle34xx.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/10] OMAP3: PM: CPUidle: support retention and off-mode C-states
From: Rajendra Nayak rna...@ti.com
This patch adds support and enables state C4(MPU RET + CORE RET)
and MPU OFF states (C3 and C5.)
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 28
arch/arm/mach-omap2/pm.h |2 ++
arch/arm/mach-omap2/pm34xx.c |6 ++
3 files changed, 20 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 858b216..0bf1bc3 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,8 @@
#include plat/prcm.h
#include plat/powerdomain.h
+#include plat/irqs.h
+#include plat/control.h
#ifdef CONFIG_CPU_IDLE
@@ -50,10 +52,12 @@ struct omap3_processor_cx {
struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
struct omap3_processor_cx current_cx_state;
-struct powerdomain *mpu_pd;
+struct powerdomain *mpu_pd, *core_pd;
static int omap3_idle_bm_check(void)
{
+ if (!omap3_can_sleep())
+ return 1;
return 0;
}
@@ -79,24 +83,23 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
local_irq_disable();
local_fiq_disable();
- /* Program MPU to target state */
- if (cx-mpu_state PWRDM_POWER_ON)
- pwrdm_set_next_pwrst(mpu_pd, cx-mpu_state);
+ set_pwrdm_state(mpu_pd, cx-mpu_state);
+ set_pwrdm_state(core_pd, cx-core_state);
+
+ if (omap_irq_pending())
+ goto return_sleep_time;
/* Execute ARM wfi */
omap_sram_idle();
- /* Program MPU to ON */
- if (cx-mpu_state PWRDM_POWER_ON)
- pwrdm_set_next_pwrst(mpu_pd, PWRDM_POWER_ON);
-
+return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
local_irq_enable();
local_fiq_enable();
- return timespec_to_ns(ts_idle);
+ return (u32)timespec_to_ns(ts_idle)/1000;
}
/**
@@ -153,7 +156,7 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID;
/* C3 . MPU OFF + Core active */
- omap3_power_states[OMAP3_STATE_C3].valid = 0;
+ omap3_power_states[OMAP3_STATE_C3].valid = 1;
omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3;
omap3_power_states[OMAP3_STATE_C3].sleep_latency = 1500;
omap3_power_states[OMAP3_STATE_C3].wakeup_latency = 1800;
@@ -163,7 +166,7 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID;
/* C4 . MPU CSWR + Core CSWR*/
- omap3_power_states[OMAP3_STATE_C4].valid = 0;
+ omap3_power_states[OMAP3_STATE_C4].valid = 1;
omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4;
omap3_power_states[OMAP3_STATE_C4].sleep_latency = 2500;
omap3_power_states[OMAP3_STATE_C4].wakeup_latency = 7500;
@@ -174,7 +177,7 @@ void omap_init_power_states(void)
CPUIDLE_FLAG_CHECK_BM;
/* C5 . MPU OFF + Core CSWR */
- omap3_power_states[OMAP3_STATE_C5].valid = 0;
+ omap3_power_states[OMAP3_STATE_C5].valid = 1;
omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5;
omap3_power_states[OMAP3_STATE_C5].sleep_latency = 3000;
omap3_power_states[OMAP3_STATE_C5].wakeup_latency = 8500;
@@ -215,6 +218,7 @@ int omap3_idle_init(void)
struct cpuidle_device *dev;
mpu_pd = pwrdm_lookup(mpu_pwrdm);
+ core_pd = pwrdm_lookup(core_pwrdm);
omap_init_power_states();
cpuidle_register_driver(omap3_idle_driver);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 2edf1ba..379e350 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -19,6 +19,8 @@ extern u32 sleep_while_idle;
extern void *omap3_secure_ram_storage;
extern void omap3_pm_off_mode_enable(int);
extern void omap_sram_idle(void);
+extern int omap3_can_sleep(void);
+extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3e3de6c..67412b8 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -76,8 +76,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
-
static inline void omap3_per_save_context(void)
{
omap_gpio_save_context();
@@ -503,7 +501,7 @@ static int omap3_fclks_active(void)
return 0;
}
-static int omap3_can_sleep(void)
+int omap3_can_sleep(void)
{
if (!sleep_while_idle)
return 0;
[PATCH 03/10] OMAP3: PM: CPUidle: obey enable_off_mode flag
If 'enable_off_mode' is not set, force powerdomain states to RET
instead of OFF.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 14 --
1 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 0bf1bc3..1120494 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -29,6 +29,8 @@
#include plat/irqs.h
#include plat/control.h
+#include pm.h
+
#ifdef CONFIG_CPU_IDLE
#define OMAP3_MAX_STATES 7
@@ -74,6 +76,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
{
struct omap3_processor_cx *cx = cpuidle_get_statedata(state);
struct timespec ts_preidle, ts_postidle, ts_idle;
+ u32 mpu_state = cx-mpu_state, core_state = cx-core_state;
current_cx_state = *cx;
@@ -83,8 +86,15 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
local_irq_disable();
local_fiq_disable();
- set_pwrdm_state(mpu_pd, cx-mpu_state);
- set_pwrdm_state(core_pd, cx-core_state);
+ if (!enable_off_mode) {
+ if (mpu_state PWRDM_POWER_RET)
+ mpu_state = PWRDM_POWER_RET;
+ if (core_state PWRDM_POWER_RET)
+ core_state = PWRDM_POWER_RET;
+ }
+
+ set_pwrdm_state(mpu_pd, mpu_state);
+ set_pwrdm_state(core_pd, core_state);
if (omap_irq_pending())
goto return_sleep_time;
--
1.6.4.3
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[PATCH 04/10] OMAP3: PM: CPUidle: check activity for C2, C3, correct accounting
Use the activity check for states C2 and C3 as well. This is
primarily to prevent deeper states during UART activity.
Also, if a different state is chosen than the target state, update the
'last_state' accordingly so that CPUidle state accounting is coorect.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 1120494..b0bee34 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -28,6 +28,7 @@
#include plat/powerdomain.h
#include plat/irqs.h
#include plat/control.h
+#include plat/serial.h
#include pm.h
@@ -124,11 +125,15 @@ return_sleep_time:
static int omap3_enter_idle_bm(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
+ struct cpuidle_state *new_state = state;
+
if ((state-flags CPUIDLE_FLAG_CHECK_BM) omap3_idle_bm_check()) {
- if (dev-safe_state)
- return dev-safe_state-enter(dev, dev-safe_state);
+ BUG_ON(!dev-safe_state);
+ new_state = dev-safe_state;
}
- return omap3_enter_idle(dev, state);
+
+ dev-last_state = new_state;
+ return omap3_enter_idle(dev, new_state);
}
DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
@@ -163,7 +168,8 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C2].threshold = 300;
omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_RET;
omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON;
- omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID;
+ omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID |
+ CPUIDLE_FLAG_CHECK_BM;
/* C3 . MPU OFF + Core active */
omap3_power_states[OMAP3_STATE_C3].valid = 1;
@@ -173,7 +179,8 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C3].threshold = 4000;
omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_OFF;
omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON;
- omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID;
+ omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID |
+ CPUIDLE_FLAG_CHECK_BM;
/* C4 . MPU CSWR + Core CSWR*/
omap3_power_states[OMAP3_STATE_C4].valid = 1;
@@ -198,7 +205,7 @@ void omap_init_power_states(void)
CPUIDLE_FLAG_CHECK_BM;
/* C6 . MPU OFF + Core OFF */
- omap3_power_states[OMAP3_STATE_C6].valid = 0;
+ omap3_power_states[OMAP3_STATE_C6].valid = 1;
omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6;
omap3_power_states[OMAP3_STATE_C6].sleep_latency = 1;
omap3_power_states[OMAP3_STATE_C6].wakeup_latency = 3;
--
1.6.4.3
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[PATCH 05/10] OMAP3: PM: CPUidle: fix init sequencing
From: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
Previously omap3_idle_init() was called in device_init, while
omap_pm_init() is called at late_initcall. This causes the cpu idle
driver to call omap_sram_idle before it is properly initialized. This
patch fixes the issue by moving omap3_idle_init into omap3_pm_init.
Signed-off-by: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c |8 ++--
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm34xx.c |3 +--
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index b0bee34..ad3af11 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -227,7 +227,7 @@ struct cpuidle_driver omap3_idle_driver = {
* Registers the OMAP3 specific cpuidle driver with the cpuidle
* framework with the valid set of states.
*/
-int omap3_idle_init(void)
+int __init omap3_idle_init(void)
{
int i, count = 0;
struct omap3_processor_cx *cx;
@@ -272,5 +272,9 @@ int omap3_idle_init(void)
return 0;
}
-device_initcall(omap3_idle_init);
+#else
+int __init omap3_idle_init(void)
+{
+ return 0;
+}
#endif /* CONFIG_CPU_IDLE */
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 379e350..0bf345d 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -21,6 +21,7 @@ extern void omap3_pm_off_mode_enable(int);
extern void omap_sram_idle(void);
extern int omap3_can_sleep(void);
extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
+extern int omap3_idle_init(void);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 67412b8..a6624a1 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1098,9 +1098,8 @@ static int __init omap3_pm_init(void)
suspend_set_ops(omap_pm_ops);
#endif /* CONFIG_SUSPEND */
-#ifndef CONFIG_CPU_IDLE
pm_idle = omap3_pm_idle;
-#endif
+ omap3_idle_init();
pwrdm_add_wkdep(neon_pwrdm, mpu_pwrdm);
/*
--
1.6.4.3
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[PATCH 06/10] OMAP3: PM: CPUidle: Add new lower-latency C1 state
From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
This patch introduces a new C state which allows MPU to go to WFI but keeps
the core domain active. This offers a much better wakeup latency (3us vs
10s of us for the current C1) at the cost of a higher power consumption.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 125 -
1 files changed, 81 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index ad3af11..c11377d 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -25,8 +25,9 @@
#include linux/cpuidle.h
#include plat/prcm.h
-#include plat/powerdomain.h
#include plat/irqs.h
+#include plat/powerdomain.h
+#include plat/clockdomain.h
#include plat/control.h
#include plat/serial.h
@@ -34,13 +35,14 @@
#ifdef CONFIG_CPU_IDLE
-#define OMAP3_MAX_STATES 7
+#define OMAP3_MAX_STATES 8
#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
-#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core active */
-#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core active */
-#define OMAP3_STATE_C4 4 /* C4 - MPU RET + Core RET */
-#define OMAP3_STATE_C5 5 /* C5 - MPU OFF + Core RET */
-#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core OFF */
+#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */
+#define OMAP3_STATE_C3 3 /* C3 - MPU CSWR + Core inactive */
+#define OMAP3_STATE_C4 4 /* C4 - MPU OFF + Core iactive */
+#define OMAP3_STATE_C5 5 /* C5 - MPU RET + Core RET */
+#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core RET */
+#define OMAP3_STATE_C7 7 /* C7 - MPU OFF + Core OFF */
struct omap3_processor_cx {
u8 valid;
@@ -64,6 +66,20 @@ static int omap3_idle_bm_check(void)
return 0;
}
+static int _cpuidle_allow_idle(struct powerdomain *pwrdm,
+ struct clockdomain *clkdm)
+{
+ omap2_clkdm_allow_idle(clkdm);
+ return 0;
+}
+
+static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
+ struct clockdomain *clkdm)
+{
+ omap2_clkdm_deny_idle(clkdm);
+ return 0;
+}
+
/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
@@ -100,9 +116,19 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
if (omap_irq_pending())
goto return_sleep_time;
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
+ }
+
/* Execute ARM wfi */
omap_sram_idle();
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
+ }
+
return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
@@ -141,79 +167,90 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
/* omap3_init_power_states - Initialises the OMAP3 specific C states.
*
* Below is the desciption of each C state.
- * C1 . MPU WFI + Core active
- * C2 . MPU CSWR + Core active
- * C3 . MPU OFF + Core active
- * C4 . MPU CSWR + Core CSWR
- * C5 . MPU OFF + Core CSWR
- * C6 . MPU OFF + Core OFF
+ * C1 . MPU WFI + Core active
+ * C2 . MPU WFI + Core inactive
+ * C3 . MPU CSWR + Core inactive
+ * C4 . MPU OFF + Core inactive
+ * C5 . MPU CSWR + Core CSWR
+ * C6 . MPU OFF + Core CSWR
+ * C7 . MPU OFF + Core OFF
*/
void omap_init_power_states(void)
{
/* C1 . MPU WFI + Core active */
omap3_power_states[OMAP3_STATE_C1].valid = 1;
omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
- omap3_power_states[OMAP3_STATE_C1].sleep_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C1].sleep_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].threshold = 5;
omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
- /* C2 . MPU CSWR + Core active */
+ /* C2 . MPU WFI + Core inactive */
omap3_power_states[OMAP3_STATE_C2].valid = 1;
omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
- omap3_power_states[OMAP3_STATE_C2].sleep_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].threshold = 300;
- omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_RET;
+
[PATCH 07/10] OMAP3: PM: CPUidle: Start C-state definitions from base 0
From: Sanjeev Premi pr...@ti.com
The current definition of C-states starts from base 1.
Whereas, the cpuidle driver uses base 0. This patch
eliminates need for explicit mapping (add/ sbutract)
due to different base values.
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index c11377d..5128b8c 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -35,14 +35,14 @@
#ifdef CONFIG_CPU_IDLE
-#define OMAP3_MAX_STATES 8
-#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
-#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */
-#define OMAP3_STATE_C3 3 /* C3 - MPU CSWR + Core inactive */
-#define OMAP3_STATE_C4 4 /* C4 - MPU OFF + Core iactive */
-#define OMAP3_STATE_C5 5 /* C5 - MPU RET + Core RET */
-#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core RET */
-#define OMAP3_STATE_C7 7 /* C7 - MPU OFF + Core OFF */
+#define OMAP3_MAX_STATES 7
+#define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */
+#define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */
+#define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */
+#define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */
+#define OMAP3_STATE_C5 4 /* C5 - MPU RET + Core RET */
+#define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */
+#define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */
struct omap3_processor_cx {
u8 valid;
@@ -279,7 +279,7 @@ int __init omap3_idle_init(void)
dev = per_cpu(omap3_idle_dev, smp_processor_id());
- for (i = 1; i OMAP3_MAX_STATES; i++) {
+ for (i = OMAP3_STATE_C1; i OMAP3_MAX_STATES; i++) {
cx = omap3_power_states[i];
state = dev-states[count];
--
1.6.4.3
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[PATCH 08/10] OMAP3: PM: Use pwrdm_set_next_pwrst instead of set_pwrdm_state in idle loop
From: Jouni Hogander jouni.hogan...@nokia.com It is more efficient to use pwrdm_set_next_pwrst for mpu, core and neon instead of set_pwrdm_state in idle loop. It is anyway known that those are active in idle loop. So no need to use set_pwrdm_state. Signed-off-by: Jouni Hogander jouni.hogan...@nokia.com Signed-off-by: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/mach-omap2/cpuidle34xx.c |4 ++-- arch/arm/mach-omap2/pm34xx.c |2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 5128b8c..1d10c4a 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -110,8 +110,8 @@ static int omap3_enter_idle(struct cpuidle_device *dev, core_state = PWRDM_POWER_RET; } - set_pwrdm_state(mpu_pd, mpu_state); - set_pwrdm_state(core_pd, core_state); + pwrdm_set_next_pwrst(mpu_pd, mpu_state); + pwrdm_set_next_pwrst(core_pd, core_state); if (omap_irq_pending()) goto return_sleep_time; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index a6624a1..35c917e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -359,7 +359,7 @@ void omap_sram_idle(void) /* NEON control */ if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON) - set_pwrdm_state(neon_pwrdm, mpu_next_state); + pwrdm_set_next_pwrst(neon_pwrdm, mpu_next_state); /* PER */ per_next_state = pwrdm_read_next_pwrst(per_pwrdm); -- 1.6.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/10] OMAP3: PM: idle: Remove fclk check for idle loop
From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
This patch removes the check to see if some functional clocks are
still enabled before entering sleep. This is no longer needed when
using safe state (C1) that keeps CORE active.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 42 --
1 files changed, 0 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 35c917e..40cbba4 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -461,54 +461,12 @@ void omap_sram_idle(void)
omap2_clkdm_allow_idle(mpu_pwrdm-pwrdm_clkdms[0]);
}
-/*
- * Check if functional clocks are enabled before entering
- * sleep. This function could be behind CONFIG_PM_DEBUG
- * when all drivers are configuring their sysconfig registers
- * properly and using their clocks properly.
- */
-static int omap3_fclks_active(void)
-{
- u32 fck_core1 = 0, fck_core3 = 0, fck_sgx = 0, fck_dss = 0,
- fck_cam = 0, fck_per = 0, fck_usbhost = 0;
-
- fck_core1 = cm_read_mod_reg(CORE_MOD,
- CM_FCLKEN1);
- if (omap_rev() OMAP3430_REV_ES1_0) {
- fck_core3 = cm_read_mod_reg(CORE_MOD,
- OMAP3430ES2_CM_FCLKEN3);
- fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
- CM_FCLKEN);
- fck_usbhost = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
- CM_FCLKEN);
- } else
- fck_sgx = cm_read_mod_reg(GFX_MOD,
- OMAP3430ES2_CM_FCLKEN3);
- fck_dss = cm_read_mod_reg(OMAP3430_DSS_MOD,
- CM_FCLKEN);
- fck_cam = cm_read_mod_reg(OMAP3430_CAM_MOD,
- CM_FCLKEN);
- fck_per = cm_read_mod_reg(OMAP3430_PER_MOD,
- CM_FCLKEN);
-
- /* Ignore UART clocks. These are handled by UART core (serial.c) */
- fck_core1 = ~(OMAP3430_EN_UART1 | OMAP3430_EN_UART2);
- fck_per = ~OMAP3430_EN_UART3;
-
- if (fck_core1 | fck_core3 | fck_sgx | fck_dss |
- fck_cam | fck_per | fck_usbhost)
- return 1;
- return 0;
-}
-
int omap3_can_sleep(void)
{
if (!sleep_while_idle)
return 0;
if (!omap_uart_can_sleep())
return 0;
- if (omap3_fclks_active())
- return 0;
return 1;
}
--
1.6.4.3
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[PATCH 10/10] OMAP3: PM: Added resched check into idle calls
From: Tero Kristo tero.kri...@nokia.com
Fixes a bug where scheduling is delayed until next wakeup due to race
condition (e.g. interrupt requests scheduling just before omap_sram_idle
is entered.)
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cpuidle34xx.c |3 ++-
arch/arm/mach-omap2/pm34xx.c |2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 1d10c4a..a26d6a0 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -22,6 +22,7 @@
* published by the Free Software Foundation.
*/
+#include linux/sched.h
#include linux/cpuidle.h
#include plat/prcm.h
@@ -113,7 +114,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
pwrdm_set_next_pwrst(mpu_pd, mpu_state);
pwrdm_set_next_pwrst(core_pd, core_state);
- if (omap_irq_pending())
+ if (omap_irq_pending() || need_resched())
goto return_sleep_time;
if (cx-type == OMAP3_STATE_C1) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 40cbba4..849c910 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -523,7 +523,7 @@ static void omap3_pm_idle(void)
if (!omap3_can_sleep())
goto out;
- if (omap_irq_pending())
+ if (omap_irq_pending() || need_resched())
goto out;
omap_sram_idle();
--
1.6.4.3
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RE: [PATCH]Omap3630: Add hsmmc related checks
-Original Message-
From: Pandita, Vikram [mailto:vikram.pand...@ti.com]
Sent: Thursday, October 22, 2009 7:08 PM
To: Chikkature Rajashekar, Madhusudhan; 'Tony Lindgren'
Cc: linux-omap@vger.kernel.org
Subject: RE: [PATCH]Omap3630: Add hsmmc related checks
Madhu/Tony
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of
Chikkature Rajashekar, Madhusudhan
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, October 22, 2009 12:44 PM
To: Madhusudhan Chikkature
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH]Omap3630: Add hsmmc related checks
* Madhusudhan Chikkature madhu...@ti.com [091022 10:38]:
From 661b13474a7af62c54f7df7a33a818c5e782cc59 Mon Sep 17 00:00:00
2001
From: Madhu madhu...@ti.com
Date: Wed, 21 Oct 2009 16:16:31 -0400
Subject: [PATCH] Omap3630: Add HSMMC related checks.
Add omap3630 conditional checks to devices.c to allow HSMMC3 addition
and
mux configuration for HSMMC1/2.
Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
---
arch/arm/mach-omap2/devices.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-
omap2/devices.c
index 7d4513b..1fdfc7f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
}
}
-if (cpu_is_omap3430()) {
+if (cpu_is_omap3430() || cpu_is_omap3630()) {
Not needed.
For 34xx:
cpu_is_omap3430() returns True
cpu_is_omap3630() returns False
For 3630:
cpu_is_omap3430() returns True
cpu_is_omap3630() returns True
So no need to add an orring for 3630, as 3630 is treated just like a 34xx.
Hi Vikram,
I have already posted V2 of this patch which uses cpu_is_omap34xx() and that
should be right way.
Regards,
Madhu
if (controller_nr == 0) {
omap_cfg_reg(N28_3430_MMC1_CLK);
omap_cfg_reg(M27_3430_MMC1_CMD);
How about using cpu_is_omap34xx() here instead? It's more future proof.
Regards,
Tony
Yes. That makes sense. I will submit V2.
Regards,
Madhu
@@ -642,7 +642,8 @@ void __init omap2_init_mmc(struct
omap_mmc_platform_data
**mmc_data,
irq = INT_24XX_MMC2_IRQ;
break;
case 2:
-if (!cpu_is_omap44xx()
!cpu_is_omap34xx())
+if (!cpu_is_omap44xx() !cpu_is_omap34xx()
+ !cpu_is_omap3630())
return;
base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ;
--
1.6.0.4
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[ANNOUNCE] updated PM branch, 2.6.32-rc5 + l-o master
Hello, I've rebased/updated the PM branch based on current linux-omap master branch (2.6.32-rc1 based.) The only changes this time were related to the #include path changes and the IO_ADDRESS changes. There were no (intentional) functional changes. I've also updated the OMAP Power Management wiki[1], and the 'Current version' section highlights the changes and supported platforms. I've also updated the 'mainline plans' section to reflect what is already in mailine, what is being submitted for the coming merge window and what is still left in the PM branch. Kevin [1] http://elinux.org/OMAP_Power_Management -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 12/32] OMAP: PM: DMA context save/restore for off-mode support
Grazvydas Ignotas nota...@gmail.com writes: static int __init omap_init_dma(void) diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h old mode 100644 new mode 100755 ^^ whoops? Good catch, I'll fix this up in my pm-off branch. Kevin index 72f680b..1c017b2 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -633,6 +633,11 @@ extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype); extern void omap_set_dma_src_endian_type(int lch, enum end_type etype); extern int omap_get_dma_index(int lch, int *ei, int *fi); +void omap_dma_global_context_save(void); +void omap_dma_global_context_restore(void); + +extern void omap_dma_disable_irq(int lch); + /* Chaining APIs */ #ifndef CONFIG_ARCH_OMAP1 extern int omap_request_dma_chain(int dev_id, const char *dev_name, -- 1.6.4.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 12/32] OMAP: PM: DMA context save/restore for off-mode support
Venkatraman S svenk...@ti.com writes:
On Fri, Oct 23, 2009 at 4:39 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
From: Tero Kristo tero.kri...@nokia.com
For HS/EMU devices, these additional features are also used:
- DMA interrupt disable routine added
- Added DMA controller reset to DMA context restore
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
[...]
+void omap_dma_disable_irq(int lch)
+{
+ u32 val;
+
+ if (cpu_class_is_omap2()) {
+ /* Disable interrupts */
+ val = dma_read(IRQENABLE_L0);
+ val = ~(1 lch);
+ dma_write(val, IRQENABLE_L0);
+ }
+}
+
Just curious - Doesn't it need EXPORT_SYMBOL() ?
No, was not meant to be used by modules. In fact, when I update this
patch for the chmod problem, I'm going to drop the EXPORT_SYMBOL() for
the context save/restore as well since that is only meant to be called
from the PM core.
Is this used somewhere ? If yes,
would be nice to have omap_dma_enable_irq as well
Looking closer, it looks like the user of this was removed in
[PATCH v2 17/32] OMAP3: PM: Fix secure SRAM context save/restore, so I'll
remove this function in that patch as well.
Kevin
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Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support.
* Govindraj govindraj...@gmail.com [091023 05:22]: On Wed, Oct 14, 2009 at 2:26 AM, Tony Lindgren t...@atomide.com wrote: * kishore kadiyala kishorek.kadiy...@gmail.com [091012 23:54]: Tony, On Fri, Oct 9, 2009 at 11:16 PM, Tony Lindgren t...@atomide.com wrote: * G, Manjunath Kondaiah manj...@ti.com [091008 00:41]: Govind, -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Govindraj Sent: Thursday, October 08, 2009 11:44 AM To: Tony Lindgren Cc: Raja, Govindraj; linux-omap@vger.kernel.org; linux-ker...@vger.kernel.org; linux-ser...@vger.kernel.org Subject: Re: [PATCHv1 1/3] OMAP UART: Adds omap-serial driver support. On Thu, Oct 8, 2009 at 3:21 AM, Tony Lindgren t...@atomide.com wrote: * Govindraj.R govindraj.r...@ti.com [090924 03:29]: From: Govindraj R govindraj.r...@ti.com This patch adds support for OMAP3430-HIGH SPEED UART Controller. Signed-off-by: Govindraj R govindraj.r...@ti.com Reviewed-by: Alan Cox a...@lxorguk.ukuu.org.uk Reviewed-by: Tony Lindgren t...@atomide.com You should only add Reviewed-by if Alan or me have replied with it. So far I've only replied with some comments that have not yet been fixed, so we're few more steps from being Reviewd-by. snip diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 6553833..67a7129 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -1359,6 +1359,53 @@ config SERIAL_OF_PLATFORM Currently, only 8250 compatible ports are supported, but others can easily be added. +config SERIAL_OMAP + bool OMAP serial port support + depends on ARM ARCH_OMAP + select SERIAL_CORE + help + If you have a machine based on an Texas Instruments OMAP CPU you + can enable its onboard serial ports by enabling this option. + +config SERIAL_OMAP_CONSOLE + bool Console on OMAP serial port + depends on SERIAL_OMAP + select SERIAL_CORE_CONSOLE + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can make it the console by answering Y to this option. + + Even if you say Y here, the currently visible virtual console + (/dev/tty0) will still be used as the system console by default, but + you can alter that using a kernel command line option such as + console=ttyS0. (Try man bootparam or see the documentation of + your boot loader (lilo or loadlin) about how to pass options to the + kernel at boot time.) + +config SERIAL_OMAP_DMA_UART1 + bool UART1 DMA support + depends on SERIAL_OMAP + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can enable the DMA transfer on UART 1 by answering + to this option. + +config SERIAL_OMAP_DMA_UART2 + bool UART2 DMA support + depends on SERIAL_OMAP + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can enable the DMA transfer on UART 2 by answering + to this option. + +config SERIAL_OMAP_DMA_UART3 + bool UART3 DMA support + depends on SERIAL_OMAP + help + If you have enabled the serial port on the Texas Instruments OMAP + CPU you can enable the DMA transfer on UART 3 by answering + to this option. + config SERIAL_OF_PLATFORM_NWPSERIAL tristate NWP serial port driver depends on PPC_OF PPC_DCR There's absolutely no need for having Kconfig options for the DMA support. Please pass that in platform_data from the board-*.c files. This is the third time I'm commenting on the same issue! What's the point of posting these patches for review if the issues don't get solved? The omap-serial uart driver is designed to work either in interrupt mode or in DMA mode, We have provided this option so that one can select interrupt mode or DMA mode based on the uart usage, if somebody is using uart as console then interrupt mode will do, else if used with bluetooth which does huge data transfer then DMA mode can be selected. Don't you think this should be a configurable option using kconfig rather than passing as platform data? Nope. I think it should be platform_data and should be possible to override vith a kernel cmdline option. That's because we support compiling in and booting many boards the same kernel binary. if used as platform data then one has to modify platform data to switch between the interrupt and DMA mode.
Re: [PATCH 05/10] omap1: Fix DSP public peripherals support for ams-delta
* Jon Hunter jon-hun...@ti.com [091022 16:22]: Tony Lindgren wrote: From: Janusz Krzysztofik jkrzy...@tis.icnet.pl DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?) machines as long as old dspgateway code were present in the l-o tree. For several months it is no longer included, breaking support for McBSP1 based audio on Amstrad Delta, for example. This patch, derived from the old dspgateway code, corrects the problem for the board by simply taking the DSP out of reset state, I guess. That way, things should not break when a new dsp code is added to the tree, and the change can be reverted then. A minor comment/correction here. Although this bit is called DSP_RST this does not actually release the DSP from reset. This bit actually releases the reset for the priority registers (TIPB module), EMIF configuration registers, and the MPUI control logic (partially) in the DSP, thus allowing you to access the DSP peripherals via the MPUI. Bit 1 of the same register, called DSP_EN, actually releases the DSP reset. Thanks for clarifying that. If there are any reports on McBSP1 or other DSP public peripherals not working for other OMAP1 machines (I've not heard of any for now), I can prepare a more general patch providing an extra include file with a helper function defined. This would be necessary for all OMAP15xx based devices that use McBSP1 (or McBSP3 for that matter). However, I am not sure if it is common for other boards to use McBSP1 for audio. Yeah, I guess currently only board-ams-delta.c needs this for audio. But that could of course change once there are more 15xx boards using ASoC. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] Introduce Zoom3 board
Zoom3 is the next versoin of Zoom2 board. There has been a silicon update from zoom2 to zoom3. Zoom2 has OMAP34xx Zoom3 has OMAP3630 Zoom3 = OMAP3630 SOM board + same zoom2 main board + same debugboard We want to reuse the zoom2 files as much for zoom3, as at board level, there is no change at all. Vikram Pandita (3): omap: zoom: reuse zoom2 board file for zoom3 omap: zoom2: update makefile for boardfile name change omap: zoom3: add zoom3 board support arch/arm/mach-omap2/Kconfig |4 + arch/arm/mach-omap2/Makefile|5 +- arch/arm/mach-omap2/board-zoom2-zoom3.c | 296 +++ arch/arm/mach-omap2/board-zoom2.c | 292 -- 4 files changed, 304 insertions(+), 293 deletions(-) create mode 100644 arch/arm/mach-omap2/board-zoom2-zoom3.c delete mode 100644 arch/arm/mach-omap2/board-zoom2.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] omap: zoom: reuse zoom2 board file for zoom3
Move:
arch/arm/mach-omap2/board-zoom2.c - arch/arm/mach-omap2/board-zoom2-zoom3.c
Zoom2 has an omap3430 SOM board attached to a (main board + debug board)
Zoom3 has an omap3630 SOM board attached to same (main board + debug board)
The main board/peripherals/debug board remain exactly the same.
Only change is the omap silicon.
Hence reuse the board file for Zoom2 and Zoom3 boards.
This patch renames the board-zoom2 to board-zoom2-zoom3 to
reflect this reuse to avoid any confusion
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
---
arch/arm/mach-omap2/board-zoom2-zoom3.c | 292 +++
arch/arm/mach-omap2/board-zoom2.c | 292 ---
2 files changed, 292 insertions(+), 292 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-zoom2-zoom3.c
delete mode 100644 arch/arm/mach-omap2/board-zoom2.c
diff --git a/arch/arm/mach-omap2/board-zoom2-zoom3.c
b/arch/arm/mach-omap2/board-zoom2-zoom3.c
new file mode 100644
index 000..4ad9b94
--- /dev/null
+++ b/arch/arm/mach-omap2/board-zoom2-zoom3.c
@@ -0,0 +1,292 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Inc.
+ * Mikkel Christensen m...@ti.com
+ *
+ * Modified from mach-omap2/board-ldp.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/platform_device.h
+#include linux/input.h
+#include linux/input/matrix_keypad.h
+#include linux/gpio.h
+#include linux/i2c/twl4030.h
+#include linux/regulator/machine.h
+
+#include asm/mach-types.h
+#include asm/mach/arch.h
+
+#include plat/common.h
+#include plat/usb.h
+
+#include mmc-twl4030.h
+#include sdram-micron-mt46h32m32lf-6.h
+
+/* Zoom2 has Qwerty keyboard*/
+static int board_keymap[] = {
+ KEY(0, 0, KEY_E),
+ KEY(1, 0, KEY_R),
+ KEY(2, 0, KEY_T),
+ KEY(3, 0, KEY_HOME),
+ KEY(6, 0, KEY_I),
+ KEY(7, 0, KEY_LEFTSHIFT),
+ KEY(0, 1, KEY_D),
+ KEY(1, 1, KEY_F),
+ KEY(2, 1, KEY_G),
+ KEY(3, 1, KEY_SEND),
+ KEY(6, 1, KEY_K),
+ KEY(7, 1, KEY_ENTER),
+ KEY(0, 2, KEY_X),
+ KEY(1, 2, KEY_C),
+ KEY(2, 2, KEY_V),
+ KEY(3, 2, KEY_END),
+ KEY(6, 2, KEY_DOT),
+ KEY(7, 2, KEY_CAPSLOCK),
+ KEY(0, 3, KEY_Z),
+ KEY(1, 3, KEY_KPPLUS),
+ KEY(2, 3, KEY_B),
+ KEY(3, 3, KEY_F1),
+ KEY(6, 3, KEY_O),
+ KEY(7, 3, KEY_SPACE),
+ KEY(0, 4, KEY_W),
+ KEY(1, 4, KEY_Y),
+ KEY(2, 4, KEY_U),
+ KEY(3, 4, KEY_F2),
+ KEY(4, 4, KEY_VOLUMEUP),
+ KEY(6, 4, KEY_L),
+ KEY(7, 4, KEY_LEFT),
+ KEY(0, 5, KEY_S),
+ KEY(1, 5, KEY_H),
+ KEY(2, 5, KEY_J),
+ KEY(3, 5, KEY_F3),
+ KEY(5, 5, KEY_VOLUMEDOWN),
+ KEY(6, 5, KEY_M),
+ KEY(4, 5, KEY_ENTER),
+ KEY(7, 5, KEY_RIGHT),
+ KEY(0, 6, KEY_Q),
+ KEY(1, 6, KEY_A),
+ KEY(2, 6, KEY_N),
+ KEY(3, 6, KEY_BACKSPACE),
+ KEY(6, 6, KEY_P),
+ KEY(7, 6, KEY_UP),
+ KEY(6, 7, KEY_SELECT),
+ KEY(7, 7, KEY_DOWN),
+ KEY(0, 7, KEY_PROG1), /*MACRO 1 User defined */
+ KEY(1, 7, KEY_PROG2), /*MACRO 2 User defined */
+ KEY(2, 7, KEY_PROG3), /*MACRO 3 User defined */
+ KEY(3, 7, KEY_PROG4), /*MACRO 4 User defined */
+ 0
+};
+
+static struct matrix_keymap_data board_map_data = {
+ .keymap = board_keymap,
+ .keymap_size= ARRAY_SIZE(board_keymap),
+};
+
+static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
+ .keymap_data= board_map_data,
+ .rows = 8,
+ .cols = 8,
+ .rep= 1,
+};
+
+static struct omap_board_config_kernel zoom2_config[] __initdata = {
+};
+
+static struct regulator_consumer_supply zoom2_vmmc1_supply = {
+ .supply = vmmc,
+};
+
+static struct regulator_consumer_supply zoom2_vsim_supply = {
+ .supply = vmmc_aux,
+};
+
+static struct regulator_consumer_supply zoom2_vmmc2_supply = {
+ .supply = vmmc,
+};
+
+/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
+static struct regulator_init_data zoom2_vmmc1 = {
+ .constraints = {
+ .min_uV = 185,
+ .max_uV = 315,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
+ | REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = zoom2_vmmc1_supply,
+};
+
+/* VMMC2 for MMC2 card */
+static struct regulator_init_data zoom2_vmmc2 = {
+ .constraints = {
+ .min_uV
[PATCH 2/3] omap: zoom2: update makefile for boardfile name change
Accomodate the board file change in Kconfig arch/arm/mach-omap2/board-zoom2.c - arch/arm/mach-omap2/board-zoom2-zoom3.c Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/Makefile |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 03cb4fc..68f7419 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -71,7 +71,7 @@ obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ board-rx51-peripherals.o \ mmc-twl4030.o -obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ +obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2-zoom3.o \ mmc-twl4030.o \ board-zoom-debugboard.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ -- 1.6.5.rc1.19.g8426 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] omap: zoom3: add zoom3 board support
Add machine type support for zoom3 board Add board type in Kconfig and Makefile Reused the zoom board file for zoom2 and zoom3 Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/Kconfig |4 arch/arm/mach-omap2/Makefile|3 +++ arch/arm/mach-omap2/board-zoom2-zoom3.c |4 3 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 8685df5..fa20996 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -97,6 +97,10 @@ config MACH_OMAP_ZOOM2 bool OMAP3 Zoom2 board depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_ZOOM3 + bool OMAP3630 Zoom3 board + depends on ARCH_OMAP3 ARCH_OMAP34XX + config MACH_CM_T35 bool CompuLab CM-T35 module depends on ARCH_OMAP3 ARCH_OMAP34XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 68f7419..fac13ba 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -74,6 +74,9 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2-zoom3.o \ mmc-twl4030.o \ board-zoom-debugboard.o +obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom2-zoom3.o \ + mmc-twl4030.o \ + board-zoom-debugboard.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ mmc-twl4030.o diff --git a/arch/arm/mach-omap2/board-zoom2-zoom3.c b/arch/arm/mach-omap2/board-zoom2-zoom3.c index 4ad9b94..d806dbf 100644 --- a/arch/arm/mach-omap2/board-zoom2-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom2-zoom3.c @@ -281,7 +281,11 @@ static void __init omap_zoom2_map_io(void) omap2_map_common_io(); } +#ifdef CONFIG_MACH_OMAP_ZOOM3 +MACHINE_START(OMAP_ZOOM3, OMAP ZOOM3 board) +#else MACHINE_START(OMAP_ZOOM2, OMAP Zoom2 board) +#endif .phys_io= 0x4800, .io_pg_offst= ((0xfa00) 18) 0xfffc, .boot_params= 0x8100, -- 1.6.5.rc1.19.g8426 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] omap: zoom3: defconfig creation
Create zoom3 defconfig file Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- Forgot to include the defconfig file. consider this as [PATCH 4/4] of the previous zoom3 series arch/arm/configs/omap_zoom3_defconfig | 1605 + 1 files changed, 1605 insertions(+), 0 deletions(-) create mode 100644 arch/arm/configs/omap_zoom3_defconfig diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig new file mode 100644 index 000..e94136b --- /dev/null +++ b/arch/arm/configs/omap_zoom3_defconfig @@ -0,0 +1,1605 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.32-rc5 +# Fri Oct 23 14:02:02 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0x +CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION= +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE= +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED=anticipatory +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +#
RE: [PATCH 3/3] omap: zoom3: add zoom3 board support
Vikram, Just some comments I came across below. From: linux-omap-ow...@vger.kernel.org [linux-omap-ow...@vger.kernel.org] On Behalf Of Pandita, Vikram Sent: Friday, October 23, 2009 2:23 PM Add machine type support for zoom3 board Add board type in Kconfig and Makefile Reused the zoom board file for zoom2 and zoom3 Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/Kconfig |4 arch/arm/mach-omap2/Makefile|3 +++ arch/arm/mach-omap2/board-zoom2-zoom3.c |4 3 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 8685df5..fa20996 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -97,6 +97,10 @@ config MACH_OMAP_ZOOM2 bool OMAP3 Zoom2 board How about also clarifying here ^^ the chip version: bool OMAP3430 Zoom2 board I mean, just to stick to the convention you're putting below. depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_ZOOM3 + bool OMAP3630 Zoom3 board + depends on ARCH_OMAP3 ARCH_OMAP34XX Shouldn't this be: depends on ARCH_OMAP3 ARCH_OMAP36XX ? + config MACH_CM_T35 bool CompuLab CM-T35 module depends on ARCH_OMAP3 ARCH_OMAP34XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 68f7419..fac13ba 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -74,6 +74,9 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2-zoom3.o \ mmc-twl4030.o \ board-zoom-debugboard.o +obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom2-zoom3.o \ + mmc-twl4030.o \ + board-zoom-debugboard.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ mmc-twl4030.o diff --git a/arch/arm/mach-omap2/board-zoom2-zoom3.c b/arch/arm/mach-omap2/board-zoom2-zoom3.c index 4ad9b94..d806dbf 100644 --- a/arch/arm/mach-omap2/board-zoom2-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom2-zoom3.c @@ -281,7 +281,11 @@ static void __init omap_zoom2_map_io(void) omap2_map_common_io(); } +#ifdef CONFIG_MACH_OMAP_ZOOM3 +MACHINE_START(OMAP_ZOOM3, OMAP ZOOM3 board) Case consistency? MACHINE_START(OMAP_ZOOM3, OMAP Zoom3 board) Regards, Sergio +#else MACHINE_START(OMAP_ZOOM2, OMAP Zoom2 board) +#endif .phys_io= 0x4800, .io_pg_offst= ((0xfa00) 18) 0xfffc, .boot_params= 0x8100, -- 1.6.5.rc1.19.g8426 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] omap: zoom3: add zoom3 board support
Aguirre Rodriguez, Sergio Alberto had written, on 10/23/2009 02:39 PM, the following: Vikram, Just some comments I came across below. From: linux-omap-ow...@vger.kernel.org [linux-omap-ow...@vger.kernel.org] On Behalf Of Pandita, Vikram Sent: Friday, October 23, 2009 2:23 PM Add machine type support for zoom3 board Add board type in Kconfig and Makefile Reused the zoom board file for zoom2 and zoom3 Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/Kconfig |4 arch/arm/mach-omap2/Makefile|3 +++ arch/arm/mach-omap2/board-zoom2-zoom3.c |4 3 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 8685df5..fa20996 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -97,6 +97,10 @@ config MACH_OMAP_ZOOM2 bool OMAP3 Zoom2 board How about also clarifying here ^^ the chip version: bool OMAP3430 Zoom2 board I mean, just to stick to the convention you're putting below. depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_ZOOM3 + bool OMAP3630 Zoom3 board + depends on ARCH_OMAP3 ARCH_OMAP34XX Shouldn't this be: depends on ARCH_OMAP3 ARCH_OMAP36XX is there an ARCH_OMAP36XX? i believe not ;).. Linux-OMAP build allows for both boards to be defined at the same time.. so in theory you could have a single uImage. the strategy followed here will fail it.. since the board file is the same one.. it could be made to work though.. ? + config MACH_CM_T35 bool CompuLab CM-T35 module depends on ARCH_OMAP3 ARCH_OMAP34XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 68f7419..fac13ba 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -74,6 +74,9 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2-zoom3.o \ mmc-twl4030.o \ board-zoom-debugboard.o +obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom2-zoom3.o \ + mmc-twl4030.o \ + board-zoom-debugboard.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ mmc-twl4030.o diff --git a/arch/arm/mach-omap2/board-zoom2-zoom3.c b/arch/arm/mach-omap2/board-zoom2-zoom3.c index 4ad9b94..d806dbf 100644 --- a/arch/arm/mach-omap2/board-zoom2-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom2-zoom3.c @@ -281,7 +281,11 @@ static void __init omap_zoom2_map_io(void) omap2_map_common_io(); } +#ifdef CONFIG_MACH_OMAP_ZOOM3 +MACHINE_START(OMAP_ZOOM3, OMAP ZOOM3 board) Case consistency? MACHINE_START(OMAP_ZOOM3, OMAP Zoom3 board) Regards, Sergio +#else MACHINE_START(OMAP_ZOOM2, OMAP Zoom2 board) +#endif .phys_io= 0x4800, .io_pg_offst= ((0xfa00) 18) 0xfffc, .boot_params= 0x8100, -- 1.6.5.rc1.19.g8426 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 3/3] omap: zoom3: add zoom3 board support
From: Menon, Nishanth Sent: Friday, October 23, 2009 2:46 PM Aguirre Rodriguez, Sergio Alberto had written, on 10/23/2009 02:39 PM, the following: Vikram, Just some comments I came across below. From: linux-omap-ow...@vger.kernel.org [linux-omap-ow...@vger.kernel.org] On Behalf Of Pandita, Vikram Sent: Friday, October 23, 2009 2:23 PM Add machine type support for zoom3 board Add board type in Kconfig and Makefile Reused the zoom board file for zoom2 and zoom3 Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/Kconfig |4 arch/arm/mach-omap2/Makefile|3 +++ arch/arm/mach-omap2/board-zoom2-zoom3.c |4 3 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 8685df5..fa20996 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -97,6 +97,10 @@ config MACH_OMAP_ZOOM2 bool OMAP3 Zoom2 board How about also clarifying here ^^ the chip version: bool OMAP3430 Zoom2 board I mean, just to stick to the convention you're putting below. depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_ZOOM3 + bool OMAP3630 Zoom3 board + depends on ARCH_OMAP3 ARCH_OMAP34XX Shouldn't this be: depends on ARCH_OMAP3 ARCH_OMAP36XX is there an ARCH_OMAP36XX? i believe not ;).. Hmm... (Had this discussion before, not going there...) Linux-OMAP build allows for both boards to be defined at the same time.. so in theory you could have a single uImage. the strategy followed here will fail it.. since the board file is the same one.. it could be made to work though.. Not with this approach :) How about making board-zoom3.c separate from board-zoom2.c, and do a smarter way to share as much as possible? To modularize, I'll suggest taking a look at RX51 board files. That way you can have board-zoom2.c, board-zoom3.c, with the modules shared accordingly in Makefile. Camera is already doing that ;) What do you think? Regards, Sergio -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] omap: zoom3: add zoom3 board support
Aguirre Rodriguez, Sergio Alberto had written, on 10/23/2009 03:07 PM, the following: [...] Linux-OMAP build allows for both boards to be defined at the same time.. so in theory you could have a single uImage. the strategy followed here will fail it.. since the board file is the same one.. it could be made to work though.. Not with this approach :) How about making board-zoom3.c separate from board-zoom2.c, and do a smarter way to share as much as possible? To modularize, I'll suggest taking a look at RX51 board files. That way you can have board-zoom2.c, board-zoom3.c, with the modules shared accordingly in Makefile. Camera is already doing that ;) What do you think? Ack. -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] omap: zoom3: add zoom3 board support
Hi, On Fri, Oct 23, 2009 at 02:23:26PM -0500, Vikram Pandita wrote: diff --git a/arch/arm/mach-omap2/board-zoom2-zoom3.c b/arch/arm/mach-omap2/board-zoom2-zoom3.c index 4ad9b94..d806dbf 100644 --- a/arch/arm/mach-omap2/board-zoom2-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom2-zoom3.c @@ -281,7 +281,11 @@ static void __init omap_zoom2_map_io(void) omap2_map_common_io(); } +#ifdef CONFIG_MACH_OMAP_ZOOM3 +MACHINE_START(OMAP_ZOOM3, OMAP ZOOM3 board) +#else MACHINE_START(OMAP_ZOOM2, OMAP Zoom2 board) +#endif what happens if you want to build a kernel for both boards ? how about just adding a new MACHINE_START() declaration without ifdeferry ? Take a look at arch/arm/mach-omap2/board-n8x0.c for an example ;-) -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] [OMAP] GPIO Module is reset during initialization
On Fri, Oct 23, 2009 at 09:25:29PM +0530, ch...@ti.com wrote:
From: Charulatha V ch...@ti.com
During initialization, GPIO module is reset using soft reset bit
of SYSCONFIG register
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 12 +++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 2304a5d..4579650 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -21,6 +21,7 @@
#include linux/err.h
#include linux/clk.h
#include linux/io.h
+#include linux/delay.h
#include mach/hardware.h
#include asm/irq.h
@@ -1670,7 +1671,7 @@ static int __init _omap_gpio_init(void)
}
#endif
for (i = 0; i gpio_bank_count; i++) {
- int j, gpio_count = 16;
+ int j, gpio_count = 16, attempt = 0;
decrementing is better, so:
attempt = 1000
bank = gpio_bank[i];
spin_lock_init(bank-lock);
@@ -1698,6 +1699,15 @@ static int __init _omap_gpio_init(void)
static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040
};
+
+ /* Software Reset of GPIO module */
+ __raw_writel(0x0002, bank-base + OMAP24XX_GPIO_SYSCONFIG);
+ while (((__raw_readl(bank-base + OMAP24XX_GPIO_SYSSTATUS)
+ 0x1) == 0) attempt 5) {
attemp)
+ udelay(1);
i guess cpu_relax() is better here.
+ attempt++;
attempt--;
--
balbi
--
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Re: [PATCH 3/3] omap: zoom3: add zoom3 board support
On Fri, Oct 23, 2009 at 04:17:08PM -0500, Nishanth Menon wrote: Aguirre Rodriguez, Sergio Alberto had written, on 10/23/2009 03:07 PM, the following: [...] Linux-OMAP build allows for both boards to be defined at the same time.. so in theory you could have a single uImage. the strategy followed here will fail it.. since the board file is the same one.. it could be made to work though.. Not with this approach :) How about making board-zoom3.c separate from board-zoom2.c, and do a smarter way to share as much as possible? To modularize, I'll suggest taking a look at RX51 board files. That way you can have board-zoom2.c, board-zoom3.c, with the modules shared accordingly in Makefile. Camera is already doing that ;) What do you think? Ack. I guess this would only add a file with a MACHINE_START() for zoom3, right ? I'd rather go, for this case, board-n8x0.c-ish. -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 05/10] omap1: Fix DSP public peripherals support for ams-delta
Friday 23 October 2009 21:19:40 Tony Lindgren napisał(a): * Jon Hunter jon-hun...@ti.com [091022 16:22]: Tony Lindgren wrote: From: Janusz Krzysztofik jkrzy...@tis.icnet.pl DSP public peripherals used to work on OMAP1510 based (or all OMAP1 class?) machines as long as old dspgateway code were present in the l-o tree. For several months it is no longer included, breaking support for McBSP1 based audio on Amstrad Delta, for example. This patch, derived from the old dspgateway code, corrects the problem for the board by simply taking the DSP out of reset state, I guess. That way, things should not break when a new dsp code is added to the tree, and the change can be reverted then. A minor comment/correction here. Although this bit is called DSP_RST this does not actually release the DSP from reset. This bit actually releases the reset for the priority registers (TIPB module), EMIF configuration registers, and the MPUI control logic (partially) in the DSP, thus allowing you to access the DSP peripherals via the MPUI. Bit 1 of the same register, called DSP_EN, actually releases the DSP reset. Thanks for clarifying that. Forgive me my ignorance: do you think that there is still an option of putting any related piece of hardware in an idle state, as you, Tony, has suggested before for the DSP itslef? Thanks, Janusz -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] omap: zoom: reuse zoom2 board file for zoom3
On Fri, Oct 23, 2009 at 02:23:24PM -0500, Vikram Pandita wrote: Move: arch/arm/mach-omap2/board-zoom2.c - arch/arm/mach-omap2/board-zoom2-zoom3.c Zoom2 has an omap3430 SOM board attached to a (main board + debug board) Zoom3 has an omap3630 SOM board attached to same (main board + debug board) The main board/peripherals/debug board remain exactly the same. Only change is the omap silicon. Hence reuse the board file for Zoom2 and Zoom3 boards. This patch renames the board-zoom2 to board-zoom2-zoom3 to reflect this reuse to avoid any confusion Signed-off-by: Vikram Pandita vikram.pand...@ti.com could you generate this with -C, please ? it makes it easier to see what actually changed in that file ;-) -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
n8x0 idle power problem
I am trying to compile a linux-omap kernel for n810 that can do good idle power management. However, this seems to be harder than I expected. I've done all following measurements with /sys/power/sleep_while_idle set to 1. Compiler is arm-linux-gnueabi-gcc 4.2. I use n8x0_defconfig. * Maemo kernel (2.6.21) consumes ~...@3.8v when idle. This seems to be perfect. However, it has no pm regarding serial port. Whenever serial port is enabled, idle power is ~5...@3.8v. * I've compiled 2.6.28/2.6.29 from l-o git. Serial port pm works fine. However the idle power is ~2...@3.8v. That is quite strange. * For kernel = 2.6.30 I didn't manage to boot my N810. I also dig out a thread discussing about N8x0 idle power: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg11954.html where Kalle mentioned 2.6.29 idle power is OK. But I never get the same result. I'm wondering if I did something wrong in the measurement. Anybody did the same thing? You suggestion is highly appreciated. Thanks, -Felix -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] [OMAP] GPIO Module disable if all pins inactive
Varadarajan, Charu Latha had written, on 10/23/2009 10:55 AM, the following:
From: Charulatha V ch...@ti.com
This patch disables a GPIO module when all the pins of GPIO
module are inactive (clock gating forced at module level) and
enables the module when any gpio in the module is requested.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index cdc2a58..2304a5d 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -194,6 +194,7 @@ struct gpio_bank {
spinlock_t lock;
struct gpio_chip chip;
struct clk *dbck;
+ u32 gpio_status;
please rename this as gpio_usage?
maybe OMAP1 could also benefit out of this..
};
#define METHOD_MPUIO 0
@@ -1080,6 +1081,7 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ u32 ctrl = 0;
Remove this to the {} no point in wasting stack space when you dont need
to + you will generate warning for OMAP1 platforms.
spin_lock_irqsave(bank-lock, flags);
@@ -1097,6 +1099,15 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
__raw_writel(__raw_readl(reg) | (1 offset), reg);
}
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is enabled, clocks are not gated */
+ ctrl = 0xFFFE;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ bank-gpio_status |= 1 offset;
+ }
why do this every time a gpio is enabled? why not do this iff gpio was
never used before.. how about the following:
if (!bank-gpio_status (cpu_is_omap24xx() || cpu_is_omap34xx() ||
cpu_is_omap44xx())) {
u32 ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
/* Module is enabled, clocks are not gated */
ctrl = 0xFFFE;
__raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
}
bank-gpio_status |= 1 offset;
spin_unlock_irqrestore(bank-lock, flags);
return 0;
@@ -1106,6 +1117,7 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ u32 ctrl = 0;
used just once - move it to the {} + warning to OMAP1
spin_lock_irqsave(bank-lock, flags);
#ifdef CONFIG_ARCH_OMAP16XX
@@ -1123,6 +1135,15 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
__raw_writel(1 offset, reg);
}
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ bank-gpio_status = ~(1 offset);
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is disabled, clocks are gated */
+ ctrl |= 1;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ }
how about this:
bank-gpio_status = ~(1 offset);
if (!bank-gpio_status (cpu_is_omap24xx() || cpu_is_omap34xx() ||
cpu_is_omap44xx())) {
u32 ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
/* Module is disabled, clocks are gated */
ctrl |= 1;
__raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
}
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
}
@@ -1700,6 +1721,7 @@ static int __init _omap_gpio_init(void)
gpio_count = 32;
}
#endif
+ bank-gpio_status = 0;
/* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones
*/
Regards,
Nishanth Menon
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Re: [PATCH] [OMAP] GPIO Module is reset during initialization
Felipe Balbi had written, on 10/23/2009 05:56 PM, the following:
On Fri, Oct 23, 2009 at 09:25:29PM +0530, ch...@ti.com wrote:
From: Charulatha V ch...@ti.com
During initialization, GPIO module is reset using soft reset bit
of SYSCONFIG register
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 12 +++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 2304a5d..4579650 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -21,6 +21,7 @@
#include linux/err.h
#include linux/clk.h
#include linux/io.h
+#include linux/delay.h
#include mach/hardware.h
#include asm/irq.h
@@ -1670,7 +1671,7 @@ static int __init _omap_gpio_init(void)
}
#endif
for (i = 0; i gpio_bank_count; i++) {
- int j, gpio_count = 16;
+ int j, gpio_count = 16, attempt = 0;
decrementing is better, so:
attempt = 1000
please move attempt out of here to the {} for 3430.. Warning for OMAP1.
bank = gpio_bank[i];
spin_lock_init(bank-lock);
@@ -1698,6 +1699,15 @@ static int __init _omap_gpio_init(void)
static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040
};
+
+ /* Software Reset of GPIO module */
+ __raw_writel(0x0002, bank-base + OMAP24XX_GPIO_SYSCONFIG);
+ while (((__raw_readl(bank-base + OMAP24XX_GPIO_SYSSTATUS)
+0x1) == 0) attempt 5) {
attemp)
+ udelay(1);
i guess cpu_relax() is better here.
+ attempt++;
attempt--;
cant we improve this code as following:
{
u8 attempts = 25;
/* Software Reset of GPIO module */
__raw_writel(0x0002, bank-base
+ OMAP24XX_GPIO_SYSCONFIG);
/* wait for reset to be done */
while (((__raw_readl(bank-base +
OMAP24XX_GPIO_SYSSTATUS) 0x1) == 0)
attempts) {
cpu_relax();
if (attempts % 5)
udelay(1);
attempts--;
}
allows the kernel to do somethin else while we also ensure we have a 5
usec guarenteed delay before giving up..
--
Regards,
Nishanth Menon
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RE: [PATCH] [OMAP] GPIO Module disable if all pins inactive
Varadarajan, Charu Latha had written, on 10/23/2009 10:55 AM, the following:
From: Charulatha V ch...@ti.com
This patch disables a GPIO module when all the pins of GPIO
module are inactive (clock gating forced at module level) and
enables the module when any gpio in the module is requested.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index cdc2a58..2304a5d 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -194,6 +194,7 @@ struct gpio_bank {
spinlock_t lock;
struct gpio_chip chip;
struct clk *dbck;
+ u32 gpio_status;
please rename this as gpio_usage?
okay
maybe OMAP1 could also benefit out of this..
};
#define METHOD_MPUIO 0
@@ -1080,6 +1081,7 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ u32 ctrl = 0;
Remove this to the {} no point in wasting stack space when you dont need
to + you will generate warning for OMAP1 platforms.
spin_lock_irqsave(bank-lock, flags);
@@ -1097,6 +1099,15 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
__raw_writel(__raw_readl(reg) | (1 offset), reg);
}
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is enabled, clocks are not gated */
+ ctrl = 0xFFFE;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ bank-gpio_status |= 1 offset;
+ }
why do this every time a gpio is enabled? why not do this iff gpio was
never used before.. how about the following:
The module is enabled only when gpio_status indicates that no GPIO
in that module is currently active and the GPIO being requested is the 1st one
to be active in that module.
Each module would be disabled in free() API when all GPIOs in a particular
module
becomes inactive. The module is re-enabled in request() API when a GPIO is
requested from the module that was previously disabled.
if (!bank-gpio_status (cpu_is_omap24xx() || cpu_is_omap34xx() ||
cpu_is_omap44xx())) {
u32 ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
/* Module is enabled, clocks are not gated */
ctrl = 0xFFFE;
__raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
}
bank-gpio_status |= 1 offset;
Why to touch gpio_status if not used (for other than 34xx/24xx/44xx cases)?
spin_unlock_irqrestore(bank-lock, flags);
return 0;
@@ -1106,6 +1117,7 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
+ u32 ctrl = 0;
used just once - move it to the {} + warning to OMAP1
spin_lock_irqsave(bank-lock, flags);
#ifdef CONFIG_ARCH_OMAP16XX
@@ -1123,6 +1135,15 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
__raw_writel(1 offset, reg);
}
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ bank-gpio_status = ~(1 offset);
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is disabled, clocks are gated */
+ ctrl |= 1;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ }
how about this:
bank-gpio_status = ~(1 offset);
if (!bank-gpio_status (cpu_is_omap24xx() || cpu_is_omap34xx() ||
cpu_is_omap44xx())) {
u32 ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
/* Module is disabled, clocks are gated */
ctrl |= 1;
__raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
}
Why to touch gpio_status if not used (for other than 24xx/34xx/44xx cases)?
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
}
@@ -1700,6 +1721,7 @@ static int __init _omap_gpio_init(void)
gpio_count = 32;
}
#endif
+ bank-gpio_status = 0;
/* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones
*/
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[PATCH 0/2 v3] OMAP3: PM: refactor Smart Reflex
Hi, Based on linux-omap PM branch(kevin's tree) commit 25c7b64bf80176463aa741407318e0e6b21cfd71 V4 - More changes: * Guilhem's review comments for timeout return value * Changes to make sr_list and OPP table dynamic selection based on cpu_type * vsel dbgfs entry added for folks who like to see voltage decisions made by OMAP Voltage processor (e.g. without a scope) * nvalue_opp is a variable array * omapsr_list introduced, initialized runtime based on type of omap - currently omap3430 only- but makes 3630 possible * all opp searches are isolated to opp accessor functions V3 - Bunch of changes: * Introduce debugfs entries for SR - since these are variable updates, you can essentially do what we do with test values, change things but without a rebuild! * Removed the test values altogether * srid is standardised to u8 and it is not a bit field * Guilhem's changes for non-twl5030 PMIC incorporated * uses ioremap V2 - made possible to work with non twl5030 PMICs V1 - original rewrite Requesting as much testing as possible and all comments welcome. Nishanth Menon (2): OMAP3: PM: SR: prepare: remove old SR code OMAP3: PM: SR: SmartReflex Refactor Rev4.0 arch/arm/mach-omap2/pm-debug.c |3 + arch/arm/mach-omap2/resource34xx.c |8 +- arch/arm/mach-omap2/smartreflex.c | 2180 +++- arch/arm/mach-omap2/smartreflex.h | 280 +++--- arch/arm/plat-omap/Kconfig | 15 +- 5 files changed, 1544 insertions(+), 942 deletions(-) Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2 v3] OMAP3: PM: SR: prepare: remove old SR code
Preparation: remove original smart reflex code base.
This prevents the refactor appearing as a confusing diff
and hindering patch review process.
Signed-off-by: Nishanth Menon n...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Roger Quadros ext-roger.quad...@nokia.com
Cc: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
Cc: Teerth Reddy tee...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Högander Jouni jouni.hogan...@nokia.com
Cc: Imberton Guilhem guilhem.imber...@motorola.com
Cc: Mike Chan mikec...@google.com
---
arch/arm/mach-omap2/smartreflex.c | 1024 -
arch/arm/mach-omap2/smartreflex.h | 256 -
2 files changed, 0 insertions(+), 1280 deletions(-)
delete mode 100644 arch/arm/mach-omap2/smartreflex.c
delete mode 100644 arch/arm/mach-omap2/smartreflex.h
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
deleted file mode 100644
index be3a1da..000
--- a/arch/arm/mach-omap2/smartreflex.c
+++ /dev/null
@@ -1,1024 +0,0 @@
-/*
- * linux/arch/arm/mach-omap3/smartreflex.c
- *
- * OMAP34XX SmartReflex Voltage Control
- *
- * Copyright (C) 2008 Nokia Corporation
- * Kalle Jokiniemi
- *
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Lesly A M x0080...@ti.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-#include linux/kernel.h
-#include linux/init.h
-#include linux/interrupt.h
-#include linux/module.h
-#include linux/delay.h
-#include linux/err.h
-#include linux/clk.h
-#include linux/sysfs.h
-#include linux/kobject.h
-#include linux/i2c/twl4030.h
-#include linux/io.h
-
-#include plat/omap34xx.h
-#include plat/control.h
-#include plat/clock.h
-#include plat/omap-pm.h
-
-#include prm.h
-#include smartreflex.h
-#include prm-regbits-34xx.h
-
-#define MAX_TRIES 100
-
-struct omap_sr {
- int srid;
- int is_sr_reset;
- int is_autocomp_active;
- struct clk *clk;
- struct clk *vdd_opp_clk;
- u32 clk_length;
- u32 req_opp_no;
- u32 opp1_nvalue, opp2_nvalue, opp3_nvalue, opp4_nvalue;
- u32 opp5_nvalue;
- u32 senp_mod, senn_mod;
- void __iomem*srbase_addr;
- void __iomem*vpbase_addr;
-};
-
-#define SR_REGADDR(offs) (sr-srbase_addr + offset)
-
-static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
-{
- __raw_writel(value, SR_REGADDR(offset));
-}
-
-static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
- u32 value)
-{
- u32 reg_val;
-
- reg_val = __raw_readl(SR_REGADDR(offset));
- reg_val = ~mask;
- reg_val |= value;
-
- __raw_writel(reg_val, SR_REGADDR(offset));
-}
-
-static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
-{
- return __raw_readl(SR_REGADDR(offset));
-}
-
-static int sr_clk_enable(struct omap_sr *sr)
-{
- if (clk_enable(sr-clk) != 0) {
- pr_err(Could not enable %s\n, sr-clk-name);
- return -1;
- }
-
- /* set fclk- active , iclk- idle */
- sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
- SR_CLKACTIVITY_IOFF_FON);
-
- return 0;
-}
-
-static void sr_clk_disable(struct omap_sr *sr)
-{
- /* set fclk, iclk- idle */
- sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
- SR_CLKACTIVITY_IOFF_FOFF);
-
- clk_disable(sr-clk);
- sr-is_sr_reset = 1;
-}
-
-static struct omap_sr sr1 = {
- .srid = SR1,
- .is_sr_reset= 1,
- .is_autocomp_active = 0,
- .clk_length = 0,
- .srbase_addr= OMAP2_L4_IO_ADDRESS(OMAP34XX_SR1_BASE),
-};
-
-static struct omap_sr sr2 = {
- .srid = SR2,
- .is_sr_reset= 1,
- .is_autocomp_active = 0,
- .clk_length = 0,
- .srbase_addr= OMAP2_L4_IO_ADDRESS(OMAP34XX_SR2_BASE),
-};
-
-static void cal_reciprocal(u32 sensor, u32 *sengain, u32 *rnsen)
-{
- u32 gn, rn, mul;
-
- for (gn = 0; gn GAIN_MAXLIMIT; gn++) {
- mul = 1 (gn + 8);
- rn = mul / sensor;
- if (rn R_MAXLIMIT) {
- *sengain = gn;
- *rnsen = rn;
- }
- }
-}
-
-static u32 cal_test_nvalue(u32 sennval, u32 senpval)
-{
- u32 senpgain, senngain;
- u32 rnsenp, rnsenn;
-
- /* Calculating the gain and reciprocal of the SenN and SenP values */
- cal_reciprocal(senpval, senpgain, rnsenp);
- cal_reciprocal(sennval, senngain, rnsenn);
-
- return (senpgain NVALUERECIPROCAL_SENPGAIN_SHIFT) |
-
Re: [PATCH] [OMAP] GPIO Module disable if all pins inactive
Varadarajan, Charu Latha had written, on 10/23/2009 11:05 PM, the following:
#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (!bank-gpio_status) {
+ ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
+ /* Module is enabled, clocks are not gated */
+ ctrl = 0xFFFE;
+ __raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
+ }
+ bank-gpio_status |= 1 offset;
+ }
why do this every time a gpio is enabled? why not do this iff gpio was
never used before.. how about the following:
The module is enabled only when gpio_status indicates that no GPIO
in that module is currently active and the GPIO being requested is the 1st one
to be active in that module.
Each module would be disabled in free() API when all GPIOs in a particular module
becomes inactive. The module is re-enabled in request() API when a GPIO is
requested from the module that was previously disabled.
Thanks.
if (!bank-gpio_status (cpu_is_omap24xx() || cpu_is_omap34xx() ||
cpu_is_omap44xx())) {
u32 ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
/* Module is enabled, clocks are not gated */
ctrl = 0xFFFE;
__raw_writel(ctrl, bank-base + OMAP24XX_GPIO_CTRL);
}
bank-gpio_status |= 1 offset;
Why to touch gpio_status if not used (for other than 34xx/24xx/44xx cases)?
either the gpio_status should be under a #ifdef for 34xx when defining
or it should be usable by all. what it does now is do both.
my proposal is to allow gpio_status to be usable by ALL OMAPs - maybe
OMAP1 also could also use it.. I cannot comment - but it does look to
have scope of usage beyond omap2/3/4 series?
--
Regards,
Nishanth Menon
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RE: [PATCH] ARM: OMAP3: cm-t35: add EHCI support
This patch adds support for EHCI on CM-T35.
It depends on basic CM-T35 board support ([1]) and EHCI updates
in the linux-omap tree.
[1] http://thread.gmane.org/gmane.linux.ports.arm.omap/24938
---
Signed-off-by: Mike Rapoport m...@compulab.co.il
---
arch/arm/mach-omap2/board-cm-t35.c | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index 94c1f35..1465892 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -352,6 +352,17 @@ static struct twl4030_hsmmc_info mmc[] = {
{} /* Terminator */
};
+static struct ehci_hcd_omap_platform_data ehci_pdata = {
+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
I haven't been following l-o for a while - I just got back.
Is there a link to some documentation for this board (I'm just
curious about the EHCI connections)?
Are you using Port1 and Port2 both? What PHY is connected to
the ports?
+ .phy_reset = true,
+ .reset_gpio_port[0] = -EINVAL,
+ .reset_gpio_port[1] = -EINVAL,
+ .reset_gpio_port[2] = -EINVAL
You set these reset gpios below.
I guess you don't need to initialize them here.
- Anand
+};
+
static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
unsigned ngpio)
{
@@ -377,6 +388,12 @@ static int cm_t35_twl_gpio_setup(struct device *dev,
unsigned gpio,
cm_t35_vmmc1_supply.dev = mmc[0].dev;
cm_t35_vsim_supply.dev = mmc[0].dev;
+ /* setup USB with proper PHY reset GPIOs */
+ ehci_pdata.reset_gpio_port[0] = gpio + 6;
+ ehci_pdata.reset_gpio_port[1] = gpio + 7;
+
+ usb_ehci_init(ehci_pdata);
+
return 0;
}
--
1.6.0.6
--
Sincerely yours,
Mike.
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Re: [PATCH v2 12/32] OMAP: PM: DMA context save/restore for off-mode support
On Fri, Oct 23, 2009 at 2:09 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
From: Tero Kristo tero.kri...@nokia.com
For HS/EMU devices, these additional features are also used:
- DMA interrupt disable routine added
- Added DMA controller reset to DMA context restore
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm34xx.c | 3 ++
arch/arm/plat-omap/dma.c | 41
+
arch/arm/plat-omap/include/plat/dma.h | 5
3 files changed, 49 insertions(+), 0 deletions(-)
mode change 100644 = 100755 arch/arm/plat-omap/include/plat/dma.h
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index bab9b48..54fea79 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -34,6 +34,7 @@
#include plat/sdrc.h
#include plat/prcm.h
#include plat/gpmc.h
+#include plat/dma.h
#include asm/tlbflush.h
@@ -95,6 +96,7 @@ static void omap3_core_save_context(void)
omap3_gpmc_save_context();
/* Save the system control module context, padconf already save above*/
omap3_control_save_context();
+ omap_dma_global_context_save();
}
static void omap3_core_restore_context(void)
@@ -105,6 +107,7 @@ static void omap3_core_restore_context(void)
omap3_gpmc_restore_context();
/* Restore the interrupt controller context */
omap_intc_restore_context();
+ omap_dma_global_context_restore();
}
/*
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 3edffde..c0a6060 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -54,6 +54,12 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
static int enable_1510_mode;
+static struct omap_dma_global_context_registers {
+ u32 dma_irqenable_l0;
+ u32 dma_ocp_sysconfig;
+ u32 dma_gcr;
+} omap_dma_global_context;
+
struct omap_dma_lch {
int next_lch;
int dev_id;
@@ -2341,6 +2347,41 @@ void omap_stop_lcd_dma(void)
}
EXPORT_SYMBOL(omap_stop_lcd_dma);
+void omap_dma_global_context_save(void)
+{
+ omap_dma_global_context.dma_irqenable_l0 =
+ dma_read(IRQENABLE_L0);
+ omap_dma_global_context.dma_ocp_sysconfig =
+ dma_read(OCP_SYSCONFIG);
+ omap_dma_global_context.dma_gcr = dma_read(GCR);
+}
+EXPORT_SYMBOL(omap_dma_global_context_save);
+
+void omap_dma_global_context_restore(void)
+{
+ dma_write(0x2, OCP_SYSCONFIG);
+ while (!__raw_readl(omap_dma_base + OMAP_DMA4_SYSSTATUS))
+ ;
+ dma_write(omap_dma_global_context.dma_gcr, GCR);
+ dma_write(omap_dma_global_context.dma_ocp_sysconfig,
+ OCP_SYSCONFIG);
+ dma_write(omap_dma_global_context.dma_irqenable_l0,
+ IRQENABLE_L0);
+}
+EXPORT_SYMBOL(omap_dma_global_context_restore);
+
+void omap_dma_disable_irq(int lch)
+{
+ u32 val;
+
+ if (cpu_class_is_omap2()) {
+ /* Disable interrupts */
+ val = dma_read(IRQENABLE_L0);
+ val = ~(1 lch);
+ dma_write(val, IRQENABLE_L0);
+ }
+}
+
/**/
static int __init omap_init_dma(void)
diff --git a/arch/arm/plat-omap/include/plat/dma.h
b/arch/arm/plat-omap/include/plat/dma.h
old mode 100644
new mode 100755
^^ whoops?
index 72f680b..1c017b2
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -633,6 +633,11 @@ extern void omap_set_dma_dst_endian_type(int lch, enum
end_type etype);
extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
extern int omap_get_dma_index(int lch, int *ei, int *fi);
+void omap_dma_global_context_save(void);
+void omap_dma_global_context_restore(void);
+
+extern void omap_dma_disable_irq(int lch);
+
/* Chaining APIs */
#ifndef CONFIG_ARCH_OMAP1
extern int omap_request_dma_chain(int dev_id, const char *dev_name,
--
1.6.4.3
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RE: [PATCH 2/2 v2] OMAP3:PM:SR: SmartReflex Refactor Rev3.0
-Original Message-
From: Nishanth Menon [mailto:n...@ti.com]
Sent: Friday, October 23, 2009 4:40 AM
Imberton Guilhem-gimb01 had written, on 10/22/2009 04:04 PM,
the following:
I have one small comment on the actual implementation
+ do {
+ value = prm_read_mod_reg(OMAP3430_GR_MOD,
+
OMAP3_PRM_VC_BYPASS_VAL_OFFSET)
+ OMAP3430_VALID;
+ /* should i wait? */
+ if (value (count % 50))
+ udelay(10);
+ count--;
+ *timeout_us -= 5;
+ } while (value count);
Why are you removing 5us every read ?
Thanks for catching this. Yep, I have got my counters mixed
up :(.. will
add it as part of v2 for tomorrow evening with other
potential comments
if any.
If 50 iteration is 1us and we delay every loop by 10us we
should remove 11us
Shouldn't it be:
+ do {
+ value = prm_read_mod_reg(OMAP3430_GR_MOD,
+
OMAP3_PRM_VC_BYPASS_VAL_OFFSET)
+OMAP3430_VALID;
+ /* should i wait? */
+ if (value (count % 50)) {
+ udelay(10);
+ *timeout_us -= 11;
+ }
+ count--;
+ } while (value count);
here is a problem with the above logic:
a) I dont know for sure if 50 iterations == 1 uSec.
b) count = timeout*5
== if function is called with timeout = 10 uSec, count = 50, and
udelay(10) will be called once. now *timeout -=11 will make it a
negative value, which is not helpeful.
so, the decrement has to be by 10 OR i can pad timeout_us ..
not exactly
useful either..
Your right negative value wont be good
Let's use 10uSec (50 registers reading remains realy small amount of time)
And it will anyway give us a good idea of the time spent here
--
Regards,
Nishanth Menon
Regards,
Guilhem
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