On Tue, 2011-06-14 at 12:12 +0530, Raju, Sundaram wrote:
snip
The overall conclusion which I'm coming to is that we already support
what you're asking for, but the problem is that we're using different
(and I'd argue standard) terminology to describe what we have.
The only issue
Hi,
On Wed, Jun 15, 2011 at 06:24:45PM +0300, Felipe Balbi wrote:
On Wed, Jun 15, 2011 at 04:14:22PM +0100, Russell King - ARM Linux wrote:
On Wed, Jun 15, 2011 at 04:02:38PM +0300, Felipe Balbi wrote:
I have lost count how many times I have sent
these patches. Will someone either take
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Shahar Lev
Sent: Tuesday, June 14, 2011 5:46 PM
To: linux-omap@vger.kernel.org
Cc: linux-arm; Tony Lindgren; Shahar Lev
Subject: [PATCH] omap3evm: Add Mistral WL12XX
On Wednesday 15 June 2011 10:23:01 Tejun Heo wrote:
On Wed, Jun 15, 2011 at 10:18:58AM +0200, Tejun Heo wrote:
No human being can feel 120usec difference and I can't see how using
HIGHPRI is justified here (which is what the code is doing
_accidentally_ by using singlethread_workqueue).
Hi,
There is a battery driver for the N900 battery in the mainline
kernel, but it's not exposed in the rx51 board file. I found an
existing patch on [0]. Can this be pulled into the mainline kernel?
Mika Laitio: Can you send this patch to the linux-omap mailinglist?
[0]
it's a much more sensible location for that
sort of thing.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap1/board-nokia770.c |2 +-
arch/arm/mach-omap2/board-n8x0.c |2 +-
arch/arm/plat-omap/include/plat/cbus.h | 40
we don't use anything from those headers
so we might as well just drop them.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/retu.c | 10 --
drivers/cbus/tahvo.c | 10 --
2 files changed, 0 insertions(+), 20 deletions(-)
diff --git a/drivers/cbus/retu.c
trivial, no functional changes. While at
that, also drop the OMAP dependency as
there's no need for that.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/Kconfig | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/cbus/Kconfig
all drivers should appear under Device Drivers
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/Kconfig |4
drivers/Kconfig |2 ++
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 037ecda..9adc278 100644
---
Hello.
On 15-06-2011 17:02, Felipe Balbi wrote:
I have lost count how many times I have sent
these patches. Will someone either take them
in or NAK them so I stop sending ??
Felipe Balbi (2):
arm: Kconfig: select correct HAVE_SPARSE_IRQ symbol
arm: Kconfig: allow OMAP to use sparse
Hello,
On Thu, Jun 16, 2011 at 02:13:59PM +0300, Péter Ujfalusi wrote:
On Wednesday 15 June 2011 10:23:01 Tejun Heo wrote:
On Wed, Jun 15, 2011 at 10:18:58AM +0200, Tejun Heo wrote:
No human being can feel 120usec difference and I can't see how using
HIGHPRI is justified here (which is
Hi Shahar, Tony,
On Tue, Jun 14, 2011 at 3:55 PM, Tony Lindgren t...@atomide.com wrote:
* Shahar Lev sha...@wizery.com [110614 06:21]:
On Tue, Jun 14, 2011 at 3:34 PM, Tony Lindgren t...@atomide.com wrote:
This your should try to remove as it won't work nicely for supporting
various
Hi,
I was able to get this implementation to work on my setup, turned out
there was something wrong in the patch set I used on top of
linux-omap/pm to get cpuidle work on OMAP4. Anyway, attached two patches
I used for the UART part (to replace patch 3), patches 1/2 of the
original set did not
On Wed, 15 Jun 2011, Kevin Hilman wrote:
Rafael J. Wysocki r...@sisk.pl writes:
On Wednesday, June 15, 2011, Kevin Hilman wrote:
[...]
From a device driver perspective, system PM is just runtime
PM where the idleness was forced and only a subset of possible wakeup
sources are
On Wed, Jun 15, 2011 at 01:40:45PM -0700, Ambresh K wrote:
From: Ambresh K ambr...@ti.com
If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is
through gpio IO pad wakeup, then that wakeup gpio interrupt is lost.
In the current implementation, GPIO driver stores the
Hi Sanjeev,
Sanjeev Premi pr...@ti.com writes:
When multiple wakeup sources are defined in a system,
there is a small window, when more than one source
can trigger wakeup interrupt.
In the current implementation, the do-while() loop
can handle all wakeup sources that are recorded when
Grant Likely grant.lik...@secretlab.ca writes:
On Fri, May 20, 2011 at 05:14:43PM +0200, Kevin Hilman wrote:
Start moving SoC-specific register handling out of the driver by passing
in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
On 6/16/2011 9:00 PM, Pihet-XID, Jean wrote:
Hi Santosh, Benoit, Kevin,
I would like to revive this discussion. Can you give some feedback on
the self-refresh problem that is proposed in the latest patch from
Santosh? Cf. below for more details.
Comments below.
On Fri, Feb 4, 2011 at 12:39
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 8:52 PM
To: Premi, Sanjeev
Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
Subject: Re: [PATCH] omap3: pm: Downgrade WARN for no wakeup source
Hi Sanjeev,
Sanjeev Premi pr...@ti.com
On Thu, Jun 16, 2011 at 09:07:39AM -0700, Kevin Hilman wrote:
Grant Likely grant.lik...@secretlab.ca writes:
On Fri, May 20, 2011 at 05:14:43PM +0200, Kevin Hilman wrote:
Start moving SoC-specific register handling out of the driver by passing
in register offsets in via platform data.
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
Modify omap_gpio_prepare_for_idle() omap_gpio_resume_after_idle() functions
to handle save context restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.
Signed-off-by: Charulatha V ch...@ti.com
Nice! I like this approach.
Kevin
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To unsubscribe from
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
Wakeup register offsets are initialized according to OMAP versions
during device registration. These explicit checks are no longer needed.
mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now
remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
Wakeup register offsets are initialized according to OMAP versions
during device registration. These explicit checks are no longer needed.
mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAP_GPIO_INT_CONTROL in respective SoC specific files.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by:
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. In addition, organized common initialization for the
different OMAP silicon versions.
Signed-off-by:
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
In gpio_irq_handler, isr register is always accessed as 32 bit register and
only
for OMAP15xx the first 16 MSBs are masked. Correct this by using the
appropriate
readl/readw registers as per the bank width.
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
In gpio_irq_handler, isr register is always accessed as 32 bit register and
only
for OMAP15xx the first 16 MSBs are masked. Correct this by using the
appropriate
readl/readw registers as per the bank width.
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Charulatha V ch...@ti.com
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put_sync()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use dev_pm_ops now.
Signed-off-by: Charulatha V ch...@ti.com
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
Simplify omap2_gpio_prepare_for_idle() and omap2_gpio_resume_after_idle()
by moving most of the stuff to *_pm_runtime_suspend() and
*_pm_runtime_resume().
Also, omap_gpio_suspend() and omap_gpio_resume() optimized to operate per
GPIO bank
Grant Likely grant.lik...@secretlab.ca writes:
On Thu, Jun 16, 2011 at 09:07:39AM -0700, Kevin Hilman wrote:
Grant Likely grant.lik...@secretlab.ca writes:
On Fri, May 20, 2011 at 05:14:43PM +0200, Kevin Hilman wrote:
Start moving SoC-specific register handling out of the driver by
Premi, Sanjeev pr...@ti.com writes:
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 8:52 PM
To: Premi, Sanjeev
Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
Subject: Re: [PATCH] omap3: pm: Downgrade WARN for no wakeup source
Hi
[sp] Could this be renamed simply as: OMAP3EVM_WL12XX?
OR is there a specific reason to add vendor/manufacturers' name
to the defintion?
I don't mind changing it.
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Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Following set contains PRCM chain interrupt handling for OMAP3/4.
What does this series apply to? It doesn't seem to apply to mainline
(v3.0-rc3) or l-o master.
Kevin
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the
On Thu, Jun 16, 2011 at 11:16:38AM -0700, Kevin Hilman wrote:
Grant Likely grant.lik...@secretlab.ca writes:
On Thu, Jun 16, 2011 at 09:07:39AM -0700, Kevin Hilman wrote:
Grant Likely grant.lik...@secretlab.ca writes:
On Fri, May 20, 2011 at 05:14:43PM +0200, Kevin Hilman wrote:
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 11:55 PM
To: Premi, Sanjeev
Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
Subject: Re: [PATCH] omap3: pm: Downgrade WARN for no wakeup source
Premi, Sanjeev pr...@ti.com writes:
Nishanth Menon n...@ti.com writes:
Every PMIC has it's own eccentricities, For example, one of the
PMIC has MSB set to 1 for a specific function - voltage enable!
using an hardcoded value specific for TWL when copied over to
such an implementation causes the system to crash as the MSB bit
On Thu, Jun 16, 2011 at 03:49:05PM +0400, Sergei Shtylyov wrote:
Hello.
On 15-06-2011 17:02, Felipe Balbi wrote:
I have lost count how many times I have sent
these patches. Will someone either take them
in or NAK them so I stop sending ??
Felipe Balbi (2):
arm: Kconfig: select correct
Pointers to statically declared platform device structures which are
registered with platform_device_register() are then used during run time
to access these structure members, for example from platform_uevent()
and much more. Therefore, these structures should never be placed inside
sections
On Fri, Jun 17, 2011 at 12:02:46AM +0200, Janusz Krzysztofik wrote:
Pointers to statically declared platform device structures which are
registered with platform_device_register() are then used during run time
to access these structure members, for example from platform_uevent()
and much
On Thursday, June 16, 2011, Kevin Hilman wrote:
Rafael J. Wysocki r...@sisk.pl writes:
On Wednesday, June 15, 2011, Kevin Hilman wrote:
[...]
From a device driver perspective, system PM is just runtime
PM where the idleness was forced and only a subset of possible wakeup
sources
On Thursday, June 16, 2011, Alan Stern wrote:
On Wed, 15 Jun 2011, Kevin Hilman wrote:
Rafael J. Wysocki r...@sisk.pl writes:
On Wednesday, June 15, 2011, Kevin Hilman wrote:
[...]
From a device driver perspective, system PM is just runtime
PM where the idleness was
On Thu, Jun 16, 2011 at 15:45, Kevin Hilman khil...@ti.com wrote:
Nice!
A reference to where these voltages values came from would be good to
have in the code as well.
these are just conversions of the existing values - :( I think we need
a seperate patch updating from each of OMAP DMs..
On Thu, Jun 16, 2011 at 15:47, Kevin Hilman khil...@ti.com wrote:
Nishanth Menon n...@ti.com writes:
OPP functions as described in Documentation/power/opp.txt
should be accessed under rcu_locks.
Signed-off-by: Nishanth Menon n...@ti.com
This looks like a fix needed in mainline.
Please
Pointers to statically declared platform device structures which are
registered with platform_device_register() are then used during run time
to access these structure members, for example from platform_uevent()
and much more. Therefore, these structures should never be placed inside
sections
[...]
Simplify omap2_gpio_prepare_for_idle() and
omap2_gpio_resume_after_idle()
by moving most of the stuff to *_pm_runtime_suspend() and
*_pm_runtime_resume().
Also, omap_gpio_suspend() and omap_gpio_resume() optimized to operate
per
GPIO bank instead of operating on entire list
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 11:28 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 14/18] GPIO: OMAP: Fix use of readl/readw to access
isr_reg
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 11:24 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 14/18] GPIO: OMAP: Fix use of readl/readw to access
isr_reg
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 11:33 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 17/18] GPIO: OMAP: Use PM runtime framework
Tarun Kanti DebBarma tarun.ka...@ti.com
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 11:19 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 12/18] GPIO: OMAP: Clean omap_gpio_mod_init
function
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 11:09 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 08/18] GPIO: OMAP: Use wkup regs off/suspend
support flag
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 10:31 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 09/18] GPIO: OMAP: Use level/edge detect reg
offsets
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 10:24 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 08/18] GPIO: OMAP: Use wkup regs off/suspend
support flag
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 10:05 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com
Subject: Re: [PATCH v2 05/18] GPIO: OMAP: Handle save/restore ctx in GPIO
driver
Tarun Kanti DebBarma
-Original Message-
From: Hilman, Kevin
Sent: Thursday, June 16, 2011 9:46 PM
To: DebBarma, Tarun Kanti
Cc: linux-omap@vger.kernel.org; Shilimkar, Santosh; t...@atomide.com;
linux-arm-ker...@lists.infradead.org
Subject: Re: [PATCH v2 00/18] GPIO: OMAP: Driver Cleanup and Fixes
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