Hi Tony,
On 04/01/2014 05:13 PM, Felipe Balbi wrote:
On Tue, Apr 01, 2014 at 01:37:27PM +0300, Roger Quadros wrote:
The USB3 PHY driver (ti-pipe3) was updated so that the relevant
clock phandles are expected in the DT node.
Provide the necessary clocks.
Reported-by: Kishon Vijay Abraham I
Hi Paul,
On Friday 11 April 2014 11:39 PM, Paul Walmsley wrote:
On Fri, 11 Apr 2014, Paul Walmsley wrote:
On Wed, 9 Apr 2014, Lokesh Vutla wrote:
During boot, when hwmod tries to cut clocks for debugss it always
gets stuck in transition state and throws the following warning:
[
Vinod,
On Wednesday 19 March 2014 11:25 AM, Sekhar Nori wrote:
The code to handle any length SG lists calls edma_resume()
even before edma_start() is called. This is incorrect
because edma_resume() enables edma events on the channel
after which CPU (in edma_start) cannot clear posted
events
On Mon, Apr 14, 2014 at 02:01:11PM +0530, Sekhar Nori wrote:
Vinod,
On Wednesday 19 March 2014 11:25 AM, Sekhar Nori wrote:
The code to handle any length SG lists calls edma_resume()
even before edma_start() is called. This is incorrect
because edma_resume() enables edma events on the
On Monday 14 April 2014 02:27 PM, Vinod Koul wrote:
On Mon, Apr 14, 2014 at 02:01:11PM +0530, Sekhar Nori wrote:
Vinod,
On Wednesday 19 March 2014 11:25 AM, Sekhar Nori wrote:
The code to handle any length SG lists calls edma_resume()
even before edma_start() is called. This is incorrect
Patches for this feature were already submitted and should land in
3.15 after rc1 (http://www.spinics.net/lists/linux-serial/msg12114.html).
Is anyone working on this feature for OMAP?
Yegor
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On 04/14/2014 08:07 AM, Kuninori Morimoto wrote:
Hi Jyri, Mark
...
Could you please teach me current status of this patch ?
Hi,
This patch-set was never merged as such. Instead there is another
patch-set that has been applied by Mark to cover this issue [1]. The
patch maintains backward
Hi,
Changes since v2:
- Dropped patch 10 from v2 (simplify direction configuration...)
- Dropped the channel priority related patches since we are going to go via
different route for configuring the priority.
- Added ACK from Joel for the patches since they are not changed since v2
Changes
In case of not supported direction it is better to print the direction also.
It is unlikely, but in such an event it helps with the debugging.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 4 ++--
1 file changed, 2
It helps to identify issues if we have some information regarding to the
channel which the event is associated.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff
prep_slave_sg and prep_dma_cyclic callbacks have mostly same failure cases
with the same texts printed in case we hit them. It helps when debugging if
we know exactly which callback generated the errors.
At the same time change the debug level for descriptor allocation failure
from dbg to err
Do not print the paRAM information when verbose debugging is not asked and
also reduce the number of lines printed in edma_prep_dma_cyclic()
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 11 +--
1 file changed, 5
With the callback implemented omap-dma can provide information to client
drivers regarding to supported address widths, directions, residue
granularity, etc.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 18 ++
Indicate that the edma dmaengine driver has support for cyclic mode.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c | 1 +
drivers/dma/edma.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/common/edma.c
Pause/Resume can be used by the audio stack when the stream is paused/resumed
The edma platform code has support for this and the legacy audio stack used
this.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 28
This patchset adds many improvements to extcon class driver and extcon
provider drivers. It changes extcon API to faster and safer by replaceing
function taking extcon and cable names with functions working with
structures representing this objects.
It adds more advanced devicetree support which
This patch modifies extcon-adc-jack driver to use initialization data from
devicetree, when platform data is not available. It allows to define cable list
with ADC value ranges for each of them in devicetree bindings.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
This patch adds check if pdata is NULL, to avoid NULL pointer dereference
when platform data is not available. After this changes, in described
situation driver will be configured with default values.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/extcon/extcon-max77693.c |2
This patch adds check if pdata is NULL, to avoid NULL pointer dereference
when platform data is not available. After this changes, in described
situation driver will be configured with default values.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/extcon/extcon-max8997.c |2
This patch modifies extcon-gpio driver to use initialization data from
devicetree if platform data is not available. It allows to set controller
and cable names, and another parameters from devicetree bindings.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/extcon/extcon-gpio.c
This patch removes cable array example form extcon code, to avoid
littering driver namespace. Now it's located in extcon documentation.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
Documentation/extcon/extcon.txt | 112 +++
Added check if pointer to edev is not NULL, and updated documentation of index
parameter. Function extcon_find_cable_index() has been deleted and cannot be
used to retrieve cable number.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/extcon/extcon-class.c |9 ++---
1
This patch simplifies extcon_updata_state() function. There is greatly
simplified kobject_uevent preparation. Also meaning of variable passed
to raw_notifier_call_chain() (and in effect to _call_per_cable()) has
changed. Now positions on ones in variable 'val' in _call_per_cable()
indicates
This patch removes two functions, extcon_find_cable_index() and
extcon_get_edev_by_phandle(). They are not longer needed, since
extcon client API has changed to be oriented on extcon_cable instead
of extcon_dev.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
This patch improves extcon client API to get rid of ugly functions operating
on name strings. It gives independency from naming convention in extcon
provider drivers. Names given at provider registration are now used only
for sysfs, debugs, and to support platforms using legacy devicetree
This patch modifies extcon_get_edev_by_phandle() function, to match
extcon device by devicetree node. This modification needed to add
field 'node' in extcon_dev structure, and fill it in probe function
of each extcon provider driver.
This patch adds function of_extcon_get_extcon_dev(),
returning
This patch removes extcon_set_cable_state() and replace all calls of
this function witch extcon_set_cable_state_(), which is faster version.
This is first step of changing extcon API to faster and safer.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/extcon/extcon-class.c|
Hi Vinod,
On 04/11/2014 03:46 PM, Vinod Koul wrote:
I think the number shouldn't be viewed in absolute terms. If we decide that
(lets
say) 0-7, then any controller should map 0 to lowest and 7 to highest.
For your case you can do this and then intermediate numbers would be medium
This patch adds extcon devicetree bindings. Documentation describes in general
client and provider bindings, and contains detailed desctiprion of bindings
for each extcon provider.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
.../devicetree/bindings/extcon/extcon-adc-jack.txt | 60
This patch changes charger-manager bindings to be compatible with
new extcon bindings.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
.../bindings/power_supply/charger-manager.txt | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git
The edmacc_param struct should follow the layout of the paRAM area in the
HW. Be explicit on the size of the fields (u32) and also mark the struct
as packed to avoid any padding on non 32bit architectures.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
For later use save the number of queues available for the CC.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index
When clients asks for maxburst = 0 it is basically the same case as if they
were asking for maxburst = 1 since in both case ASYNC need to be used and
the eDMA is expected to write/read one word per DMA request.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes
On Monday 14 April 2014 05:26 PM, Peter Ujfalusi wrote:
Hi Vinod,
On 04/11/2014 03:46 PM, Vinod Koul wrote:
I think the number shouldn't be viewed in absolute terms. If we decide that
(lets
say) 0-7, then any controller should map 0 to lowest and 7 to highest.
For your case you can do
On 04/14/2014 03:12 PM, Sekhar Nori wrote:
On Monday 14 April 2014 05:26 PM, Peter Ujfalusi wrote:
Hi Vinod,
On 04/11/2014 03:46 PM, Vinod Koul wrote:
I think the number shouldn't be viewed in absolute terms. If we decide that
(lets
say) 0-7, then any controller should map 0 to lowest and
On Saturday 12 April 2014 05:06 PM, Joachim Eastwood wrote:
Hi,
I getting the following error on Linus master right now.
[ 2.166320] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:113
l3_interrupt_handler+0xf4/0x154()
[ 2.166320] L3 custom error: MASTER:MPU TARGET:L4 PER2
[
On Monday 14 April 2014 06:11 PM, Peter Ujfalusi wrote:
On 04/14/2014 03:12 PM, Sekhar Nori wrote:
On Monday 14 April 2014 05:26 PM, Peter Ujfalusi wrote:
Hi Vinod,
On 04/11/2014 03:46 PM, Vinod Koul wrote:
I think the number shouldn't be viewed in absolute terms. If we decide
that (lets
On 04/14/2014 11:25 AM, Nishanth Menon wrote:
Please ignore this one patch from the series, there is a replacement
patch already posted as part of the series... this stale patch got
through :(
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Regards,
Nishanth Menon
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The logic between handling CUSTOM_ERROR and STANDARD_ERROR
is just the reporting style.
So make it generic, simplify and standardize the reporting
with both master and target information printed to log.
While at it, fix a minor formatting error.
Signed-off-by: Nishanth Menon n...@ti.com
---
From: Rajendra Nayak rna...@ti.com
On DRA7, unlike on OMAP4 and OMAP5, the flag mux input numbers used
to indicate the source of errors are not continous. Have a way in the
driver to catch these and WARN the user of the flag mux input thats
either undocumented or wrong.
In the similar vein,
From: Rajendra Nayak rna...@ti.com
DRA7 is distinctly different from OMAP4 in terms of masters and clock
domain organization. There two main clock domains which is divided as
follows:
0x4400 0x100 is clk1 and clk2 is the sub clock domain
0x4500 0x1000 is clk3
Add all the
Currently we use __raw_readl and writel in this driver, however, there
is no strict sequencing needs for this driver, hence we should be good
with the relaxed variants.
While at it, simplify address computation using variables for register.
Signed-off-by: Nishanth Menon n...@ti.com
---
Hi,
The following series is based on v3.15-rc1 + peter's patch series:
patch #1: https://patchwork.kernel.org/patch/3923141/
(drivers: bus: omap_l3: Convert to use devm_kzalloc)
patch #2: https://patchwork.kernel.org/patch/3923061/
(drivers: bus: omap_l3: Convert
Currently the target instance information is organized indexed by bit
field offset into multiple arrays.
1. We currently have offsets specific to each target associated with each
clock domains are in seperate arrays:
l3_targ_inst_clk1
l3_targ_inst_clk2
l3_targ_inst_clk3
2. Then they are
From: Afzal Mohammed af...@ti.com
Add AM4372 information to handle L3 error.
AM4372 has two clk domains 100f and 200s. Provide flagmux and data
associated with it.
NOTE: Timeout doesn't have STDERRLOG_MAIN register. And per hardware
team, L3 timeout error cannot be cleared the normal way (by
From: Sricharan R r.sricha...@ti.com
DRA7xx SoC has the same l3-noc interconnect ip (as OMAP4 and OMAP5), but
AM437x SoC has just 2 modules instead of 3 which other SoCs have.
So, stop using direct access of array indices and use of-match data and
simplify implementation to benefit future usage.
we do not use iclk directly anymore. And, even if we had to, we
should be using pm_runtime APIs to do the same to be completely SoC
independent.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/bus/omap_l3_noc.h |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/bus/omap_l3_noc.h
Move the L3 master structure out of the static definition to enable
reuse for other SoCs.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/bus/omap_l3_noc.h | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.h
l3-dev is not populated, so populate it and use it to print information
relevant to the device instead of using a generic pr_*.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/bus/omap_l3_noc.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git
just simplify derefencing that is equivalent.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/bus/omap_l3_noc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 0d346e6..b39ef93 100644
---
Currently we use __raw_readl and writel in this driver, however, there
is no strict sequencing needs for this driver, hence we should be good
with the relaxed variants.
While at it, simplify address computation using variables for register.
Signed-off-by: Nishanth Menon n...@ti.com
---
The variable use_gptimer_clksrc is only used by two __init functions,
So we can freely free it after boot.
Signed-off-by: Oussama Ghorbel ghor...@pivasoftware.com
---
arch/arm/mach-omap2/timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/timer.c
This allows us to encompass target information and flag mux offset that
points to the target information into a singular structure. This saves
us the need to look up two different arrays indexed by module ID for
information.
This allows us to reduce the static target information allocation to
This is an embarrassing patch :(.
Texas Corporation does not make OMAP. Texas Instruments Inc does.
For that matter I dont seem to be able to find a Texas Corporation on
the internet either.
While at it, update coverage to the current year and update the template
to remove redundant information
While OMAP4 and OMAP5 had 3 separate clock domains, DRA7 has only 2
and the first one then is internally divided into 2 sub clock domains.
To better represent this in the driver, we use the concept of submodule.
The address defintions in the devicetree is as per the high level
clock
From: Sricharan R r.sricha...@ti.com
Since omap_l3_noc driver is now being used for OMAP5 and reusable with
DRA7 and AM437x, using omap4 specific naming is misleading.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/bus/omap_l3_noc.c | 24
Patch series based on:
v3.15-rc1 tag.
Depends on series posted: http://marc.info/?l=linux-omapm=139749383932575w=2
DTS Patches is available here:
https://github.com/nmenon/linux-2.6-playground/commits/l3noc/dts-fixes
This just adds the dts information based on driver support provided.
Test
From: Rajendra Nayak rana...@ti.com
We have currently marked the DRA7 L3 as being compatible with
omap4-l3-noc This is not true considering the differences in data
involved.
Now that we have proper support for ti,dra7-l3-noc, add the clock
modules clk1 and clk3 (clk2 submodule will be handled by
From: Afzal Mohammed af...@ti.com
AM4372 has two clk domains 100f and 200s. Provide register mapping,
interrupt information and compatibility flags associated with it.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Sekhar Nori
On 14 April 2014 15:38, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Saturday 12 April 2014 05:06 PM, Joachim Eastwood wrote:
Hi,
I getting the following error on Linus master right now.
[ 2.166320] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:113
On 04/14/2014 02:15 PM, Joachim Eastwood wrote:
On 14 April 2014 15:38, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Saturday 12 April 2014 05:06 PM, Joachim Eastwood wrote:
Hi,
I getting the following error on Linus master right now.
[ 2.166320] WARNING: CPU: 0 PID: 0 at
The PWM core is now able to initialize the PWM period from platform_data. Use it
and if it is not configured, use the supplied pwm_period_ns.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
drivers/video/backlight/pwm_bl.c | 8 +---
1 file changed, 5 insertions(+),
This will allow to get rid of the .pwm_period_ns member of struct
platform_pwm_backlight_data as the period will be set by the PWM core.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-pxa/hx4700.c | 9 -
1 file changed, 8 insertions(+), 1
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-pxa/hx4700.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 0788a1f171fe..c66ad4edc5e3 100644
---
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-shmobile/board-armadillo800eva.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c
b/arch/arm/mach-shmobile/board-armadillo800eva.c
Now that PWM_LOOKUP is not used anymore, modify it to initialize all the
members of struct pwm_lookup.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
Documentation/pwm.txt | 3 ++-
include/linux/pwm.h | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff
The PWM core is now able to initialize the PWM period. Use it and if it is not
configured, use the supplied pwm_period_ns.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
drivers/leds/leds-pwm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Adds a period and a polarity member to struct pwm_lookup so that when performing
a lookup using the lookup table instead of device tree, we are able to set the
period and the polarity accordingly like what is done in
of_pwm_xlate_with_flags.
The period and polarity can be set unconditionally as
The struct tpu_pwm_platform_data is not used anymore and the polarity
initialization will be taken care of by the PWM core.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
drivers/pwm/pwm-renesas-tpu.c | 19 +++
Hi,
A patch set as suggested by Thierry to make lookup with the lookup table
instead of device tree behave more like when using device tree.
The first patch adds a period and a polarity member to the lookup table and use
those to set period and polarity.
Patch 2, 4 and 5 are making use of those
Initializing all the struct pwm_lookup members allows to get rid of the struct
tpu_pwm_platform_data as the polarity initialization will be taken care of by
the PWM core.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-shmobile/board-armadillo800eva.c | 20
This will allow to get rid of the .pwm_period_ns member of struct led_pwm as the
period will be set by the PWM core.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
On Fri, Apr 11, 2014 at 2:47 AM, Tony Lindgren t...@atomide.com wrote:
While debugging legacy mode vs device tree booted PM regressions,
I noticed that omap3 is not toggling sys_clkreq and sys_off_mode
pins like it should.
The sys_clkreq and sys_off_mode pins are not toggling because of
the
On Mon, Apr 14, 2014 at 11:59:44PM +0200, Alexandre Belloni wrote:
Initializing all the struct pwm_lookup members allows to get rid of the struct
tpu_pwm_platform_data as the polarity initialization will be taken care of by
the PWM core.
Signed-off-by: Alexandre Belloni
Hi Jyri
This patch-set was never merged as such. Instead there is another
patch-set that has been applied by Mark to cover this issue [1]. The
patch maintains backward compatibility, with the Nicolin Chen's patch
[2]. In other words, old style bitclock-master and frame-master
boolean
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