On 04/30/2014 06:20 PM, Nishanth Menon wrote:
On Tue, Apr 29, 2014 at 11:16 AM, Felipe Balbi ba...@ti.com wrote:
On Tue, Apr 29, 2014 at 11:14:20AM -0500, Felipe Balbi wrote:
On Tue, Apr 29, 2014 at 10:50:39AM +0300, Roger Quadros wrote:
+Nishant
Hi,
On 04/28/2014 07:03 PM, Felipe Balbi
On 05/01/2014 10:00 PM, Mike Turquette wrote:
Quoting Tero Kristo (2014-04-29 07:51:14)
On 04/29/2014 05:15 PM, Sourav Poddar wrote:
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar
On Sun, May 04, 2014 at 11:38:41AM -0400, Greg Kroah-Hartman wrote:
3.14-stable review patch. If anyone has any objections, please let me know.
This one should not be backported without commit
a2f8d6b30321 (ARM: dts: am335x: update USB DT references)
which is in Linus' tree but is not
On 05/05/2014 10:23 AM, Roger Quadros wrote:
On 04/30/2014 06:20 PM, Nishanth Menon wrote:
On Tue, Apr 29, 2014 at 11:16 AM, Felipe Balbi ba...@ti.com wrote:
On Tue, Apr 29, 2014 at 11:14:20AM -0500, Felipe Balbi wrote:
On Tue, Apr 29, 2014 at 10:50:39AM +0300, Roger Quadros wrote:
+Nishant
Hi,
This series enables the 2 USB ports on the DRA7-evm.
NOTE: USB1 port is hard coded to work in peripheral mode and USB2 port
in host mode. This is due to missing ID pin interrupt in pre ver.E boards.
USB1 port doesn't in peripheral mode out of the box due to missing VBUS
detection
and
This clock gate description is missing in the older Reference manuals.
It is present on the SoC to provide 960MHz reference clock to the
internal USB PHYs.
Reference: DRA75x_DRA74x_ES1.1_NDA_TRM_vO.pdf, pg. 900,
Table 3-812. CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL
Use l3init_960m_gfclk as parent of
Add wkupclk and refclk information to DT binding information.
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git
As clocks might be named differently on multiple platforms, use a generic
name in the driver and allow device tree node to specify the platform
specific clock name.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/phy/phy-omap-usb2.c | 30 +++---
1 file changed, 23
Add USB pinmux information and USB modes
for the USB controllers.
CC: Benoît Cousson bcous...@baylibre.com
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 24
1 file changed, 24 insertions(+)
diff
Add the sysconfig class bits for the Super Speed USB
controllers
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Remove ocp2scp1 address space from hwmod data as it is
now provided via device tree.
CC: Benoît Cousson bcous...@baylibre.com
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros
The USB2 PHY driver expects named clocks for wakeup clock
and reference clock. Provide this information for USB2 PHY
nodes in OMAP4 and OMAP5 SoC DTS.
CC: Benoît Cousson bcous...@baylibre.com
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
On 05/02/2014 09:32 AM, George Cherian wrote:
cpsw_cpts_rft_clk has got the choice of 3 clocksources
-dpll_core_m4_ck
-dpll_core_m5_ck
-dpll_disp_m2_ck
By default dpll_core_m4_ck is selected, witn this as clock
source the CPTS doesnot work properly. It gives clockcheck errors
while
Hi!
(Only part of original cc-list preserved.)
RFC: Fixed comments for patch v8, removed sorting and string comparisons
Ok, its better now.
The Power Supply charging driver connects multiple subsystems
to do charging in a generic way. The subsystems involves power_supply,
thermal and
CPUFreq usage of OPP should be independent of the ordering of type of
data storage inside OPP layer. The current operations can equally be
performed by generic operations.
[RFC]: https://patchwork.kernel.org/patch/4100811/
Series based on: v3.15-rc1
Nishanth Menon (2):
PM / OPP: Remove
CPUFREQ custom functions for OPP (Operating Performance Points)
currently exist inside the OPP library. These custom functions currently
depend on internal data structures to pick up OPP information to create
the cpufreq table. For example, the cpufreq table is created precisely
in the same order
CPUFreq specific helper functions for OPP (Operating Performance Points)
now use generic OPP functions that allow CPUFreq to be be moved back
into CPUFreq framework. This allows for independent modifications
or future enhancements as needed isolated to just CPUFreq framework
alone.
Here, we just
Hi Illia,
On 02/19/2014 07:53 PM, Paul Walmsley wrote:
On Wed, 5 Feb 2014, Illia Smyrnov wrote:
Commit 313a76e (ARM: OMAP2+: hwmod: Fix SOFTRESET logic) introduced
softreset bit cleaning right after set one. It is caused L3 error for
OMAP4 ISS because ISS register write occurs when ISS
From: Nishanth Menon n...@ti.com
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two
different GIC interrupts. This is completely undesirable. Instead, check
if the requested crossbar event is pre-allocated and provide that GIC
mapping back to caller if already
These are fixes for the crossbar to handle two interrupts getting
mapped twice to same crossbar and to skip some interrupts being used
due to hardware bugs.
Nishanth Menon (5):
irqchip: crossbar: dont use '0' to mark reserved interrupts
irqchip: crossbar: check for premapped crossbar before
From: Nishanth Menon n...@ti.com
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c |5
From: Nishanth Menon n...@ti.com
Reverse the search algorithm to ensure that address mapping and IRQ
allocation logics are proper. This can open up new bugs which are
easily fixable rather than wait till allocation logic approaches
the limit to find new bugs.
Signed-off-by: Nishanth Menon
From: Nishanth Menon n...@ti.com
Since crossbar is s/w configurable, the initial settings of the
crossbar cannot be assumed to be sane. This implies that:
a) On initialization all un-reserved crossbars must be initialized to
a known 'safe' value.
b) When unmapping the interrupt, the safe value
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by:
On 5 May 2014 19:03, Nishanth Menon n...@ti.com wrote:
diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
int dev_pm_opp_init_cpufreq_table(struct device *dev,
struct cpufreq_frequency_table **table)
{
- struct device_opp *dev_opp;
On Friday 02 May 2014 12:01 PM, George Cherian wrote:
The series adds CPTS support for AM4372.
Patch 1 - DT changes w.r.t clock changes for AM33xx.
Patch 2 - CPTS clock name harcoding in the driver is removed.
Easier to pass the clock name from dt rather than hardcoding in
driver.
On Mon, May 5, 2014 at 9:23 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
What if opp is being added for some reason at the same time?
I hope we can surely see some awkward results, maybe some
NULL pointers invocations as well..
we wont - rcu operations ensure that.
--
To unsubscribe from
Hi Tony,
On Tuesday 11 March 2014 06:11 PM, Sricharan R wrote:
Tony,
On Monday 10 March 2014 10:06 PM, Tony Lindgren wrote:
* Olof Johansson o...@lixom.net [140308 23:36]:
On Sun, Mar 02, 2014 at 03:14:49PM -0800, Tony Lindgren wrote:
The following changes since commit
Hi,
On Monday 05 May 2014 07:58 PM, Sricharan R wrote:
Hi Tony,
On Tuesday 11 March 2014 06:11 PM, Sricharan R wrote:
Tony,
On Monday 10 March 2014 10:06 PM, Tony Lindgren wrote:
* Olof Johansson o...@lixom.net [140308 23:36]:
On Sun, Mar 02, 2014 at 03:14:49PM -0800, Tony Lindgren wrote:
On 5 May 2014 19:03, Nishanth Menon n...@ti.com wrote:
CPUFreq specific helper functions for OPP (Operating Performance Points)
now use generic OPP functions that allow CPUFreq to be be moved back
into CPUFreq framework. This allows for independent modifications
or future enhancements as
Hi Tony,
On Monday 30 December 2013 12:28 PM, Sricharan R wrote:
Hi Benoit,
On Thursday 14 November 2013 05:55 PM, Sricharan R wrote:
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from
On 5 May 2014 19:55, Nishanth Menon n...@ti.com wrote:
On Mon, May 5, 2014 at 9:23 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
What if opp is being added for some reason at the same time?
I hope we can surely see some awkward results, maybe some
NULL pointers invocations as well..
we
On 05/05/2014 09:37 AM, Sricharan R wrote:
[..]
I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4
g...@github.com:Sricharanti/sricharan.git
branch: crossbar_dts_3.15_rc4
These patches are dependent on the crossbar driver fixes sent below.
From: George Cherian george.cher...@ti.com
Date: Fri, 2 May 2014 12:01:58 +0530
The series adds CPTS support for AM4372.
Patch 1 - DT changes w.r.t clock changes for AM33xx.
Patch 2 - CPTS clock name harcoding in the driver is removed.
Easier to pass the clock name from dt rather
Sricharan R r.sricha...@ti.com wrote on Mon [2014-May-05 19:48:42 +0530]:
These are fixes for the crossbar to handle two interrupts getting
mapped twice to same crossbar and to skip some interrupts being used
due to hardware bugs.
Nishanth Menon (5):
irqchip: crossbar: dont use '0' to
On Mon, May 05, 2014 at 12:54:40PM +0300, Roger Quadros wrote:
As clocks might be named differently on multiple platforms, use a generic
name in the driver and allow device tree node to specify the platform
specific clock name.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Felipe
* Tony Lindgren t...@atomide.com [140430 10:48]:
* Joachim Eastwood manab...@gmail.com [140429 18:08]:
On 30 April 2014 01:52, Tony Lindgren t...@atomide.com wrote:
Looks like quite a few omaps have sharp ls037v7dw01 that's configured
as various panel dpi entries for whatever legacy
* Tony Lindgren t...@atomide.com [140429 16:53]:
Hi all,
Here are few patches to add devicetree support for panel ls037v7dw01
that's found on many omap3 boards. They seem to be often mis-configured
as various panel dpi entries, but really should be move to use panel
ls037v7dw01 instead.
* George Cherian george.cher...@ti.com [140505 01:04]:
Hi Benoit,
On 4/25/2014 9:49 PM, Felipe Balbi wrote:
On Wed, Mar 19, 2014 at 03:39:58PM +0530, George Cherian wrote:
The patch series adds USB dt nodes for am43xx epos and gp evm
Boot tested with linux-next + Tony's omap-for-v3.15/dt
* Sebastian Reichel s...@debian.org [140313 15:03]:
Add device tree support for the wireless chip
built into the Nokia N900.
Signed-off-by: Sebastian Reichel s...@debian.org
Thanks applying into omap-for-v3.16/dt.
Tony
---
arch/arm/boot/dts/omap3-n900.dts | 40
* Sebastian Reichel s...@kernel.org [140328 17:36]:
Please send feedback (e.g. Tested-By or Reviewed-By :)), so that I can
send a pull request for 3.16. You can either apply this patchset or
use the n900-modem-support branch available on [1].
Sebastian, can you please do a separate pull
* Sebastian Reichel s...@kernel.org [140425 16:56]:
Add common DT binding documentation for touchscreen devices and
implement input_parse_touchscreen_of_params, which parses the common
properties and configures the input device accordingly.
The method currently does not interpret the axis
* Mark Brown broo...@kernel.org [140501 11:41]:
On Mon, Apr 28, 2014 at 04:07:27PM +0200, Sebastian Reichel wrote:
This patch adds support for the Nokia N900's sound
system.
Reviewed-by: Mark Brown broo...@linaro.org
Applying the last patch into omap-for-v3.16/dt branch thanks.
Tony
--
On Mon, May 05, 2014 at 12:41:26PM -0700, Tony Lindgren wrote:
* Sebastian Reichel s...@kernel.org [140425 16:56]:
Add common DT binding documentation for touchscreen devices and
implement input_parse_touchscreen_of_params, which parses the common
properties and configures the input device
* Sakari Ailus sakari.ai...@iki.fi [140503 17:20]:
The N950/N9 uses two additional regulators from the twl 4030 for CSI-2
receiver (vaux2) and cameras (vaux3).
Signed-off-by: Sakari Ailus sakari.ai...@iki.fi
Thanks applying into omap-for-v3.16/dt.
Tony
---
* Nathan Lynch nathan_ly...@mentor.com [140319 08:50]:
Expose the PMU on OMAP5.
Tested with perf on OMAP5 uEVM.
Signed-off-by: Nathan Lynch nathan_ly...@mentor.com
Applying into omap-for-v3.16/dt thanks.
Tony
---
Changes since v1:
- Use symbolic constants.
The VTT regulator for DDR3 termination on the am437x-gp-evm is
controlled by a gpio. It is configured by the bootloader so here we
define an always-on, fixed voltage regulator to hold the gpio.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 11 +++
The am335x-evmsk and am437x-gp-evm both have a gpio controlled regulator
for DDR3 VTT voltage. This is configured by boot loader and previously
just left at that but it is better to define a fixed regulator to control
the gpio so that the kernel is aware of it.
Previous discussion here [1].
The VTT regulator for DDR3 termination on the am335x-evmsk is
controlled by a gpio. It is configured by the bootloader so here we
define an always-on, fixed voltage regulator to hold the gpio.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
---
arch/arm/boot/dts/am335x-evmsk.dts | 11 +++
1
Hi Tony,
Please pull the following to the dts support of AM437x and DRA7
support for l3_noc for the upcoming 3.16 window. This series was posted
http://marc.info/?l=linux-omapm=139750288003978w=2 and the
functionality enabled by the first pull request for driver.
The following
All
I have made some big changes to this patchset so I did not put all the
changes in the patches themselves.
In brief
- I removed the object data files for each SoC and moved the data into
the DT. I updated the binding document as well
- The DT implementation creates a parent reset node with
Add the prcm_resets node to the prcm parent node.
Add the am33xx_resets file to define the
am33xx reset lines that are handled by this reset
framework.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/am33xx-resets.dtsi | 42 ++
Add the prcm_resets node to the prcm parent node.
Add the am34xx_resets file to define the
am34xx reset lines that are handled by this reset
framework.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/am4372.dtsi|7 +
arch/arm/boot/dts/am43xx-resets.dtsi | 52
The TI SoC reset controller support utilizes the
reset controller framework to give device drivers or
function drivers a common set of APIs to call to reset
a module.
The reset-ti is a common interface to the reset framework.
The register data is retrieved during initialization
of the reset
Add the prcm_resets node to the prm parent node.
Add the draxx_resets file to define the
dra7xx reset lines that are handled by this reset
framework.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |7 +++
arch/arm/boot/dts/dra7xx-resets.dtsi | 82
Hi Tony,
Please pull the following driver fixes based on V3 of l3noc fixes and
support for DRA7 and AM437x for upcoming 3.16 window.
http://marc.info/?l=linux-omapm=139869922030493w=2
This is part 1 of the pull request containing purely the driver
updates.
The following changes
Describe the TI reset DT entries for TI SoC's.
Signed-off-by: Dan Murphy dmur...@ti.com
---
.../devicetree/bindings/reset/ti,reset.txt | 103
1 file changed, 103 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/ti,reset.txt
diff --git
Add the prm_resets node to the prm parent node.
Add the omap54xx_resets file to define the
omap5 reset lines that are handled by this reset
framework.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |7
arch/arm/boot/dts/omap54xx-resets.dtsi | 66
* Dmitry Torokhov dmitry.torok...@gmail.com [140505 12:52]:
On Mon, May 05, 2014 at 12:41:26PM -0700, Tony Lindgren wrote:
* Sebastian Reichel s...@kernel.org [140425 16:56]:
Add common DT binding documentation for touchscreen devices and
implement input_parse_touchscreen_of_params, which
On Wed, Apr 30, 2014 at 7:34 PM, Suman Anna s-a...@ti.com wrote:
The HwSpinlock core requires a base id for registering a bank
of hwspinlocks. This base id needs to be unique across multiple
IP instances of a hwspinlock device, so that each hwlock can be
represented uniquely in a system.
On Mon, May 05, 2014 at 10:37:57AM +0200, Johan Hovold wrote:
On Sun, May 04, 2014 at 11:38:41AM -0400, Greg Kroah-Hartman wrote:
3.14-stable review patch. If anyone has any objections, please let me know.
This one should not be backported without commit
a2f8d6b30321 (ARM: dts:
Hi,
On Mon, May 05, 2014 at 03:09:22PM -0500, Dan Murphy wrote:
The TI SoC reset controller support utilizes the
reset controller framework to give device drivers or
function drivers a common set of APIs to call to reset
a module.
The reset-ti is a common interface to the reset framework.
Hi Rob,
On 05/05/2014 03:37 PM, Rob Herring wrote:
On Wed, Apr 30, 2014 at 7:34 PM, Suman Anna s-a...@ti.com wrote:
The HwSpinlock core requires a base id for registering a bank
of hwspinlocks. This base id needs to be unique across multiple
IP instances of a hwspinlock device, so that each
Hi Rob,
On 04/30/2014 07:34 PM, Suman Anna wrote:
The property 'hwlock-reserved-locks' will be used to represent
the number of locks to be reserved for clients that would need
to request/operate on specific locks. A new OF helper function,
of_hwspin_lock_get_num_reserved_locks(), is added to
On Mon, May 05, 2014 at 04:44:25PM -0500, Suman Anna wrote:
Hi Rob,
On 04/30/2014 07:34 PM, Suman Anna wrote:
The property 'hwlock-reserved-locks' will be used to represent
the number of locks to be reserved for clients that would need
to request/operate on specific locks. A new OF
* Dan Murphy dmur...@ti.com [140505 13:10]:
+
+Required parent properties:
+- compatible : Should be one of,
+ ti,omap4-prm for OMAP4 PRM instances
+ ti,omap5-prm for OMAP5 PRM instances
+ ti,dra7-prm for DRA7xx PRM instances
+ ti,am4-prcm for
* Dmitry Lifshitz lifsh...@compulab.co.il [140428 04:43]:
Add support for CompuLab CM-T54 CoM and SBC-T54 board:
http://compulab.co.il/products/computer-on-modules/cm-t54/
http://compulab.co.il/products/sbcs/sbc-t54/
SBC-T54 is a single board computer based on OMAP5432 CPU.
On Mon, May 05, 2014 at 12:31:30PM -0700, Tony Lindgren wrote:
* Sebastian Reichel s...@kernel.org [140328 17:36]:
Please send feedback (e.g. Tested-By or Reviewed-By :)), so that I can
send a pull request for 3.16. You can either apply this patchset or
use the n900-modem-support branch
On Mon, May 05, 2014 at 12:51:39PM -0700, Dmitry Torokhov wrote:
On Mon, May 05, 2014 at 12:41:26PM -0700, Tony Lindgren wrote:
* Sebastian Reichel s...@kernel.org [140425 16:56]:
Add common DT binding documentation for touchscreen devices and
implement input_parse_touchscreen_of_params,
Hi,
Sorry for dropping the ball on this one, got distracted with various
other fixes for a while.
* Joachim Eastwood manab...@gmail.com [140421 09:16]:
On 21 April 2014 18:12, Joachim Eastwood manab...@gmail.com wrote:
On 21 April 2014 17:35, Tony Lindgren t...@atomide.com wrote:
* Joachim
* Joachim Eastwood manab...@gmail.com [140501 12:08]:
Hello,
This patch set adds support for Variscite OM44 series of system on modules
and boards.
There weren't many comments on v1 of this patch set so I hope this can make
it into 3.16.
Changes since v2:
* Use OMAP IOPAD macros
* Joel Fernandes jo...@ti.com [140429 19:54]:
Here's a redo of the patch [1] that effectively does the same
thing but is the right way to do things by using ENDPROC instead.
The firmware correctly switches to THUMB before entry.
The patch applies ontop of the earlier patch [1].
[1]
* Oussama Ghorbel ghor...@pivasoftware.com [140414 09:50]:
The variable use_gptimer_clksrc is only used by two __init functions,
So we can freely free it after boot.
Signed-off-by: Oussama Ghorbel ghor...@pivasoftware.com
Thanks applying into omap-for-v3.16/fixes-not-urgent.
Tony
---
* Johan Hovold jhov...@gmail.com [140425 06:37]:
Remove use of property ti,vcc-aux-disable-is-sleep, which does not
exist.
Signed-off-by: Johan Hovold jhov...@gmail.com
Thanks applying into omap-for-v3.16/fixes-not-urgent.
Tony
---
arch/arm/boot/dts/am335x-boneblack.dts | 1 -
1 file
* Sricharan R r.sricha...@ti.com [140505 07:20]:
These are fixes for the crossbar to handle two interrupts getting
mapped twice to same crossbar and to skip some interrupts being used
due to hardware bugs.
Nishanth Menon (5):
irqchip: crossbar: dont use '0' to mark reserved interrupts
Hi,
On Monday 21 April 2014 08:40 PM, Tony Lindgren wrote:
* Archit Taneja arc...@ti.com [140420 22:16]:
Hi,
On Friday 18 April 2014 10:48 PM, Tony Lindgren wrote:
* Archit Taneja arc...@ti.com [140416 06:20]:
Add DT node for the ctrl-core sub module of the DRA7 control module. We map the
On Tuesday 29 April 2014 04:35 PM, Rajendra Nayak wrote:
changes in v4:
-1- used full SoC names in compatibles eg ti,dra742 and ti,dra722
-2- Created a seperate patch for replacing __initdata with __initconst
changes in v3:
Removed wildcards from compatible strings and duplicates from
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