On Thu, 13 Mar 2008, Roman Tereshonkov wrote:
> These changes is the result of the discussion with Paul Walmsley.
> His ideas are included into this patch.
>
> Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks,
> and place it into speci
On Wed, 26 Mar 2008, Jouni Högander wrote:
> Wrong shift values were used for gpio2-6 fclks (gpt2-6 shift).
> ---
> arch/arm/mach-omap2/clock34xx.h | 10 +-
> 1 files changed, 5 insertions(+), 5 deletions(-)
Acked-by: Paul Walmsley <[EMAIL PROTECTED]>
thanks Jouni,
- Paul
n in Rome, do as the Romans.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c | 18 +++---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock24xx.c |5 +++--
arch/arm/mach-omap2/clock34xx.c |4 ++--
4 files cha
e the platform-specific prefix from
its name.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.h |2 -
arch/arm/mach-omap2/cm-regbits-34xx.h | 22 +++--
arch/arm/mach-omap2/cm.h | 55 --
arch/arm
On Tue, 1 Apr 2008, Hiroshi DOYU wrote:
> Signed-off-by: Hiroshi DOYU <[EMAIL PROTECTED]>
> ---
> arch/arm/mach-omap2/clock34xx.h |5 +++--
> arch/arm/mach-omap2/cm-regbits-34xx.h |1 +
> 2 files changed, 4 insertions(+), 2 deletions(-)
Thanks Hiroshi,
Ac
Hello,
The following two patches add several new PRM/CM manipulation functions
and convert existing code to use them when appropriate.
At the moment, there are not very many users, but the (as yet unpublished)
PM patches make more extensive use of these.
Boot-tested on N800.
- Paul
size:
i Högander <[EMAIL PROTECTED]> for catching some
embarrassing errors in earlier versions of this code.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/cm.h | 34 +-
arch/arm/mach-omap2/prm.h | 37 +++
slightly while we
are here.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c |8 +++-
arch/arm/mach-omap2/clock24xx.c | 15 ---
arch/arm/mach-omap2/pm.c | 19 +--
arch/arm/mach-omap2/prcm.c
Hello,
this patch series adds DPLL autoidle control for OMAP3. It then adds
OMAP3 DPLL enable and disable support via clock framework clk_enable()
and clk_disable(). It also updates the clock34xx.h comments to credit
frequent contributors.
I personally have verified that DPLL disable has been v
Ensure that people who have contributed several bug fixes to the
34xx clock framework are appropriately credited.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.h | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
Index: linux-oma
.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two. This code currently does not support the third option,
low-power bypass autoidle.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.c
rate, the DPLL will go to bypass.
Otherwise, the DPLL will attempt to lock. "Disabling" means going
from bypass or lock to off.
Jouni Högander contributed a fix for _omap3_noncore_dpll_lock().to
bypass the DPLL state test when the DPLL is in autoidle mode.
Signed-off-by: P
Hello,
the following two patches add:
- a new DPLL rate rounding algorithm for OMAP2/3, and
- non-CORE DPLL rate programming for OMAP3 (e.g., DPLLs 1, 2, 4, 5)
The rate rounding code is not yet integrated into the OMAP2 DPLL - this
will come in future patches - but it is integrated on OMAP3.
e DPLL's output multiplier.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c | 198 +-
arch/arm/mach-omap2/clock.h |5
arch/arm/mach-omap2/clock24xx.c | 12 +-
arch/arm/mach-omap2/clock24x
in practice. However, the lack of this
freqsel case does not appear to impair the DPLL rate change.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.c | 139 ++
arch/arm/mach-omap2/clock34xx.h | 11 +++
includ
Hello,
this patch series adds a hardware control and monitoring interface for
OMAP2/3 powerdomains. The interface is fully documented in the code.
The series also adds a common OMAP chip type detection bitfield for use
with powerdomain and clockdomain structures; it is planned to expand its
ended from its current u8 storage
size without generating a lot of patch noise.
Also, clean up id.c by splitting some code out of
omap_check_revision() into its own function, _set_system_rev(); and
converting some debug printk()s into pr_debug().
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Add powerdomains common to both OMAP2 and OMAP3 (WKUP and GFX/SGX), and
modify mach-omap2/io.c to initialize the powerdomain code on boot.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/io.c |4 -
arch/arm/mach-omap2/pm.c |2
arch/ar
messages via pr_debug().
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/Makefile|2
arch/arm/mach-omap2/io.c|3
arch/arm/mach-omap2/powerdomain.c | 884
arch/arm/plat-omap/K
Add OMAP2-specific powerdomains.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/powerdomains.h | 16 ++-
arch/arm/mach-omap2/powerdomains24xx.h | 176 +
arch/arm/mach-omap2/prm-regbits-24xx.h | 12 +-
3 files change
inux-omap/arch/arm/mach-omap2/powerdomains34xx.h 2008-04-10
08:41:54.0 -0600
@@ -0,0 +1,296 @@
+/*
+ * OMAP34XX powerdomain definitions
+ *
+ * Copyright (C) 2007-8 Texas Instruments, Inc.
+ * Copyright (C) 2007-8 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ * Debugging and integration fix
Hello,
this patch series adds a hardware control interface for OMAP2/3
clockdomains. Also added is clockdomain usecounting of underlying
clocks, so hardware-supervised and software-supervised clockdomain
transitions can occur correctly. The interface is fully documented in
the code.
24xx clocks
Thie patch adds code to the powerdomain layer to track the
clockdomains associated with each powerdomain.
It also modifies the clockdomain code to register clockdomains
with their corresponding powerdomain when the clockdomain is registered.
Signed-off-by: Paul Walmsley <[EMAIL PROTEC
The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_CLOCKDOMAIN, which
when enabled will emit verbose debug messages via pr_debug().
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/Makefile|3
arch/arm/mach-omap2/clockdomain.c
Add clockdomain definitions for OMAP24xx and OMAP34xx chips.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clockdomains.h| 283 ++
arch/arm/mach-omap2/cm-regbits-24xx.h | 24 +-
arch/arm/mach-omap2/cm-regbits-34xx.h
usecounting to call into the clockdomain code
when clocks are enabled or disabled.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c | 45 +++-
arch/arm/mach-omap2/clock.h |1
arch/arm/mach-omap2/clock34xx.c |4
arch/arm/mach-omap2/clock
y, I don't know much about MUSB. David or Felipe, maybe you could
take a quick look at this patch?
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
include/asm-arm/arch-omap/hdrc_cnf.h |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Index: linux-omap/incl
On Tue, 15 Apr 2008, Francisco Alecrim wrote:
> Hi Balbi,
>
>I was with the patch below in my queue when you told about your email at
> linux-omap.
>
> I guess that is the correct solution.
>
> What do you think?
Eh, those clocks are identical to the existing MMC clocks.
Seems better fo
Hello Hiroshi,
On Thu, 17 Apr 2008, Hiroshi DOYU wrote:
> debugfs can provide the infrastructure to trace the dependencies of
> clock tree hierarchy quite visibly. This patch enables to keep track
> of clock tree hierarchy and expose their attributes under each clock
> directry as below:
As a re
Hi Tony,
these changes all look good, I will repost.
Thanks for the comments,
- Paul
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Hello David,
On Thu, 17 Apr 2008, David Brownell wrote:
> On Thursday 17 April 2008, Paul Walmsley wrote:
> > But it would be nice to be able to call into clock functions like
> > round_rate, set_rate, and set_parent via filesystem writes for debugging
> > purposes, a
Hello David,
On Thu, 17 Apr 2008, David Brownell wrote:
> struct dentry *debugfs_create_file(const char *name, mode_t mode,
>struct dentry *parent, void *data,
>const struct file_operations *fops);
>
> ... provide a file_ope
Hello Hiroshi, David,
On Thu, 17 Apr 2008, David Brownell wrote:
> On Thursday 17 April 2008, Hiroshi DOYU wrote:
>
> > And if there will be a little possibility that sysfs attribute can be
> > used by userland in the future, keeping sysfs instead of debugfs
> > doesn't seem not so illegal, does
Hello Igor,
On Thu, 17 Apr 2008, Igor Stoppa wrote:
> On Thu, 2008-04-17 at 13:44 -0600, ext Paul Walmsley wrote:
>
> > True, but if we can do a debugfs implementation first, then that seems
> > like a good way to start, no? Userspace PM implementations are probably
>
On Fri, 18 Apr 2008, Högander Jouni wrote:
> Omap chip is not set correctly in case of omap3 es2.x. You should
> change your code something like this:
Thanks Jouni, that fix is in the latest version which will be posted later
today.
- Paul
2693 35c085 vmlinux.3430sdp
Paul Walmsley (5):
Subject: add OMAP3 powerdomains
Subject: add OMAP2 powerdomains
Subject: add OMAP2/3 common powerdomains
Subject: add base OMAP2/3 powerdomain code
Subject: add OMAP chip type global bitfield; clean up mach-omap2/id.c
arch
printk()s into pr_debug().
Second revision.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/id.c| 167 ---
include/asm-arm/arch-omap/cpu.h | 33 +++-
2 files changed, 150 insertions(+), 50 deletions(-)
diff --git
messages via pr_debug().
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/Makefile|2
arch/arm/mach-omap2/powerdomain.c | 885 +++
arch/arm/plat-omap/Kconfig | 12
include/asm-arm/arch-omap/powerdo
Add powerdomains common to both OMAP2 and OMAP3 (WKUP and GFX/SGX).
Modify mach-omap2/io.c to initialize the powerdomain code on boot.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/io.c |5 +
arch/arm/mach-omap2/pm.c |2
arch/ar
Add OMAP3-specific powerdomains.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/powerdomains.h | 30 +++
arch/arm/mach-omap2/powerdomains34xx.h | 327
arch/arm/mach-omap2/prcm-common.h |3
arch/arm/mach-oma
Add OMAP2-specific powerdomains.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/powerdomains.h | 14 ++
arch/arm/mach-omap2/powerdomains24xx.h | 200
arch/arm/mach-omap2/prm-regbits-24xx.h | 12 +-
3 files change
size:
textdata bss dec hex filename
3269405 152552 100736 3522693 35c085 vmlinux.3430sdp.orig
3272093 154920 100736 3527749 35d445 vmlinux.3430sdp
Paul Walmsley (4):
Subject: Integrate OMAP3 clocks with clockdomain code
Subject: encode OMAP2/3 clockdomains
Sub
code.
The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_CLOCKDOMAIN, which
when enabled will emit verbose debug messages via pr_debug().
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/Makefile|3
arch/arm/mach-omap2/clockdomain.c
Thie patch adds code to the powerdomain layer to track the
clockdomains associated with each powerdomain.
It also modifies the clockdomain code to register clockdomains
with their corresponding powerdomain when the clockdomain is registered.
Signed-off-by: Paul Walmsley <[EMAIL PROTEC
Add clockdomain definitions for OMAP24xx and OMAP34xx chips.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clockdomains.h| 298 +
arch/arm/mach-omap2/cm-regbits-24xx.h | 24 ++-
arch/arm/mach-omap2/cm-regbits-34xx.h
call into the clockdomain code
when clocks are enabled or disabled.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c | 45
arch/arm/mach-omap2/clock.h |1
arch/arm/mach-omap2/clock34xx.c |4 +
arch/arm/mach-omap2/clock
M_CLKSRC_CTRL correctly in
> omap2_enable_osc_ck
>
> This patch fixes an incorrect use of prm_rmw_reg_bits() in
> omap2_enable_osc_ck() which is changing bits in PRCM_CLKSRC_CTRL
> that are unrelated to the function it is performing.
>
> Signed-off-by: Seth Forshee <[EMAI
gt; Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]>
Acked-by: Paul Walmsley <[EMAIL PROTECTED]>
- Paul
by: Jouni Hogander <[EMAIL PROTECTED]>
Acked-by: Paul Walmsley <[EMAIL PROTECTED]>
although it's less of a race issue, than it is a convenience issue for
OMAP2/3 device driver folks...
- Paul
Nayak, Sakari Poussa,
Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, and
Richard Woodruff.
Comments welcomed,
- Paul
Existing PM interfaces are currently not ideal for OMAP
---
There are currently two PM interfaces
fined, below)
+ *
+ * Copyright (C) 2008 Texas Instruments, Inc.
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Interface developed by (in alphabetical order):
+ * Karthik Dasu, Amish Lakhani, Tony Lindgren, Rajendra Nayak, Sakari
+ * Poussa, Veeramanikandan Raju, Igor Stoppa, Paul Walmsley, Rich
Hello Kevin,
Thanks, as always, for your comments.
On Tue, 29 Apr 2008, Kevin Hilman wrote:
> I've only given a quick glance so far at the actual patch, but my
> first comments are regarding the dismissal of the PM QoS framework.
>
> I totally agree that the QoS framework in its current form ha
omap_serial_init() in arch/arm/mach-omap2/serial.c clears the wrong
variable if it can't clk_get() a fclk - fix this. Also fix some
checkpatch.pl warnings.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/serial.c | 12 ++--
1 files changed, 6
It's springtime in the Northern Hemisphere; time for plants to flower,
students to graduate, or not, and Linux hackers to generate cleanup
patches against the source tree...
These patches fix all of the sparse warnings against the
arch/arm/mach-omap2 directory, and fix some of the checkpatch.pl
wa
of unlikely() and likely() - none of this code is particularly
fast-path code, so the performance impact seems slim; and some of those
likely() and unlikely() indicators are probably not as accurate as the
ARM's branch predictor
- removing some superfluous casts
Signed-off-by: Pa
linux/ includes.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/gpmc.c | 42 +-
arch/arm/mach-omap2/io.c | 12 +-
arch/arm/mach-omap2/memory.h |7 ++
arch/arm/mach-omap2/sdrc.h
: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/irq.c | 58 -
1 files changed, 36 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 8237529..ac062ee 100644
--- a/arch/arm/mach-omap2
Fix sparse warnings with the OMAP2 SCM code. Involves tagging
appropriate pointer<->integer type conversions with __force. Also fix
a checkpatch warning re: conversion of asm/ includes to linux/.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/control.c
Fix remaining sparse warnings in arch/arm/mach-omap2/. These fixes
mostly consist of:
- tagging appropriate integer<->pointer casts with __force
- marking private structures and functions as static; adding function
prototypes in .h files for public functions
- assigning NULL to pointers, not
Convert pwrdm_mutex to pwrdm_rwsem to avoid trying to relock mutex in the
event that the pwrdm_for_each() callback function calls something that
triggers a pwrdm_lookup(). Problem found by Jouni Högander
<[EMAIL PROTECTED]>
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
--
Jouni Högander
<[EMAIL PROTECTED]>
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/powerdomain.c | 61 -
1 files changed, 33 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-om
Two minor OMAP3 clock framework fixes. This series:
- puts the sys_clkout2 struct clk into the core_clkdm where it belongs
- removes the omap2_noncore_dpll_set_rate() function pointer from the
DPLL3 struct clk (since DPLL3 is the CORE DPLL)
- Paul
---
arch/arm/mach-omap2/clock34xx.h |
sys_clkout2 belongs in the core_clkdm (3430 TRM section 4.7.2.2).
It's not clear whether it actually is in the CORE clockdomain, or whether
it is technically in a different clockdomain; but this is closer to
reality than the present configuration.
Signed-off-by: Paul Walmsley <[EMAIL P
DPLL3 is the CORE DPLL and cannot use the non-CORE set_rate function since
SDRC is downstream.
Signed-off-by: Paul Walmslsy <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.h |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/
Hello everyone,
occasionally the TWL4030 driver on the 3430SDP freaks out on boot. (This
is either an ES2.0 or ES2.1, not sure.) Here's a partial console log with
initcall debugging enabled. This probably happens every thirty or forty
boots, I would guess. The board does boot to userspace
On Thu, 8 May 2008, Tony Lindgren wrote:
> This also looks similar to the earlier twl4030 hangs where access
> to some domains caused twl4030 to hang. If twl4030 hangs, there's
> no way to reset it as all control is over I2C. When twl4030 hangs,
> bootloader won't be able to detect the chip either
Hello Dirk,
On Sat, 10 May 2008, Dirk Behme wrote:
> -- cut --
> > git bisect bad
> 757f0b4ad6b0fd4377c2ee512fc595b5778aa3ac is first bad commit
> commit 757f0b4ad6b0fd4377c2ee512fc595b5778aa3ac
> Author: Paul Walmsley <[EMAIL PROTECTED]>
> Date: Fr
On Tue, 13 May 2008, Dirk Behme wrote:
> If you like, I can recheck again. But would be better if anybody else could
> confirm this, just in case I missed anything. Hint, hint ;)
I would love to help, but, no Beagle here :-(
> In a private mail I got:
>
> -- cut --
> To add another data point:
instead.
I'm also curious to know if this fixes the BeagleBoard boot problem.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/powerdomain.c | 46 ++---
1 files changed, 27 insertions(+), 19 deletions(-)
diff --git a/arch/arm
omap3_noncore_dpll_enable() calls clk_get_rate(), which causes an attempt
to re-enter the clockfw_lock spinlock. Fix by calling
omap2_get_dpll_rate() instead.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.c |2 +-
1 files changed, 1 insertions
Simplify the IRQ register/IRQ register bit calculations in
mach-omap2/irq.c.
Test-booted on 3430SDP.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
size:
textdata bss dec hex filename
3341347 170992 109008 3621347 3741e3 vmlinux.3430sdp
3341315 170992
Hi Peter,
a few quick comments.
On Mon, 19 May 2008, Peter 'p2' De Schrijver wrote:
> +#define SCM_CONTROL_TEMP_SENSOR (OMAP343X_SCM_BASE + 0x524)
Consider moving this to include/asm-arm/arch-omap/control.h ?
> +#define CM_FCLKEN3_CORE (OMAP3430_CM_BASE + 0x200 + 0x8)
The above define do
Hello Kyungmin,
On Wed, 21 May 2008, Kyungmin Park wrote:
> On Wed, May 21, 2008 at 3:21 AM, Paul Walmsley <[EMAIL PROTECTED]> wrote:
> >
> > static void omap_mask_irq(unsigned int irq)
> > {
> > - int offset = (irq >> 5) << 5;
> >
annotating the clock framework.
Tested on an N800 with the serial console enabled, and power
consumption matches current l-o git HEAD during screen on, dim, and off;
and DSP still works.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
--
size:
textdata bss dec hex fi
Add a function pwrdm_get_mem_bank_count() to the powerdomain code to
return the number of memory banks contained inside an OMAP
powerdomain. This will be used by the PM code to configure the memory
bank retention state.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach
This patch adds a missing OMAP24xx clock, the SSI L4 interface clock,
as "ssi_l4_ick".
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock24xx.h | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-oma
Associate each OMAP24xx clock in arch/arm/mach-omap2/clock24xx.h
with a clockdomain.
Also move the L4 clock up higher in the file in preparation to
define the SSI L4 iclk.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock24xx.h
Add clkdm_get_pwrdm() to the clockdomain code. It will return a
pointer to the powerdomain struct that the clockdomain is contained
within. Used by the PM code.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clockdomain.c | 16
inclu
The recent powerdomain and clockdomain layer updates for OMAP24XX should
now control the DSP powerdomain and clockdomain automatically when
DSP Gateway calls clk_{enable,disable}(). Remove the manual
clockdomain/powerdomain register tweaks from DSP Gateway.
Signed-off-by: Paul Walmsley <[EM
happening on the chip.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm24xx.c | 106 +-
1 files changed, 72 insertions(+), 34 deletions(-)
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 787a95e..5
Great - thanks everyone for the review,
- Paul
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Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and IRQ
number-to-register bit calculations.
Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Acked-by: Paul Mundt <[EMAIL PROTECTED]>
size:
textda
Hi Tony,
On Wed, 21 May 2008, Tony Lindgren wrote:
> * Paul Walmsley <[EMAIL PROTECTED]> [080520 18:20]:
> >
> > Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and IRQ
> > number-to-register bit calculations.
>
> How about patching Jouni&
end the loop. This causes the iterator to fall
off the end of the array when the powerdomain contains the maximum number
of clockdomains per powerdomain (currently 3).
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm34xx.c | 23 ++-
1
t; of TI for providing more detail on this issue;
and to Jouni Högander <[EMAIL PROTECTED]> for proposing this
fix.
This patch obsoletes the D2D clockdomain workaround in pm34xx.c in
Jouni's recent patch set.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mac
Hello,
This patch series adds D2D (die-to-die) clockdomain handling into
OMAP3 ES2+ builds. It seems the D2D clockdomain logic is still
present on the chip and must be manually programmed to allow the
CORE_D2D clockdomain to go inactive.
For this to work, the pm34xx.c code also had to be modifie
Hi Kevin,
On Tue, 20 May 2008, Kevin Hilman wrote:
> The locking in the get_rate() hook is unnecessary, and causes problems
> when used with the -rt patch, since it may be called recursively.
>
> Signed-off-by: Kevin Hilman <[EMAIL PROTECTED]>
Acked-by: Paul Walmsley <[E
Hello,
On Thu, 5 Jun 2008, Igor Stoppa wrote:
> - if a dvfs change is responsible of changing the rate supplied to a
> driver which asked it with clk_get_rate(), the dvfs transition has no
> reason to happen in case it would violate the constraints set by clock
> users.
There aren't any such con
On Mon, 9 Jun 2008, Jouni Hogander wrote:
> omap2_clk_wait_ready was wrongly modified to check
> registers contents. This fix changes it back to check
> addresses.
>
> Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]>
Acked-by: Paul Walmsley <[EMAIL PROTECTED]>
-
Hello Tero,
A few minor comments based on a quick look.
In terms of the OMAP3 code, is that for retention-idle only, or does it
work with off-idle also?
On Tue, 10 Jun 2008, Tero Kristo wrote:
> +const u32 omap2_uart_wk_bit[OMAP_MAX_NR_PORTS] = {
> + OMAP24XX_ST_UART1, OMAP24XX_ST_UART
Hi Tero,
Let me begin by saying that I don't care too much about the 32-bit SCM
register read change; I just happen to think that it is easier to read.
That said, one comment of yours bears some additional discussion:
On Thu, 12 Jun 2008, [EMAIL PROTECTED] wrote:
> Also, the spec says that th
intended to be temporary, to survive only until the
Linux PM QoS layer supports these features.
This interface is a collaborative product of many people from Nokia
and TI: Karthik Dasu, Jouni Högander, Tony Lindgren, Rajendra Nayak,
Sakari Poussa, Veeramanikandan Raju, Anand Sawant, Igor Stoppa,
Add a default OMAP PM no-op layer, defining the interface between
device drivers, CPUFreq, and DSP Bridge on one side; and hardware-specific
APIs on the other (e.g., powerdomain API, clock framework, etc).
Copious documentation is in the omap-pm-noop.c file itself.
Signed-off-by: Paul Walmsley
Hello Russell,
On Sat, 14 Jun 2008, Russell King - ARM Linux wrote:
> On Fri, Jun 06, 2008 at 06:30:53PM -0700, Tony Lindgren wrote:
> > omap_chip is set in mach-omap2/id.c by _set_omap_chip(). Other
> > code should use the omap_chip_is() function to test against omap_chip.
>
> > +/**
> > + * o
Hello Jouni,
On Wed, 18 Jun 2008, Högander Jouni wrote:
> "ext Paul Walmsley" <[EMAIL PROTECTED]> writes:
>
> > Major changes since the first version:
> >
> > 1. Jouni Hogander suggested that the set_max_cpu_lat() function be
> >
This series adds a clock rate change notifier to the OMAP clock
framework. Currently only post-rate-change notification is
implemented, although pre-rate-change notification is in the works.
Clock post-rate-change notifiers are intended for drivers that need to
be notified when other code (such
ock rate is identical to the old rate. This is because
the process of changing the rate may have temporarily disabled or
glitched the clock or one of its parents, and some devices may be
sensitive to such changes.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap
necessary.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/plat-omap/clock.c | 118 +++-
1 files changed, 115 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 421d076..354f45f 100644
ort on non-linefetch (0x1028)
This patch modifies omap2_clk_wait_ready() to wait for the DSS to become
accessible after dss1_alwon_fclk is enabled.
Thanks to Anand Gadiyar <[EMAIL PROTECTED]> for identifying one of the
problem patches.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
of the previous version,
. Igor Stoppa <[EMAIL PROTECTED]> and Richard Woodruff
<[EMAIL PROTECTED]> for help with the SSI portion of the patch.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c | 63 +
arc
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