-by: Tero Kristo t-kri...@ti.com
---
drivers/regulator/twl-regulator.c | 49 +++-
1 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/regulator/twl-regulator.c
b/drivers/regulator/twl-regulator.c
index ee8747f..97fe2f2 100644
--- a/drivers
On Fri, 2011-11-25 at 16:55 +, Mark Brown wrote:
On Fri, Nov 25, 2011 at 06:29:20PM +0200, Tero Kristo wrote:
+ struct twlreg_info *info = rdev_get_drvdata(rdev);
+ int vsel = DIV_ROUND_UP(min_uV - 60, 12500);
+
+ pr_info(attempting to write: %02x\n, vsel);
There's lots
On Fri, 2011-11-25 at 16:52 +, Mark Brown wrote:
On Fri, Nov 25, 2011 at 06:29:17PM +0200, Tero Kristo wrote:
Why is this only on the OMAP list? Always CC the relevant discussion
list for the subsystem, especially when proposing changes to the
subsystem!
Regulator users can now set
On Fri, 2011-11-25 at 17:29 +, Mark Brown wrote:
On Fri, Nov 25, 2011 at 07:20:32PM +0200, Tero Kristo wrote:
On Fri, 2011-11-25 at 16:52 +, Mark Brown wrote:
My basic reaction to this is eew, ick. Doing this with a runtime call
just feels badly joined up, and there's nothing
On Wed, 2012-07-04 at 18:14 +0200, Benoit Cousson wrote:
Hi Kevin,
On 07/04/2012 04:27 PM, Kevin Hilman wrote:
[...]
Tested-by: Kevin Hilman khil...@ti.com
I confirm this version is now allowing CORE to hit retention during
suspend.
Benoit, I hope this is OK with you. We
On Fri, 2012-07-06 at 01:53 -0700, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [120628 03:54]:
OMAP2 does not use the external voltage controller code for TWL, and
thus OMAP2 only compilation generates following warnings:
Hmm well omap2420 does not have twl, but 2430 usually has. So
On Thu, 2012-07-12 at 10:57 +0530, Rajendra Nayak wrote:
On Thursday 12 July 2012 05:28 AM, Omar Ramirez Luna wrote:
I suspect this might be specific to 4460 as Rajendra reported it was
working for him on 4430 but not on 4460, I haven't tried 4430 but let
me see if I can find one.
Yes,
On Thu, 2012-07-12 at 14:43 +0530, Rajendra Nayak wrote:
Hi Tero,
On Thursday 31 May 2012 06:58 PM, Tero Kristo wrote:
dpll3, dpll4 and sdrc_ick are controlled automatically by hardware.
sdrc_ick does not seem to have a software control to enable/disable
this automatic control
On Thu, 2012-07-12 at 15:11 +0530, Rajendra Nayak wrote:
On Thursday 31 May 2012 06:59 PM, Tero Kristo wrote:
Previously, PER clock domain was always enabled, as the usecounts
for this domain incorrectly always showed positive value. On HW
level though, the domain enters idle as it is set
This works similarly to e.g. pwrdm_for_each(). Needed by enhanced
usecounting debug functionality that will be added to pm-debug.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/clock.c | 33
These are updated based on powerdomain usecounts. Also added support
for voltdm-sleep and voltdm-wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero Kristo t
and autoidle flag for clocks that
are hardware controlled and should be skipped in usecount
calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clkt_iclk.c | 21 +++
arch/arm/mach-omap2
, and will allow vc
callbacks to be triggered at right point of time.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |3 ++
arch/arm/mach-omap2/pm44xx.c |3 ++
arch/arm/mach-omap2/powerdomain.c
Some clockdomains bug out if their autodeps are deleted before idle.
This happens namely with OMAP3 PER domain, it will bug out if it
doesn't have wakedeps enabled when it enters off-mode. This patch
adds support for new flag 'CLKDM_NO_AUTODEP_DISABLE' which does this.
Signed-off-by: Tero Kristo
Hi,
Changes compared to previous version:
- added kerneldoc comments to new API functions
- added autoidle flagging support for omap3 dplls
- modified the clkdm code tweak required to fix omap3 per domain problems
* moved implementation to _clkdm_del_autodeps
* renamed the
-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index
from kernel code,
by calling the pm_dbg_dump_X functions. The plan is to call these
functions once an error condition is detected, e.g. failed suspend.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm-debug.c
-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomains3xxx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c
b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 6038adb..5658440 100644
--- a/arch/arm/mach
for example once
IVA2 hwmod reset sequence is implemented properly within hwmod
preprogram hook, as the IVA2 clock must be enabled during this.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git
SAD2D stands for the die to die interface, and is used for communicating
with the optional stacked modem. This hwmod is added in preparation for
the d2d_idle move from pm34xx.c to hwmod data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm-regbits-34xx.h |2 +
arch
-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |2 +
arch/arm/mach-omap2/pm34xx.c | 26
include/linux/platform_data/omap3-d2d.h| 61
3 files changed, 63 insertions(+), 26 deletions(-)
create
Hi,
Following set moves some PRM related code away from PM core code to
PRM / HWMOD. This requires the hwmod cleanup set from Paul that
implements the setup_preprogram hooks for hwmods. Sending as RFC for
initial commenting.
This set does following:
- gets rid of the prcm interrupt handler from
cleanup for removing the priority handling and replacing
it with a mechanism for acking pending events. This gets rid of the need
for registering the shared interrupt handlers in specific order.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 109
IVA2 hwmod resets were missing the status bit offsets. Also, as the
hwmod itself didn't have prcm info at all, resetting iva hwmod was
accessing some bogus memory addresses. Added both infos to fix this.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm-regbits-34xx.h
hwmod.
This patch introduces following warning during boot:
omap_hwmod: iva: failed to hardreset
This is generated by asserting the 'logic' hardreset for IVA2
hwmod. However, this warning is not fatal, and doesn't cause any
functional problems.
Signed-off-by: Tero Kristo t-kri...@ti.com
On Mon, 2012-07-16 at 16:56 +0530, Rajendra Nayak wrote:
On Friday 13 July 2012 10:07 PM, Tero Kristo wrote:
PM code doesn't really care about the PRCM wakeup + io interrupts on
OMAP3, as these are used only for acking PRCM internal events, and the
IO chain handler is taken care of by hwmod
On Mon, 2012-07-16 at 15:34 +0530, Rajendra Nayak wrote:
On Friday 13 July 2012 07:49 PM, Tero Kristo wrote:
This works similarly to e.g. pwrdm_for_each(). Needed by enhanced
usecounting debug functionality that will be added to pm-debug.
OMAP clock framework has its own debugfs entry
On Mon, 2012-07-16 at 16:20 +0530, Rajendra Nayak wrote:
On Friday 13 July 2012 07:49 PM, Tero Kristo wrote:
Voltdm, pwrdm, clkdm, hwmod and clk usecounts are now separeted to
their own file, 'usecount'. This file shows the usecounts for every
active domain and their children recursively
On Mon, 2012-07-16 at 16:30 +0530, Rajendra Nayak wrote:
Hi Tero,
On Friday 13 July 2012 07:49 PM, Tero Kristo wrote:
Some clockdomains bug out if their autodeps are deleted before idle.
This happens namely with OMAP3 PER domain, it will bug out if it
doesn't have wakedeps enabled when
On Wed, 2012-07-18 at 12:45 +0530, Rajendra Nayak wrote:
On Tuesday 17 July 2012 08:26 PM, Tero Kristo wrote:
Anyway, it also looks like this fix is no longer needed with the latest
kernel, something has changed with the gpio code / or latencies and it
doesn't crash anymore. Thus, it looks
On Tue, 2012-07-17 at 03:11 -0500, Menon, Nishanth wrote:
On Mon, Jun 11, 2012 at 10:26 AM, Tero Kristo t-kri...@ti.com wrote:
On OMAP4 most modules/hwmods support module level context status. On
OMAP3 and earlier, we relied on the power domain level context status.
Identify all modules
On Tue, 2012-07-17 at 02:59 -0500, Menon, Nishanth wrote:
Couple of minor comments:
On Mon, Jun 11, 2012 at 10:26 AM, Tero Kristo t-kri...@ti.com wrote:
[...]
/**
+ * _omap4_update_context_lost - increment hwmod context loss counter if
+ * hwmod context was lost, and clear hardware
On Wed, 2012-07-18 at 14:34 +0530, Rajendra Nayak wrote:
On Wednesday 18 July 2012 01:35 PM, Tero Kristo wrote:
On Wed, 2012-07-18 at 12:45 +0530, Rajendra Nayak wrote:
On Tuesday 17 July 2012 08:26 PM, Tero Kristo wrote:
Anyway, it also looks like this fix is no longer needed
On Wed, 2012-07-18 at 03:17 -0600, Paul Walmsley wrote:
Hi
one trivial comment
On Mon, 11 Jun 2012, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 46ab9d9..8d7de4f 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
On Tue, 2012-07-17 at 03:11 -0500, Menon, Nishanth wrote:
On Mon, Jun 11, 2012 at 10:26 AM, Tero Kristo t-kri...@ti.com wrote:
On OMAP4 most modules/hwmods support module level context status. On
OMAP3 and earlier, we relied on the power domain level context status.
Identify all modules
On Thu, 2012-07-19 at 00:55 -0500, Menon, Nishanth wrote:
On Wed, Jul 18, 2012 at 4:15 AM, Tero Kristo t-kri...@ti.com wrote:
On Tue, 2012-07-17 at 02:59 -0500, Menon, Nishanth wrote:
Couple of minor comments:
On Mon, Jun 11, 2012 at 10:26 AM, Tero Kristo t-kri...@ti.com wrote
On Wed, 2012-07-18 at 11:24 -0600, Paul Walmsley wrote:
On Wed, 18 Jul 2012, Tero Kristo wrote:
On Tue, 2012-07-17 at 03:11 -0500, Menon, Nishanth wrote:
OMAP4430_RM_ABE_AESS_CONTEXT? why not use LOSTMEM_AESSMEM ? ABE will
need to know when it lost context to be able to reload it's
On Thu, 2012-07-19 at 16:05 +0530, Shilimkar, Santosh wrote:
On Thu, Jul 19, 2012 at 3:19 PM, Tero Kristo t-kri...@ti.com wrote:
On Thu, 2012-07-19 at 00:55 -0500, Menon, Nishanth wrote:
On Wed, Jul 18, 2012 at 4:15 AM, Tero Kristo t-kri...@ti.com wrote:
On Tue, 2012-07-17 at 02:59
On Thu, 2012-07-19 at 05:27 -0500, Menon, Nishanth wrote:
On Thu, Jul 19, 2012 at 4:49 AM, Tero Kristo t-kri...@ti.com wrote:
Zero doesn't mean no context loss. If counter was previous MAX_INT, if
it goes to zero it is still a context loss, as the counter value
differs. Drivers do check
Hi,
Changes compared to previous version:
- ported on top of 3.5-rc7
- patch 3: added a few modules here not having context_offs
- patch 8: NEW:
* ROM code on EMU / HS devices seem to wipe the contents of
L4PER_PWRSTCTRL register, thus this patch adds an errata +
save and restore for
Added similar PM errata flag support as omap3 has. This should be used
in similar manner, set the flags during init time, and check the flag
values during runtime.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm.h |7 +++
arch/arm/mach-omap2/pm44xx.c |1 +
2
interrupts.
The BUG is applicable to only OMAP4460(r2pX) devices.
OMAP4470 (also r2pX) is not affected by this bug because
ROM code has been fixed.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/common.h
already.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 46
1 files changed, 46 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index b7bcba5
]
Signed-off-by: Paul Walmsley p...@pwsan.com
[t-kri...@ti.com: added support for arch specific hwmod ops, and changed
the no context offset indicator to USHRT_MAX]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 71 --
arch
From: Rajendra Nayak rna...@ti.com
Remove the FIXME's in the suspend sequence since
we now intend to support system level RET support.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
[Jean Pihet j-pi...@ti.com: ported on top of the functional power
states
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm44xx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 1e845e8..eb3e073 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach
.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/powerdomain44xx.c | 59 +
1 files changed, 59 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c
b/arch/arm/mach-omap2/powerdomain44xx.c
index 030d10c..ab93f08
'l4_abe' hwmod uses the LOSTMEM_AESSMEM bit of RM_ABE_AESS_CONTEXT register,
as l4_abe doesn't have its own dedicated register for this purpose. This
register is shared with 'aess' hwmod, thus both hwmods must also specify
which bits of the register are used for them.
Signed-off-by: Tero Kristo t
contents of the
context register are used without any filtering.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |8
arch/arm/plat-omap/include/plat/omap_hwmod.h |6 ++
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git
.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 39 -
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm44xx.c | 10 +++
3 files changed, 49 insertions(+), 1 deletions(-)
diff --git
if it only has ON within its valid powerstates.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 21 -
1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index
.
Cc: Paul Walmsley p...@pwsan.com
Cc: Benoît Cousson b-cous...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm
On Thu, 2012-07-19 at 08:44 -0600, Paul Walmsley wrote:
On Thu, 19 Jul 2012, Tero Kristo wrote:
Signed-off-by: Tero Kristo t-kri...@ti.com
This one needs at least some short description for the changelog. Maybe
just a brief explanation that OSWR saves more energy that CSWR, but has
On Thu, 2012-07-19 at 17:30 -0600, Paul Walmsley wrote:
Hi
On Thu, 19 Jul 2012, Tero Kristo wrote:
Subject: [PATCHv7 07/12] ARM: OMAP4: PM: put all domains to OSWR during
suspend
Currently OMAP4 suspend puts all power domains to CSWR. OSWR is a deeper
state that saves more power
On Fri, 2012-07-20 at 13:38 +0530, Rajendra Nayak wrote:
On Friday 20 July 2012 12:55 PM, Shilimkar, Santosh wrote:
On Fri, Jul 20, 2012 at 11:34 AM, Rajendra Nayakrna...@ti.com wrote:
pwrdm_pre_transition()/pwrdm_post_transition() have always been high
latency
operations done within
On Fri, 2012-07-20 at 11:34 +0530, Rajendra Nayak wrote:
Hi,
Here are some CPUidle/Suspend cleanup patches done by adding
some more functionality in the OMAP Powerdomain framework.
They mostly cleanup OMAP3 but the same ideas can be used/
applied for OMAP4 and beyond.
The series is based
On Thu, 2012-07-19 at 17:21 -0600, Paul Walmsley wrote:
Hi
On Thu, 19 Jul 2012, Tero Kristo wrote:
On OMAP4430 HS / EMU chips, ROM code appears to re-configure L4PER domain
next powerstate during wakeup from OSWR / OFF, programming it to ON.
This will prevent successive entries
On Thu, 2012-07-19 at 17:21 -0600, Paul Walmsley wrote:
Hi
On Thu, 19 Jul 2012, Tero Kristo wrote:
On OMAP4430 HS / EMU chips, ROM code appears to re-configure L4PER domain
next powerstate during wakeup from OSWR / OFF, programming it to ON.
This will prevent successive entries
On Tue, 2012-07-24 at 11:30 +1000, NeilBrown wrote:
On Mon, 23 Jul 2012 17:24:54 +0300 Tero Kristo t-kri...@ti.com wrote:
Hi Neil,
On Mon, 2012-07-23 at 21:06 +1000, NeilBrown wrote:
My GTA04 (mobile phone using OMAP3 and TWL4030 PMIC) has difficulty
rebooting
with 3.5
On Tue, 2012-07-24 at 17:34 +1000, NeilBrown wrote:
On Tue, 24 Jul 2012 09:28:24 +0300 Tero Kristo t-kri...@ti.com wrote:
On Tue, 2012-07-24 at 11:30 +1000, NeilBrown wrote:
Might there be some way to get it to scale higher than 600MHz?
The first message from U-boot says
On Thu, 2012-07-26 at 10:44 -0700, Kevin Hilman wrote:
Rajendra Nayak rna...@ti.com writes:
On Thursday 26 July 2012 04:13 AM, Kevin Hilman wrote:
Tero Kristot-kri...@ti.com writes:
On Fri, 2012-07-20 at 13:38 +0530, Rajendra Nayak wrote:
On Friday 20 July 2012 12:55 PM, Shilimkar,
On Fri, 2012-07-27 at 12:55 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
Voltdm, pwrdm, clkdm, hwmod and clk usecounts are now separeted to
their own file, 'usecount'. This file shows the usecounts for every
active domain and their children recursively. 'count' file now
On Fri, 2012-07-27 at 12:36 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
mpu / core powerdomain usecounts are now statically increased
by 1 during MPU activity. This allows the domains to reflect
actual usage, and will allow the usecount to reach 0 just before
all CPUs
On Tue, 2012-08-14 at 17:22 +0300, Peter Ujfalusi wrote:
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
I think this one could use a short commit message, also about why
kfree():s are dropped (handled internally by devm_* etc.)
-Tero
--
To unsubscribe from this list: send the line
Hi Peter,
The MFD patches in this set look good to me except for the minor comment
on patch 2 I just sent. That is with my limited knowledge of DT
though...
-Tero
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More
On Mon, 2012-08-06 at 16:31 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
This patch fixes the usecount tracking for omap3+, previously the
usecount numbers were rather bogus and were not really useful for
any purpose. Now usecount numbers track the number of really
On Mon, 2012-08-06 at 12:14 +0200, Jean Pihet wrote:
Hi Tero,
On Mon, Jul 30, 2012 at 10:40 AM, Tero Kristo t-kri...@ti.com wrote:
On Fri, 2012-07-27 at 12:36 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
mpu / core powerdomain usecounts are now statically increased
On Thu, 2012-08-16 at 11:20 +0530, Shilimkar, Santosh wrote:
Paul,
On Thu, Aug 16, 2012 at 6:18 AM, Paul Walmsley p...@pwsan.com wrote:
Hi Santosh,
On Wed, 15 Aug 2012, Shilimkar, Santosh wrote:
On Wed, Aug 15, 2012 at 3:32 PM, Jean Pihet jean.pi...@newoldbits.com
wrote:
Just a heads up on this, to let you know I have not ignored your
comments. :)
I have been doing some re-work / testing on this set based on your
comments, and will hopefully post a new set tomorrow. One of the bigger
changes is that I have changed pad wakeups to use omap_mux and they are
now
Sorry for the delay, I had still some problems with the OMAP3 wakeup handling
with this set from suspend, but now this one works again. This set has been
tested on OMAP3 beagleboard, with suspend and cpuidle, with and without
off-mode. Appears to be working in all cases.
Main differences between
PRCM interrupt handler will now parse registered pads to see whether there
is an active wakeup event. If there is a pending wakeup event, the registered
ISR will be called.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm.c | 94
This is no longer needed as it will be handled within serial driver itself.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
1 files changed, 0 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2
This patch is just a temporary hack to allow serial to work properly with
the PRCM chain handler. Should be replaced with a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 28 +---
drivers/tty/serial/omap-serial.c
against the SoC on which we are
running, keeping only the ones that are actually useful. All the logic
is written to be generic with regard to OMAP3/OMAP4, even though OMAP3
has single PRCM event registers and OMAP4 has two PRCM event
registers.
Patch tested on OMAP3 beagleboard.
Signed-off-by: Tero
This should be replaced with a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 66 -
1 files changed, 64 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2
Prevents a hang when omap_device would want to print something for
serial console device while enabling / disabling its clocks.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/plat-omap/omap_device.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm
PRCM chain interrupt registration is done now as part of
omap_hwmod_enable_wakeup() and omap_hwmod_disable_wakeup() calls. This
allows module ISR:s to be called when the module is idle but an IO_PAD
event is detected on the module input pads.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch
These are no longer needed as omap_hwmod takes care of multiplexing of pads.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 25 +
1 files changed, 1 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach
This prevents system hang while attempting to access suspended console.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index
On Wed, 2011-06-29 at 18:53 +0200, Balbi, Felipe wrote:
Hi,
On Wed, Jun 29, 2011 at 12:04:55PM +0300, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 96a7624..89cf027 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2
Changes compared to previous version:
- rebased on top of latest PM branch
- sparse interrupt numbering in use (thanks Felipe)
- removed duplicate pad mapping as proposed by Kevin
* io pad parsing done now in a support function provided by omap_hwmod
* see patch 4
- using Govindraj's ioring
From: R, Govindraj govindraj.r...@ti.com
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/mux.c| 30 ++
arch/arm/mach-omap2/mux.h
against the SoC on which we are
running, keeping only the ones that are actually useful. All the logic
is written to be generic with regard to OMAP3/OMAP4, even though OMAP3
has single PRCM event registers and OMAP4 has two PRCM event
registers.
Patch tested on OMAP3 beagleboard.
Signed-off-by: Tero
OMAP hwmod now provides a service routine to parse pending wakeup events
and to call registered ISR whenever active wakeups are detected. This
routine is called directly from PRCM interrupt handler.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c
This is no longer needed as it will be handled within serial driver itself.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
1 files changed, 0 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2
This patch is just a temporary hack to allow serial to work properly with
the PRCM chain handler. Should be replaced with a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 28 +---
drivers/tty/serial/omap-serial.c
This prevents system hang while attempting to access suspended console. Should
most likely be fixed with proper console locking.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach
These are no longer needed as omap_hwmod takes care of multiplexing of pads.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 25 +
1 files changed, 1 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach
This is handled automatically by the PRCM chain interrupt mechanism now.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index
Prevents a hang when omap_device would want to print something for
serial console device while enabling / disabling its clocks.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/plat-omap/omap_device.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm
Just for PRCM chain handler testing purposes. This should be replaced with
a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 71 -
1 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/arch
On Tue, 2011-07-05 at 13:18 +0200, Balbi, Felipe wrote:
Hi,
On Tue, Jul 05, 2011 at 01:27:47PM +0300, Tero Kristo wrote:
@@ -854,20 +802,35 @@ static int __init omap3_pm_init(void)
/* XXX prcm_setup_regs needs to be before enabling hw
* supervised mode for powerdomains
Hello,
Following patches add an external controller support for TWL SMPS regulators.
This is needed because OMAP has voltage processor support which provides
interface to control a few regulators (VDD1 / VDD2 for OMAP3), and this
is shared with smartreflex.
These patches work in a way that twl
since the OMAP voltage layer isn't initialized when the
regulator is instantiated.
* Make the twl-regulator driver actually work with VDD1/VDD2 when no
external controller is attached (i.e, when the OMAP voltage layer
code is disabled).
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Thomas
-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.c | 37 +
arch/arm/mach-omap2/voltage.h |4 +++
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 +
3 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/arch/arm
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
Instantiate the VDD1 and VDD2 regulators and connect them to their
respective consumers: mpu.0 for VDD1 and l3_main.0 for VDD2.
TODO:
* As these instantiations will be identical for all OMAP3 boards,
find a way of sharing them
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32 +++
arch/arm/mach-omap2/opp3xxx_data.c |4 +++
2 files changed, 36 insertions(+), 0
On Sat, 2011-07-09 at 12:56 +0200, Mark Brown wrote:
On Sat, Jul 09, 2011 at 01:40:08PM +0300, Felipe Balbi wrote:
a hack for a hack... what's the difference ? If it's only to solve a
limitation temporarily anyways... although it would be better to discuss
how to add such support to the
On Mon, 2011-07-11 at 12:05 +0200, Mark Brown wrote:
On Mon, Jul 11, 2011 at 11:23:11AM +0300, Tero Kristo wrote:
On Sat, 2011-07-09 at 12:56 +0200, Mark Brown wrote:
On Sat, Jul 09, 2011 at 01:40:08PM +0300, Felipe Balbi wrote:
I'm completely unable to identify an issue
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