Add vio regulator supply, needed for ads7846 touchscreen controller
driver.
Tested on OMAP3 (ES3.1 Si) RevG version of EVM.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
Changes from V1 -
- Added patch description.
arch/arm/mach-omap2/board-omap3evm.c | 20
If you choose default output to DVI, the LCD backlight used to
stay on, since panel-disable function never gets called.
So, during init put backlight GPIO to off state and the driver
code will decide which output to enable.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
Changes from V1
with ES3.1 Si.
This patch is based on intial version from Charulatha V, reference
to original discussion -
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg35784.html
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
Changes from V1 -
- Removed hardcoded value for rst gpio
Set OMAP_PIN_OFF_WAKEUPENABLE to enable the wake-up
functionality from touchscreen controller.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board
Charulatha V, reference
to original discussion -
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg35784.html
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Tested-by: Kevin Hilman khil...@ti.com
---
Since Kevin reported that this patch doesn't get
is broken, enable the wakeup capability
- DSS: Addition of Mux changes for AM/DM37x
- Make Backlight gpio off in default state
Note: Resetting the revision of patches since this is first bundled series.
Vaibhav Hiremath (5):
OMAP:board-omap3evm: Change TWL related gpio API's
Since TWL GPIO's can go into sleep, and using normal
gpio_get/set_value() API will lead to kernel dump (WARN_ON()).
So replacing standard gpio_get/set_value() to
gpio_get/set_value_cansleep().
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 12
Add vio regulator supply, needed for ads7846 touchscreen controller
driver.
Tested on OMAP3 (ES3.1 Si) RevG version of EVM.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 20
1 files changed, 20 insertions(+), 0 deletions
If you choose default output to DVI, the LCD backlight used to
stay on, since panel-disable function never gets called.
So, during init put backlight GPIO to off state and the driver
code will decide which output to enable.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2
Set OMAP_PIN_OFF_WAKEUPENABLE to enable the wake-up
functionality from touchscreen controller.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board
To support higher resolution (e.g 720P@60), on OMAP36x (AM/DM37x)
DSS data bus has been muxed with sys_boot pins.
DSS[18-23] = DSS[0-5]
sys_boot[0,1 3-5] = DSS[18-23]
EVM revision =RevB adopt this mux changes, which is going to ship outside.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
' with a value, in function
returning void
make[1]: *** [arch/arm/mach-omap2/hwspinlock.o] Error 1
make: *** [arch/arm/mach-omap2] Error 2
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
include/linux/hwspinlock.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include
This patch doesn't change functionality or behavior of the code
execution; it barely cleans up the code and splits into SoC
specific implementation for ID and feature detection; makes
easier to add new SoC (especially for AM devices where we do not have
feature register).
Signed-off-by: Vaibhav
For OMAP3 uarts (module rev = 0x52) and all successor devices
(omap4, TI81xx, AM33xx, etc...) empty fifo read errata is applicable,
so we can get rid of cpu_is_ check and simply check for module rev here.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
NOTE: This patch has been tested
From: Afzal Mohammed af...@ti.com
This patch updates the common machine specific source files for
support for AM33XX/AM335x with cpu type, macros for identification of
AM33XX/AM335X device.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
DPLL5
This patch set adds support for AM335x device having
Cortex-A8 MPU.
Official website - http://www.ti.com/product/am3359
AM335X is treated as another OMAP3 variant, where,
along with existing cpu class OMAP34XX, new cpu class AM33XX is created
and the respective type is AM335X, which is newly
-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/Kconfig |5 +
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/board-am3517evm.c| 21 +
arch/arm/mach-omap2/io.c |7 +++
arch/arm/mach-omap2/timer.c
From: Afzal Mohammed af...@ti.com
Add support for low level debugging on AM335X EVM (AM33XX family).
Currently only support for UART1 console, which is used on AM335X EVM
is added.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2
data
arm:omap:am33xx: Integrate voltage domain
arm:omap:am33xx: Add power domain data
arm:omap:am33xx: Integrate powerdomain to OMAP power framework
arm:omap:am33xx: Add Clock clockdomain data
arm:omap:am33xx: Integrate clock clockdomain to OMAP clock
framework
Vaibhav Hiremath (5
From: Afzal Mohammed af...@ti.com
Currently dummy voltage domain data is being created
in order to succeed boot process.
Nothing has been done w.r.t actual hardware (voltage control).
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach
From: Afzal Mohammed af...@ti.com
Hook up AM33XX voltage domain info to OMAP framework.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/Makefile |2 ++
arch/arm/mach-omap2/io.c |1 +
2 files changed, 3 insertions
From: Afzal Mohammed af...@ti.com
Hook up AM33XX clock clock domain data to OMAP framework.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/Makefile |4 +++-
arch/arm/mach-omap2/clock3xxx_data.c |5
From: Afzal Mohammed af...@ti.com
This patch adds AM33XX power domain data,
corresponding API's to access PRM module and
PRM register offsets bit fields.
Signed-off-by: Rachna Patil rac...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
From: Afzal Mohammed af...@ti.com
Hook up AM33XX power domain to OMAP framework.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/Makefile |3 +++
arch/arm/mach-omap2/io.c |1 +
2 files changed, 4 insertions(+), 0
Hook up AM33XX HWMOD data to OMAP framework.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/io.c |2 ++
arch/arm/mach-omap2/omap_hwmod.c | 13 +
3 files
This patch creats seperate irq and dma defination header file
and updates the module base addresses required for HWMOD data.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/plat-omap/include/plat/am33xx.h| 40
arch/arm/plat
AM335X is bit different than OMAP3/4 architecture when it comes to
PRCM module, for example, the way module is enabled/disabled.
Although it is closer to OMAP4 architecure but the register offset
and PRCM partitions won't match, so we need to seperate API's
for AM335X.
Signed-off-by: Vaibhav
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/cminst33xx.c | 311 ++
arch/arm/mach-omap2/cminst33xx.h | 63
3 files changed, 376
AM335XEVM machine support
Tony Lindgren (1):
Merge tag 'omap-devel-a-for-3.6' of
git://git.kernel.org/.../pjw/omap-pending into devel-am33xx
Vaibhav Hiremath (6):
ARM: OMAP2+: control: Add AM33XX control reg sec clkctrl offset
ARM: OMAP AM33xx: voltagedomain: Add voltage
in, converting
cpu_is_am33xx/335x() == soc_is_am33xx/335x()
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.comt status
---
Rebasing and resubmitting on top of devel-am33xx branch.
arch/arm/mach-omap2/clock3xxx_data.c |2 +-
arch/arm/mach-omap2/id.c |4
, cpu_is_omap34xx() will return false,
and only cpu_is_am33xx() will be true.
Please refer to the link below, for mailing-list discussion on this -
http://www.spinics.net/lists/linux-omap/msg69439.html
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Kevin Hilman khil...@ti.com
Cc: Paul Walmsley p
On 7/9/2012 10:09 AM, Zumeng Chen wrote:
Hello,
The following patches based on the 3.5-rc6 from Wim, which
are based on:
1 ) bootstatus fix for omap3,
2 ) omap-wdt framework update cater for the current framework
as Shubhrajyoti comments mentioned.
Regards,
Zumeng
Linux
On 7/6/2012 2:51 PM, Santosh Shilimkar wrote:
From: R Sricharan r.sricha...@ti.com
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP
architecture. It's a dual core SOC with GIC used for interrupt
handling and with an integrated L2 cache controller.
OMAP5432 is another
On 7/6/2012 2:51 PM, Santosh Shilimkar wrote:
From: R Sricharan r.sricha...@ti.com
OMAP socs has a legacy and a highlander version of the
32k sync counter IP. The register offsets vary between the
highlander and the legacy scheme. So use the 'SCHEME'
bits(30-31) of the revision register
Hi All,
During migration to run-time PM we came across unique (I believe) issue
with respect to CPSW driver and eHRPWM. I am looking for pointers to
handle these use-cases, as I am still going through the code and trying
to understand myself on how can we handle this.
CPSW:
=
CPSW Subsystem
Clock Tree has been merged during rc3-4 timeframe,
before above commit got merged, so similar change is required
for AM33xx as well (Change the gptX_fck = timerX_fck).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/clock33xx_data.c | 14 +++---
1 files changed, 7
Hi,
In OMAP world, we have omap_device layer, which exports api's like
omap_device_build() to create and register platform_device to the
kernel. This layer understands hwmod infrastructure and parses all the
platform specific information from it.
Now with DT migration, the same thing is achieved
On 8/3/2012 3:50 AM, Omar Ramirez Luna wrote:
Hi.
On 2 August 2012 02:52, Paul Walmsley p...@pwsan.com wrote:
On Mon, 16 Jul 2012, Omar Ramirez Luna wrote:
For a reset sequence to complete cleanly, a module needs its
associated clocks to be enabled, otherwise the timeout check
in prcm
On 7/25/2012 5:53 PM, AnilKumar Ch wrote:
Add Bosch D_CAN controller device tree data to AM33XX dtsi file
by adding d_can device node with all the necessary parameters.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi |5 +
1 file changed, 5
On 7/26/2012 6:34 PM, Sergei Shtylyov wrote:
Hello.
On 26-07-2012 12:36, Daniel Mack wrote:
Add Bosch D_CAN controller device tree data to AM33XX dtsi file
by adding d_can device node with all the necessary parameters.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
, bone, evm, etc...).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Arnd Bergmann a...@arndb.de
CC: Tony Lindgren t...@atomide.com
---
This patch is tested on BeagleBone platform.
arch/arm/boot/dts/am335x-bone.dts
create new clock nodes
inside am33xx clock-tree table based on dev_id and con_id = NULL
for both d_can0 and d_can1 instances.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
This patch is boot
without having to maintain this
cpu/soc_is_xxx list.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
This patch is boot tested on BeagleBone
(using already accepted hwmod patches)
Changes from V2:
- This change is dropped now, since it breaks common
adds of_dev_auxdata for both DCAN_0/1 instances.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
---
This patch is boot tested on BeagleBone platform
On 8/13/2012 4:37 PM, Santosh Shilimkar wrote:
The real time counter also called master counter, is a free-running
counter. It produces the count used by the CPU local timer peripherals
in the MPU cluster. The timer counts at a rate of 6.144 MHz.
The ratio registers needs to be configured
On 7/23/2012 8:54 PM, Jon Hunter wrote:
Hi Rob,
On 07/16/2012 10:56 AM, Jon Hunter wrote:
Hi Rob,
On 07/13/2012 09:15 PM, Rob Herring wrote:
On 07/13/2012 05:26 PM, Jon Hunter wrote:
Add the 12 GP timers nodes present in OMAP3.
Add the 11 GP timers nodes present in OMAP4.
Add
On 7/14/2012 3:56 AM, Jon Hunter wrote:
OMAP3 devices may or may not have security features enabled. Security enabled
devices are known as high-secure (HS) and devices without security are known
as
general purpose (GP).
For OMAP3 devices there are 12 general purpose timers available. On
On 8/8/2012 5:13 PM, Hiremath, Vaibhav wrote:
On Wed, Aug 08, 2012 at 07:38:01, Rob Herring wrote:
On 08/07/2012 10:53 AM, Hiremath, Vaibhav wrote:
On Tue, Aug 07, 2012 at 20:49:48, Rob Herring wrote:
On 08/07/2012 08:37 AM, Vaibhav Hiremath wrote:
If the module requires only one
dts support, so care
to add entry status = okay while adding support for any
module.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Acked-by: Arnd Bergmann a...@arndb.de
Cc: Benoit Cousson b-cous...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Tony Lindgren t...@atomide.com
---
Changes
On 7/16/2012 7:41 PM, Vaibhav Hiremath wrote:
Hi All,
Paul,
From last couple of days I am almost spending my whole time trying to
get to somewhere on below issue and based on my understanding and
learning so far I started feeling that, probably we might have made
wrong decision to remove
Add missing soc_is_am33xx() check for DPLL common control clock
related functions, without this dpll programmability would be broken
for am33xx family of devices.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
Not sure
On 7/17/2012 10:14 AM, Hiremath, Vaibhav wrote:
On Tue, Jul 17, 2012 at 05:24:39, Paul Walmsley wrote:
On Mon, 16 Jul 2012, Vaibhav Hiremath wrote:
With commit ae6df418a21f3a361c5f9b878e32a8aba4e17692
Sub: ARM: OMAP2+: dmtimer: cleanup fclk usage)
The Timer functional clock naming
-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring robherri...@gmail.com
---
arch/arm/mach-omap2/clock33xx_data.c |2 ++
1 files changed, 2
.
Although currently hwmod overwrites resources, I have validated this
patch series by changing the omap_device layer to respect DT resources
and boot Tested on BeagleBone platform.
I will be submitting the changes for omap_device layer as well, still
needs to fix on certain things.
Vaibhav Hiremath (2
To make it consistent, convert all hex number presentation
to lower-case from all am33xx specific nodes.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
arch/arm/boot/dts/am335x-bone.dts |2 +-
arch/arm/boot/dts/am335x-evm.dts |2 +-
arch/arm/boot
and for only specific things.
Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode,
so this patch is preparation for the future where we supposed to get
rid of hwmod dependency anyway.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Benoit
On 8/25/2012 1:44 AM, Tony Lindgren wrote:
* AnilKumar Ch anilku...@ti.com [120816 05:20]:
Add D_CAN1 pinctrl node to am3358_pinmux master node to export
D_CAN functionality on AM335x EVM according to pinctrl-single
driver.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
Changes from
).
Once DMA resource is available from OF layer, we should
kill filling any resources from hwmod.
- Non-DT boot mode
Here, pdev-num_resources = 0, and we should get all the
resources from hwmod (following existing steps)
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Benoit
comments are taken into consideration and a new version
reposted, will queue this series for 3.7.
Care to respin your series that converts the data also, on top of your new
version of this series? We should try to get that into 3.7 also.
BTW are you still waiting for something from Vaibhav
On 8/31/2012 2:02 AM, Tony Lindgren wrote:
* AnilKumar Ch anilku...@ti.com [120828 01:11]:
Adds basic pinctrl device tree data for AM33XX family of devices.
This patch is based on the pinctrl-single driver.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi |
Hi Russell Tony,
AM335X EVM (based on AM33XX device) only supports DT boot mode and
doesn't have CONFIG_MACH_AM335XEVM option defined. Some time back during
baseport submission we had aligned that, we won't create separate EVM
options, killing the board file all-together.
Having said that, the
This adds am335x-evm and am335x-bone dtb targets to
'make dtbs', just like other platforms.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/Makefile.boot |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm
On 9/3/2012 8:16 PM, Benoit Cousson wrote:
Hi Peter,
The overall series looks good to me, but I do have a couple of comments.
On 08/29/2012 03:31 PM, Peter Ujfalusi wrote:
The McBSP IP within OMAP2420 and 2430 is different we need to create separate
dtsi files for them.
Signed-off-by:
-leds, of_use_leds);
+ if (!strcmp(of_use_leds, true))
+ omap_twl_info-use_leds = true;
+
You can replace this with
omap_twl_info-use_leds = of_property_read_bool(dev-of_node,
ti,use-leds);
Otherwise looks OK to me, also I have tested it on OMAP3EVM.
Tested--Acked-By: Vaibhav
it on OMAP3EVM.
Tested--Acked-By: Vaibhav Hiremath hvaib...@ti.com
Thanks,
Vaibhav
+};
diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts
index f349ee9..f1e18fe 100644
--- a/arch/arm/boot/dts/omap3-evm.dts
+++ b/arch/arm/boot/dts/omap3-evm.dts
@@ -17,6 +17,15
On 9/4/2012 11:44 AM, AnilKumar, Chimata wrote:
Hi Marc,
On Tue, Sep 04, 2012 at 02:09:15, Marc Kleine-Budde wrote:
On 09/03/2012 01:52 PM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM.
DCAN RAM holds all the message objects during transmission or
On 9/5/2012 5:06 PM, Sourav Poddar wrote:
smsc ece1099 is a keyboard scan or gpio expansion device.
The patch create keypad and gpio expander child for this
multi function smsc driver.
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Felipe Balbi
On 9/5/2012 5:06 PM, Sourav Poddar wrote:
From: G, Manjunath Kondaiah manj...@ti.com
SMSC ECE1099 is a keyboard scan or GPIO expansion device.The device
supports a keypad scan matrix of 23*8.This driver uses this
device as a keypad driver.
Cc: Dmitry Torokhov dmitry.torok...@gmail.com
On 9/5/2012 5:07 PM, Sourav Poddar wrote:
smsc can be used as an gpio io expander device also. So adding
support for configuring smsc pins as a gpio.
Cc: Benoit Cousson b-cous...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Sourav
On 9/5/2012 7:57 PM, Benoit Cousson wrote:
Hi Paul,
On 08/24/2012 06:20 PM, Peter Ujfalusi wrote:
Hi Paul,
On 08/24/2012 06:38 PM, Paul Walmsley wrote:
Do we need both this one and your '[PATCH] driver core: Check if r-name
is valid in platform_get_resource_byname()' ? Or would that
On 9/6/2012 4:48 AM, Tony Lindgren wrote:
Hi,
* AnilKumar Ch anilku...@ti.com [120905 04:14]:
Add of_dev_auxdata to pass d_can raminit callback APIs to initialize
d_can RAM. D_CAN RAM initialization bits are present in CONTROL module
address space, which can be accessed by platform
and watchdogs are impacted by this defect this patch
only
implements the workaround for the dmtimer. Currently the watchdog driver does
not read the counter register and so no workaround is necessary.
Confirmed with Vaibhav Hiremath that this bug also impacts AM33xx devices.
Thanks for pinging me
On 9/6/2012 12:34 AM, Jon Hunter wrote:
Currently the dmtimer posted mode is being enabled when the function
__omap_dm_timer_reset() is called. This function is only being called for
OMAP1 timers and OMAP2+ timers that are being used as system timers. Hence,
for OMAP2+ timers that are NOT
On 9/6/2012 12:34 AM, Jon Hunter wrote:
The OMAP dmtimer driver does not currently have a function to disable the
timer interrupts. For some timer instances the timer interrupt enable
function can be used to disable the interrupts because the same interrupt
enable register is used to disable
On 9/6/2012 12:34 AM, Jon Hunter wrote:
This series includes several fixes for the OMAP DMTIMER driver and a few
clean-ups to simplify some of the code. This series is based upon 3.6-rc4.
Tested on OMAP5912 OSK, OMAP2420 H4, OMAP3430 Beagle and OMAP4430 Panda.
Testing includes ...
1.
info
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP
block
Vaibhav Hiremath (1):
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
arch/arm/mach-omap2/clock33xx_data.c | 14
arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 50
On 9/11/2012 12:05 PM, Paul Walmsley wrote:
Hi Rajendra,
A CCF testing branch has been built here. The base is v3.6-rc5, plus the
most recent version of the Common Clock Framework preparation patches that
you posted to the list, [PATCH v4 0/3] Prepare for OMAP2+ movement to
Common
On 9/11/2012 2:39 PM, Kishon Vijay Abraham I wrote:
Added device tree support for omap musb driver and updated the
Documentation with device tree binding information.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/omap-usb.txt | 33
On 9/11/2012 7:54 PM, Shilimkar, Santosh wrote:
On Tue, Sep 11, 2012 at 7:47 PM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 11 September 2012, Shilimkar, Santosh wrote:
Just curious to know how you came with some of the above header names ?
plat/mcbsp --- dsp-mcbsp.h
There is no
, it will be
deselected - probably during the next baseline test.
Vaibhav Hiremath (4):
ARM: OMAP2+: hwmod: Hook-up am33xx support in omap_hwmod framework
ARM: OMAP3+: hwmod: Add AM33XX HWMOD data
ARM: OMAP2+: dpll: Add missing soc_is_am33xx() check for common
functions
omap_hwmod_33xx_data.c.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2
With recent migration of omap architectures to SPARSE_IRQ framework,
it is important to add OMAP_INTC_START to all interrupt numbers
which will be eventually requested by drivers.
This is required in order to get AM33XX boot functionality.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Paul
been varified for,
- Build Test (omap2plus_defconfig)
- Boot tested on Bone
- Sparse check pass
Paul,
Request to review these patches and give another pull request for this.
Vaibhav Hiremath (2):
ARM: AM33XX: hwmod: Remove platform specific header files
ARM: AM33XX: hwmod: Add
.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/clock33xx_data.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock33xx_data.c
b/arch/arm/mach-omap2/clock33xx_data.c
index b87b88c..114ab4b 100644
--- a/arch/arm/mach-omap2
This adds am335x-evm and am335x-bone dtb targets to
'make dtbs', just like other platforms.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
Changes from V1:
- Move target to common Makefile instead of
the per-platform file.
arch/arm/boot/dts/Makefile |4 +++-
1 files
On 9/26/2012 10:23 PM, Jon Hunter wrote:
On 09/20/2012 06:53 PM, Tony Lindgren wrote:
* Benoit Cousson b-cous...@ti.com [120919 19:24]:
Hi Tony,
I was about to take the DTS patch, but was wondering if you will pull
the driver changes for 3.7.
I suggest that you do a separate branch on
is expected behavior, as gpmc is not supported yet from DT.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Afzal Mohammed af...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc Paul Walmsley p...@pwsan.com
---
This should go in for rc1, as this breaks AM33xx boot.
arch/arm/mach-omap2/gpmc.c |4
On 10/18/2012 9:23 PM, Daniel Mack wrote:
This is needed as preparation for platforms where using pm runtime usage
is mandatory.
Signed-off-by: Daniel Mack zon...@gmail.com
It looks like, you just duplicated effort here.
RTC patches have been already submitted quite some time back for
On 10/17/2012 11:43 PM, Richard Cochran wrote:
Paul,
Would you please take this bugfix for 3.7-rc2? The suggestion to mail
you came from Toni Lindgren. The context where it came from is here:
http://lists.arm.linux.org.uk/lurker/message/20121015.191630.bdae3c50.en.html
Thanks,
On 10/19/2012 12:14 AM, Richard Cochran wrote:
On Thu, Oct 18, 2012 at 03:46:15AM +, Paul Walmsley wrote:
Probably the driver was submitted before any SoC integration support was
available. Grepping for 'cpsw' under arch/ turns up only AM33xx. AM335x
didn't have device enumeration
am335x-upstream-staging-cpsw
Mugunthan V N (2):
ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX
Vaibhav Hiremath (2):
net: davinci_mdio: Fix typo mistake in calling runtime-pm api
net: cpsw: Add parent-child relation
is, the patch has
been tested on AM335x-EVM and BeagleBone platform while submitting;
and in case of AM335x the MDIO driver doesn't control the module
enable/disable part, which is handled by CPSW driver.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Mugunthan V N mugunthan...@ti.com
Cc: Richard Cochran
required change
is inside DTS file, making MDIO as a child to CPSW node.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Mugunthan V N mugunthan...@ti.com
Cc: Richard Cochran richardcoch...@gmail.com
---
drivers/net/ethernet/ti/cpsw.c | 16 ++--
1 files changed, 14 insertions
register
bit-field is provided to control module/clock enable/disable,
makes it difficult to handle common resources from both drivers.
So the solution is, create parent-child relationship between
CPGMAC MDIO modules.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: Vaibhav
From: Mugunthan V N mugunthan...@ti.com
Add CPSW and MDIO related device tree data for AM33XX.
Also enable them into board/evm dts files by providing
respective phy-id.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Richard Cochran
On 10/29/2012 1:51 PM, Vaibhav Hiremath wrote:
Ignore this patch/mail, I screwed up with my command while sending patches.
Sorry for noise.
Thanks,
Vaibhav
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More
This patch adds reboot capability to all AM33XX based boards/EVM's,
by asserting PRM warm reset bit on 'reboot' command.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Tested-by: Daniel Mack zon...@gmail.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Tony Lindgren t...@atomide.com
Cc: Afzal Mohammed
On 10/26/2012 4:51 AM, Paul Walmsley wrote:
Remove arch/arm/mach-omap2/prcm.c and
arch/arm/plat-omap/include/plat/prcm.h. This is in preparation for
moving the PRM/CM code to drivers/, although to be fair, these files
should have been removed a long time ago.
Intended for 3.8 cleanup.
On 10/30/2012 8:06 AM, Paul Walmsley wrote:
Here are some basic OMAP test results for Linux v3.7-rc3.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.7-rc3/20121028162003/
Passing tests
-
Boot to userspace: 2420n800, 3517evm, 3530es3beagle,
On 10/30/2012 6:09 PM, Hiremath, Vaibhav wrote:
On Tue, Oct 30, 2012 at 17:17:00, Paul Walmsley wrote:
cc Vaibhav Hiremath
On Tue, 30 Oct 2012, Mark Jackson wrote:
At what point is booting from MMC on the BeagleBone going to start working ?
I only ask, since, by default, a new BeagleBone
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