On 05/27/2014 05:22 AM, Peter Ujfalusi wrote:
On 05/27/2014 12:32 AM, Olof Johansson wrote:
[..]
I came across this patch when I was looking at a pull request from
Sekhar for EDMA cleanups, and it made me look closer at the contents
of this file.
The include/linux/platform_data/ directory
On 05/15/2014 07:48 AM, Sekhar Nori wrote:
On Thursday 15 May 2014 06:00 PM, Peter Ujfalusi wrote:
The second controller is not handled because in DT boot we only handle 1 cc
as
far as I know. I don't know why, but this is how the DT support has been
written and used.
Its just because
with DT or the queue_priority_mapping is not provided
set up a default priority map.
Thanks.
Acked-by: Joel Fernandes jo...@ti.com
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 115
+++--
1 file changed, 73
Hi Nishanth,
On 05/09/2014 07:54 AM, Nishanth Menon wrote:
[..]
Yep - thanks Santosh for clarifying this. Now, we still have the
issues that I pointed out in [1] - without resolving which, we should
not enable crossbar for dra74x/72x.
A. taking example of PMU
interrupts = GIC_SPI 131
On 05/09/2014 08:36 AM, Joel Fernandes wrote:
Hi Nishanth,
On 05/09/2014 07:54 AM, Nishanth Menon wrote:
[..]
Yep - thanks Santosh for clarifying this. Now, we still have the
issues that I pointed out in [1] - without resolving which, we should
not enable crossbar for dra74x/72x
On 05/09/2014 08:27 AM, Santosh Shilimkar wrote:
On Friday 09 May 2014 08:54 AM, Nishanth Menon wrote:
On 05/08/2014 11:22 PM, Joel Fernandes wrote:
On Thu, May 8, 2014 at 7:25 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
[...]
Ok, thanks for pointing to the post.
Yep - thanks
On 05/09/2014 09:00 AM, Nishanth Menon wrote:
On 05/09/2014 08:45 AM, Santosh Shilimkar wrote:
On Friday 09 May 2014 09:36 AM, Nishanth Menon wrote:
On 05/09/2014 08:27 AM, Santosh Shilimkar wrote:
On Friday 09 May 2014 08:54 AM, Nishanth Menon wrote:
On 05/08/2014 11:22 PM, Joel Fernandes
On 05/05/2014 09:18 AM, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Just wondering,
On Thu, May 8, 2014 at 3:37 PM, Nishanth Menon n...@ti.com wrote:
On 14:24-20140508, Joel Fernandes wrote:
On 05/05/2014 09:18 AM, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior
On Thu, May 8, 2014 at 6:05 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
[..]
Further since not everything goes through the crossbar and some are
direct mapped like your diagram, the correct fix is probably making it
an irqchip and doing the interrupt controller parenting correctly in
On Thu, May 8, 2014 at 7:25 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
[..]
The concern was really not where the code resides but what the actual
hardware is and how can it fit into Linux. The whole reason I was
actually against irqhcip from beginning of crossbar series was the
On 05/07/2014 10:19 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
There is a platform specific hook just for OMAP1 to set its clk parent.
Remove
this hook and have OMAP1 set its parent in omap1_dm_timer_init. If OMAP1 is
ever migrated to clock framework
On 05/07/2014 10:20 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
This is at least a wrong comment, the original comment seems right
to me.
Can you elaborate a bit more please
On 05/07/2014 10:24 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print an error, let it
be checked there.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file
On 05/07/2014 10:25 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
Inorder to move non-DM timer specific code that modifies the idlect
mask on OMAP1, from dmtimer code, to OMAP1 specific timer initialization
code,
we introduce a new function that can possibly
On 05/07/2014 05:04 PM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140507 14:44]:
On 05/07/2014 10:19 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
There is a platform specific hook just for OMAP1 to set its clk parent.
Remove
this hook and have OMAP1 set
On 05/07/2014 10:20 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
This is at least a wrong comment, the original comment seems right
to me.
Ok, I've no issues dropping this patch
On 05/07/2014 05:10 PM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140507 14:53]:
On 05/07/2014 10:24 AM, Tony Lindgren wrote:
* Joel Fernandes jo...@ti.com [140424 14:44]:
The subsequent devm_ioremap_resource will catch it and print an error, let
it
be checked there.
Signed-off
On Wed, Apr 30, 2014 at 12:08 AM, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Apr 29, 2014 at 11:25:02PM -0500, Joel Fernandes wrote:
On 04/29/2014 03:46 AM, Vinod Koul wrote:
[..]
commit 770f0f3a20188b7e17db2790803b9da925dc0b94
Author: Thomas Gleixner t...@linutronix.de
Date: Mon
On Apr 29, 2014, at 2:17 AM, Dave Martin dave.mar...@arm.com wrote:
On Mon, Apr 28, 2014 at 06:21:49PM +0100, Joel Fernandes wrote:
On 04/28/2014 12:20 PM, Joel Fernandes wrote:
On 04/28/2014 11:43 AM, Dave Martin wrote:
On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote
Minor nit...
On 04/28/2014 02:40 AM, Andreas Fenkart wrote:
[..]
/* Do not initialize card-specific things if the power is off */
if (host-power_mode == MMC_POWER_OFF)
@@ -1117,8 +1138,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
*dev_id)
int status;
Minor nit...
On 04/28/2014 02:40 AM, Andreas Fenkart wrote:
[..]
/* Do not initialize card-specific things if the power is off */
if (host-power_mode == MMC_POWER_OFF)
@@ -1117,8 +1138,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
*dev_id)
int status;
Martin dave.mar...@arm.com
Cc: Dave Martin dave.mar...@arm.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Nishanth Menon n...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Joel Fernandes jo...@ti.com
---
Tony, the earlier patch went into your
On 04/29/2014 01:31 PM, Dave Martin wrote:
On Tue, Apr 29, 2014 at 05:36:30PM +0100, Joel Fernandes wrote:
[...]
Sorry what I meant is, say its of Type function. What tells the firmware
to switch to THUMB?
What's typically done is a boot address register is written by the
kernel
On 04/29/2014 03:46 AM, Vinod Koul wrote:
[..]
commit 770f0f3a20188b7e17db2790803b9da925dc0b94
Author: Thomas Gleixner t...@linutronix.de
Date: Mon Apr 28 10:49:43 2014 +
dmaengine: edma: Make reading the position of active channels work
As Joel pointed out,
On 04/26/2014 11:36 AM, Sergei Shtylyov wrote:
Hello.
On 26-04-2014 3:02, Joel Fernandes wrote:
DRA7xx SoCs have a DES3DES IP. Add DT data for the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
1 file changed, 11 insertions
On 04/28/2014 11:43 AM, Dave Martin wrote:
On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
seems to be because the CPU
On 04/28/2014 12:20 PM, Joel Fernandes wrote:
On 04/28/2014 11:43 AM, Dave Martin wrote:
On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU
transfers
Thanks,
tglx
Thanks for the series. I went over all the patches and it looks great.
Acked-by: Joel Fernandes jo...@ti.com
The patches however didn't apply and had some conflicts with my dma
memcpy series and peter's cyclic series so I resolved conflicts and
created a single
The granular residue accounting code uses certain variables specifically
for residue accounting. Document these in the structure declaration.
Also move around some elements and group them together.
Cc: Thomas Gleixner t...@linutronix.de
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma
edma param struct is now within an edma_pset struct introduced in Thomas
Gleixner's edma tx status series. Update memcpy function for the same.
Cc: Thomas Gleixner t...@linutronix.de
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c |4 ++--
1 file changed, 2 insertions(+), 2
are hwmod entries. The patches are rebased
on v3.15-rc2. and can pulled from the Git repo below:
https://github.com/joelagnel/linux-kernel.git (branch v3.16/prep-dts)
Joel Fernandes (9):
ARM: OMAP: hwmod: Add SYSC offsets for AES IP
ARM: DRA7xx: hwmod: Add hwmod data for DES IP
ARM: DRA7xx
DRA7xx SoCs have a DES3DES IP. Add DT data for the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1c0f8e1..0533b89 100644
Add the CLKCTRL offsets, SYSC offsets to the RNG module.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 35 +
1 file changed, 35 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2
DRA7 SoC has same AES IP as on OMAP4. Add DT entries for the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 0533b89..c45f7e9 100644
AES/DES nodes have clock nodes in the clock tree, use them. Internal trees were
using hwmod, but now that clock nodes are there, we can use them instead and
upstream it.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/boot/dts/omap4.dtsi |4
1 file changed, 4 insertions(+)
diff
The AES IP has the SIDLE offset by 2 and not 3, to allow SIDLE modes
to work for AES, we add a new SYSC type to HWMOD code.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.h | 11 +++
arch/arm/mach-omap2/omap_hwmod_common_data.c | 10
OMAP4 has a DES IP for DES and 3DES encryption, Add hwmod data for the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 35
1 file changed, 35 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b
Crypto modules AES0/1 belong to:
PD_L4_PER power domain
CD_L4_SEC clock domain
On the L3, the AES modules are mapped to
L3_CLK2: Peripherals and multimedia sub clock domain
We add hwmod data for the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2
From: Lokesh Vutla lokeshvu...@ti.com
DES IP already has main and interface clk as des_fck.
Node for des_fck is missing in clk tree. Adding the same.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/boot/dts/omap44xx-clocks.dtsi |8
dra7xx SoC has a DES module. Add the required data to hwmod.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 39 +
1 file changed, 39 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach
oh-name is no longer used, correct the error message.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4fcfd7a..519ccfd 100644
The subsequent devm_ioremap_resource will catch it and print an error, let it
be checked there.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index
Separate out legacy code for getting timer-fclk and reuse it for
the DT-case as a fallback. All DT users should ideally be specifying
a clock property with a phandle of its clock node. Till the migration
is complete, add a legacy function to keep things working.
Signed-off-by: Joel Fernandes jo
.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c |6 ++
arch/arm/plat-omap/dmtimer.c |2 +-
arch/arm/plat-omap/include/plat/dmtimer.h |6 --
3 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2
structure
either by the early boot code for the specific platforms, or by calling a
clk_get_rate once the timer is requested and prepared.
We're also using omap_dm_timer_{read,write}_reg functions instead of underscore
prefixed ones so that avoids passing of posted flags.
Signed-off-by: Joel Fernandes jo
patches to not do certain pm runtime checks
for !systimers.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 12 ++--
arch/arm/plat-omap/dmtimer.c | 11 ++-
arch/arm/plat-omap/include/plat/dmtimer.h|5
Fold this function back into omap_dm_timer_set_int_enable and
use the systimer flag to not call PM functions for system timer.
Then remove it from the header file, and convert users to use
omap_dm_timer_set_int_enable.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c
Timer availability can be checked with is_timer_available function. Move it
before omap_dm_timer_trigger and use it.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git
.
omap_dm_timer_init_regs
omap_dm_timer_enable_posted
omap_dm_timer_override_errata
omap_dm_timer_int_enable
All other functions in dmtimer.h have been either removed, or folded into other
similar
functions, and such users converted to use the one folded into.
Signed-off-by: Joel Fernandes jo
__omap_dm_timer_write_status is folded back into omap_dm_timer_write_status,
all users are converted to use it, and old API is removed. This works thanks to
the systimer flag just introduced in the series.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c
the system timer
code independent of the private functions which we're trying to eliminate so
that they can just use the public ones which we want to expose.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 17 +
arch/arm/plat-omap/dmtimer.c
For DT-booting platforms, use of_clk_get to get the fclk for system timers.
Separate out the legacy code for non-DT platform use.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm
Simplify the check for a timer availability in atleast 4 places by providing a
function to do the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/arm/plat-omap
load_start implies start, so it makes sense to set the ST bit in
__omap_dm_timer_load_start instead of callers.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c |6 +++---
arch/arm/plat-omap/dmtimer.c |1 -
arch/arm/plat-omap/include
on the timer ID
which should be same as pdev-id. This allows us to cleanly separate the timer
vs
non-timer bits and keep the timer bits in the dmtimer code.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 29 +
arch/arm/plat-omap
omap_timer_enable doesn't check return value, this can lead to nasty bus
errors. Add a check and report issues.
Tested-by: Joachim Eastwood manab...@gmail.com
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 62 +++--
arch/arm
While at it, also delete the old definition of the function in dmtimer.c code.
This completes the separation and removal of OMAP1 header dependency in dmtimer
code and removes references to MOD_CONF_CTRL registers in dmtimer.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap1
For the OMAPs, we're setting up only one clockevent and clocksource. Further,
for DT boot there's no easy way to get the timer name and currently this is
done in an ugly way by reading a hwmod entry. So let's just set it to a simpler
name like timer_clkev and timer_clksrc.
Signed-off-by: Joel
Once clock-parents or default-parent support for DT clocks is available,
we should use it to set clock parent and turn clk_set_parent into a NOOP.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/plat
Not all platforms currently will support of_clk_get on timer
because they may not have clock property in their DT nodes. Add
code to handle this case so that things are kept working. Finally
we can delete this code once all system timer nodes have a clock
property.
Signed-off-by: Joel Fernandes
cost for migration.
[1] https://lkml.org/lkml/2014/4/16/737
[2] http://www.kernelhub.org/?msg=453407p=2
Joel Fernandes (26):
ARM: OMAP: dmtimer: Remove setting of clk parent indirectly through
platform hook
ARM: OMAP: dmtimer: Add comments on OMAP1 clock framework
ARM: OMAP: dmtimer: Add
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap
Add a comment describing the state of system timer clock parenting. The code
following the comment should be deleted once all platforms can do DT boot, and
specially should not be executed for DT platforms once we can specify default
clock parents through DT.
Signed-off-by: Joel Fernandes jo
A common pattern in dmtimer code is to read the control reg, set and reset
certain bits, and write it back. We abstract this pattern and introduce a
new function to do so.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 63
There is a platform specific hook just for OMAP1 to set its clk parent. Remove
this hook and have OMAP1 set its parent in omap1_dm_timer_init. If OMAP1 is
ever migrated to clock framework, the correct way to do this would be through
clk_set_parent like other platforms.
Signed-off-by: Joel
to abstract
out the hwmod dependency for the same. This will help us move the generic
DT specific code out into drivers/clocksource/ later.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 31 ---
1 file changed, 16 insertions(+), 15 deletions
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/omap-headsmp.S |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-headsmp.S
b/arch/arm/mach-omap2/omap-headsmp.S
index 75e9295..1809dce 100644
--- a/arch/arm/mach-omap2/omap
...@arm.linux.org.uk
Cc: Nishanth Menon n...@ti.com
Cc: Tony Lindgren t...@atomide.com
Tested-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/omap-headsmp.S |8 ++--
1 file changed, 6 insertions(+), 2
On 04/22/2014 01:47 PM, Nishanth Menon wrote:
On Tue, Apr 22, 2014 at 1:31 PM, Joel Fernandes jo...@ti.com wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
Did you mean THUMB2? omap2plus_defconfig works today with
CONFIG_ARM_THUMB enabled..
ARM_THUMB
Separate out legacy code for getting timer-fclk and reuse it for
the DT-case as a fallback. All DT users should ideally be specifying
a clock property with a phandle of its clock node. Till the migration
is complete, add a legacy function to keep things working.
Signed-off-by: Joel Fernandes jo
In an effort to isolate the time power initialization for future purposes, add
a function to do the same. This primarily involves a hwmod lookup, setup and
enable.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 25 +
1 file changed, 25
For DT-booting platforms, use of_clk_get to get the fclk for system timers.
Separate out the legacy code for non-DT platform use.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm
/737
Joel Fernandes (8):
ARM: OMAP2+: timer: Add a powerup function
ARM: OMAP2+: timer: Simplify clock event/source name setting
ARM: OMAP2+: timer: Add comment on timer clk parenting
ARM: OMAP2+: timer: Remove hwmod look-up dependency for DT-boot
ARM: OMAP2+: timer: Use of_clk_get for DT
Add a comment describing the state of system timer clock parenting. The code
following the comment should be deleted once all platforms can do DT boot, and
specially should not be executed for DT platforms once we can specify default
clock parents through DT.
Signed-off-by: Joel Fernandes jo
Not all platforms currently will support of_clk_get on timer
because they may not have clock property in their DT nodes. Add
code to handle this case so that things are kept working. Finally
we can delete this code once all system timer nodes have a clock
property.
Signed-off-by: Joel Fernandes
to abstract
out the hwmod dependency for the same. This will help us move the generic
DT specific code out into drivers/clocksource/ later.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 33 +
1 file changed, 17 insertions(+), 16
For the OMAPs, we're setting up only one clockevent and clocksource. Further,
for DT boot there's no easy way to get the timer name and currently this is
done in an ugly way by reading a hwmod entry. So let's just set it to a simpler
name like timer_clkev and timer_clksrc.
Signed-off-by: Joel
oh-name is no longer used, correct the error message.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4fcfd7a..519ccfd 100644
On 04/19/2014 05:25 PM, Joachim Eastwood wrote:
Hello,
Playing around with an old OMAP pwm driver from NeilBrown. I get the
following warning:
[ 0.979522] omap-pwm omap-pwm.14: omap_dm_timer_set_load
[ 0.979553] [ cut here ]
[ 0.979583] WARNING: CPU: 0 PID: 0 at
On 04/21/2014 11:36 AM, Joel Fernandes wrote:
On 04/21/2014 10:57 AM, Joachim Eastwood wrote:
On 21 April 2014 17:40, Joel Fernandes jo...@ti.com wrote:
On 04/19/2014 05:25 PM, Joachim Eastwood wrote:
Hello,
Playing around with an old OMAP pwm driver from NeilBrown. I get the
following
Hi Vinod, Dan,
On 04/14/2014 06:41 AM, Peter Ujfalusi wrote:
Hi,
Changes since v2:
- Dropped patch 10 from v2 (simplify direction configuration...)
- Dropped the channel priority related patches since we are going to go via
different route for configuring the priority.
- Added ACK from
to use the dev pointer and added your Tested-by.
-Joel
8
From f2c5a92f42da56266cc4da1a15a1cea4b9dabb49 Mon Sep 17 00:00:00 2001
From: Joel Fernandes jo...@ti.com
Date: Mon, 21 Apr 2014 11:05:10 -0500
Subject: [PATCH] ARM: OMAP: dmtimer: Check return of pm_runtime_get_sync
On 04/18/2014 03:50 AM, Russell King - ARM Linux wrote:
On Thu, Apr 17, 2014 at 07:56:50PM -0500, Joel Fernandes wrote:
Free the vd (virt descriptor) after the callback is called. In EDMA driver
atleast which uses virt-dma, we make use of the desc during the callback and
if
its dangerously
We add DMA memcpy support to EDMA driver. Successful tests performed using
dmatest kernel module. Copy alignment is set to DMA_SLAVE_BUSWIDTH_4_BYTES and
users must ensure length is aligned so that copy is performed fully.
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 51
: Dan Williams dan.j.willi...@intel.com
Cc: Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/virt-dma.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/virt-dma.c b/drivers/dma/virt-dma.c
index 6f80432
On 04/16/2014 07:59 AM, Peter Ujfalusi wrote:
[..]
If the dma-priority is missing we should assume lowest priority (0).
The highest priority depends on the platform. For eDMA3 in AM335x it is
three
level. For designware controller you might have the range 0-8 as valid.
The question is how
changed, 83 insertions(+), 26 deletions(-)
I reviewed and tested all the patches in the new series to make sure it
doesn't break anything with non-cyclic users (MMC and Crypto).
Reviewed-and-Tested-by: Joel Fernandes jo...@ti.com
regards,
-Joel
--
To unsubscribe from this list: send the line
hasn't been tested so I welcome anyone with HW to test this.
Joel Fernandes (9):
ARM: OMAP: dmtimer: Remove setting of clk parent indirectly through
platform hook
ARM: OMAP: dmtimer: Add comments on OMAP1 clock framework
ARM: OMAP: dmtimer: Add note to set parent from DT
ARM: OMAP
OMAP1 doesn't support clock framework, add a comment where needed
and correct a FIXME.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap
load_start implies start, so it makes sense to set the ST bit in
__omap_dm_timer_load_start instead of callers.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c |6 +++---
arch/arm/plat-omap/dmtimer.c |1 -
arch/arm/plat-omap/include
The subsequent devm_ioremap_resource will catch it and print an error, let it
be checked there.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index
on the timer ID
which should be same as pdev-id. This allows us to cleanly separate the timer
vs
non-timer bits and keep the timer bits in the dmtimer code.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 29 +
arch/arm/plat-omap
While at it, also delete the old definition of the function in dmtimer.c code.
This completes the separation and removal of OMAP1 header dependency in dmtimer
code and removes references to MOD_CONF_CTRL registers in dmtimer.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap1
Simplify the check for a timer availability in atleast 4 places by providing a
function to do the same.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/arm/plat-omap
There is a platform specific hook just for OMAP1 to set its clk parent. Remove
this hook and have OMAP1 set its parent in omap1_dm_timer_init. If OMAP1 is
ever migrated to clock framework, the correct way to do this would be through
clk_set_parent like other platforms.
Signed-off-by: Joel
A common pattern in dmtimer code is to read the control reg, set and reset
certain bits, and write it back. We abstract this pattern and introduce a
new function to do so.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 63
Once clock-parents or default-parent support for DT clocks is available,
we should use it to set clock parent and turn clk_set_parent into a NOOP.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/plat-omap/dmtimer.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/plat
The vchan lock in edma_callback is acquired in hard interrupt context. As
interrupts are already disabled, there's no point in save/restoring interrupt
mask bit or cpsr flags.
Get rid of flags local variable and use spin_lock instead of spin_lock_irqsave.
Signed-off-by: Joel Fernandes jo
Nishanth,
On 04/14/2014 02:19 PM, Nishanth Menon wrote:
On 04/14/2014 02:15 PM, Joachim Eastwood wrote:
On 14 April 2014 15:38, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Saturday 12 April 2014 05:06 PM, Joachim Eastwood wrote:
Hi,
I getting the following error on Linus master
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