[PATCH v3 1/2] arm: dts: omap4+: Add DMM bindings

2013-10-10 Thread Archit Taneja
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.

Add documentation for the DMM bindings.

Originally worked on by Andy Gross andy...@gmail.com

Cc: Andy Gross andy...@gmail.com
Signed-off-by: Archit Taneja arc...@ti.com
---
 Documentation/devicetree/bindings/arm/omap/dmm.txt | 16 
 arch/arm/boot/dts/omap4.dtsi   |  7 +++
 arch/arm/boot/dts/omap5.dtsi   |  7 +++
 3 files changed, 30 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/omap/dmm.txt

diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt 
b/Documentation/devicetree/bindings/arm/omap/dmm.txt
new file mode 100644
index 000..6fc3d79
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/dmm.txt
@@ -0,0 +1,16 @@
+OMAP Dynamic Memory Manager (DMM) bindings
+
+Required properties:
+- compatible:  Must be ti,omap4-dmm for OMAP4 family
+   Must be ti,omap5-dmm for OMAP5 and DRA7x family
+- reg: Contains timer register address range (base address and length)
+- interrupts:  Contains interrupt information (source, etc) for the DMM IRQ
+- ti,hwmods:   Name of the hwmod associated to DMM, which is typically dmm
+
+Example:
+
+dmm@4e00 {
+   compatible = ti,omap4-dmm;
+   reg = 0x4e00 0x800;
+   ti,hwmods = dmm;
+};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..b6bf288 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -487,6 +487,13 @@
ti,hwmods = kbd;
};
 
+   dmm@4e00 {
+   compatible = ti,omap4-dmm;
+   reg = 0x4e00 0x800;
+   interrupts = 0 113 0x4;
+   ti,hwmods = dmm;
+   };
+
emif1: emif@4c00 {
compatible = ti,emif-4d;
reg = 0x4c00 0x100;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 7cdea1b..e405458 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -604,6 +604,13 @@
ti,hwmods = wd_timer2;
};
 
+   dmm@4e00 {
+   compatible = ti,omap5-dmm;
+   reg = 0x4e00 0x800;
+   interrupts = 0 113 0x4;
+   ti,hwmods = dmm;
+   };
+
emif1: emif@0x4c00 {
compatible  = ti,emif-4d5;
ti,hwmods   = emif1;
-- 
1.8.1.2

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Re: [PATCH v3 1/2] arm: dts: omap4+: Add DMM bindings

2013-10-10 Thread Mark Rutland
On Thu, Oct 10, 2013 at 07:36:33AM +0100, Archit Taneja wrote:
 Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
 only requires address and irq information.
 
 Add documentation for the DMM bindings.
 
 Originally worked on by Andy Gross andy...@gmail.com
 
 Cc: Andy Gross andy...@gmail.com
 Signed-off-by: Archit Taneja arc...@ti.com
 ---
  Documentation/devicetree/bindings/arm/omap/dmm.txt | 16 
  arch/arm/boot/dts/omap4.dtsi   |  7 +++
  arch/arm/boot/dts/omap5.dtsi   |  7 +++
  3 files changed, 30 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/arm/omap/dmm.txt
 
 diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt 
 b/Documentation/devicetree/bindings/arm/omap/dmm.txt
 new file mode 100644
 index 000..6fc3d79
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/arm/omap/dmm.txt
 @@ -0,0 +1,16 @@
 +OMAP Dynamic Memory Manager (DMM) bindings

Is there any documentation? A brief description of what this is would be
nice.

 +
 +Required properties:
 +- compatible:Must be ti,omap4-dmm for OMAP4 family
 + Must be ti,omap5-dmm for OMAP5 and DRA7x family

s/must be/should contain/

 +- reg:   Contains timer register address range (base address and 
 length)

Huh? What's a timer got to do with the DMM?

 +- interrupts:Contains interrupt information (source, etc) for the 
 DMM IRQ

Is there a single interrupt? If so:

- interrupts: Should contain an interrupt-specifier for the DMM IRQ.

Assuming the DMM IRQ is well defined. If there's a name for it in
documentation, using that's preferable. If a future revision may have
multiple interrupts, please use interrupt-names now to save us endless
pain in future.

Cheers,
Mark.
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Re: [PATCH v3 1/2] arm: dts: omap4+: Add DMM bindings

2013-10-10 Thread Archit Taneja

Hi,

On Thursday 10 October 2013 03:38 PM, Mark Rutland wrote:

On Thu, Oct 10, 2013 at 07:36:33AM +0100, Archit Taneja wrote:

Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.

Add documentation for the DMM bindings.

Originally worked on by Andy Gross andy...@gmail.com

Cc: Andy Gross andy...@gmail.com
Signed-off-by: Archit Taneja arc...@ti.com
---
  Documentation/devicetree/bindings/arm/omap/dmm.txt | 16 
  arch/arm/boot/dts/omap4.dtsi   |  7 +++
  arch/arm/boot/dts/omap5.dtsi   |  7 +++
  3 files changed, 30 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/arm/omap/dmm.txt

diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt 
b/Documentation/devicetree/bindings/arm/omap/dmm.txt
new file mode 100644
index 000..6fc3d79
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/dmm.txt
@@ -0,0 +1,16 @@
+OMAP Dynamic Memory Manager (DMM) bindings


Is there any documentation? A brief description of what this is would be
nice.


I'll do that.




+
+Required properties:
+- compatible:  Must be ti,omap4-dmm for OMAP4 family
+   Must be ti,omap5-dmm for OMAP5 and DRA7x family


s/must be/should contain/


+- reg: Contains timer register address range (base address and length)


Huh? What's a timer got to do with the DMM?


Err, my mistake!




+- interrupts:  Contains interrupt information (source, etc) for the DMM IRQ


Is there a single interrupt? If so:

- interrupts: Should contain an interrupt-specifier for the DMM IRQ.


Okay.



Assuming the DMM IRQ is well defined. If there's a name for it in
documentation, using that's preferable. If a future revision may have
multiple interrupts, please use interrupt-names now to save us endless
pain in future.


The IRQ is called DMM_IRQ in the documentation. I don't think there 
would be more than one interrupt line from this IP. I'll still cross check.


Thanks,
Archit

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