On Tue, Dec 01, 2015 at 12:03:12PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris Brezillon
On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
> >>
> >> Please just drop the /bits/ 16 and use normal cells.
> >
> > Yeah agreed, makes things less confusing for sure
>
> 4.4 will be the first kernel where we will have the new eDMA
Hi Bjorn,
Am Montag, den 07.12.2015, 21:33 -0600 schrieb Bjorn Helgaas:
> [+cc Jingoo (exynos), Richard, Lucas (imx6), Pratyush (spear13xx)]
>
> On Fri, Dec 04, 2015 at 11:22:50PM +0200, Grygorii Strashko wrote:
> > On 12/04/2015 08:46 PM, Bjorn Helgaas wrote:
> > > Hi Grygorii,
[...]
> > >>
On Tue, Dec 01, 2015 at 12:03:15PM +0100, Boris Brezillon wrote:
> mtd_to_nand() now uses the container_of() approach to transform an
> mtd_info pointer into a nand_chip one. Drop useless mtd->priv
> assignments from NAND controller drivers.
>
> Signed-off-by: Boris Brezillon
* Bjorn Helgaas | 2015-12-04 12:46:19 [-0600]:
>The backtrace might be OK (maybe slightly overkill), but all the
>stack addresses are certainly irrelevant and distracting. We only
>need enough to recognize the problem. I don't think the modules list
>is relevant either.
I would shorten it to
On 8 December 2015 at 01:32, Tony Lindgren wrote:
> * Ulf Hansson [151207 16:20]:
>> +Linus
>>
>> On 7 December 2015 at 23:54, Tony Lindgren wrote:
>> > Commit ce037275861e ("mmc: pwrseq_simple: use GPIO descriptors array API")
>> >
On 12/03/2015 05:46 PM, Peter Ujfalusi wrote:
> On 12/03/2015 05:38 PM, Arnd Bergmann wrote:
>> On Thursday 03 December 2015 16:33:12 Peter Ujfalusi wrote:
>>> diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
>>> index 0675e268d577..46b305ea0d21 100644
>>> --- a/drivers/dma/edma.c
>>> +++
On 12/08/2015 11:51 AM, Arnd Bergmann wrote:
> On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
>> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
Please just drop the /bits/ 16 and use normal cells.
>>>
>>> Yeah agreed, makes things less confusing for sure
>>
>> 4.4 will be the
On Tuesday 08 December 2015 12:22:09 Peter Ujfalusi wrote:
> On 12/08/2015 11:51 AM, Arnd Bergmann wrote:
> > On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
> >> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
>
> Please just drop the /bits/ 16 and use normal cells.
> >>>
> >>>
Under some conditions, irq sorting procedure used
by INTC can go wrong resulting in a spurious irq
getting reported.
If this condition is not handled, it results in
endless stream of:
unexpected IRQ trap at vector 00
messages from ack_bad_irq()
Handle the spurious interrupt condition in
Hi,
Sekhar Nori writes:
> Under some conditions, irq sorting procedure used
> by INTC can go wrong resulting in a spurious irq
> getting reported.
>
> If this condition is not handled, it results in
> endless stream of:
>
> unexpected IRQ trap at vector 00
>
> messages from
When CONFIG_LPAE is set on ARM, resource_size_t is 64-bit wide
and we get a warning about an incorrect format string for printing
the interrupt number in elm_probe:
drivers/mtd/nand/omap_elm.c: In function 'elm_probe':
drivers/mtd/nand/omap_elm.c:417:23: warning: format '%i' expects argument of
* Arnd Bergmann [151208 02:26]:
> On Tuesday 08 December 2015 12:22:09 Peter Ujfalusi wrote:
> > On 12/08/2015 11:51 AM, Arnd Bergmann wrote:
> > > On Tuesday 08 December 2015 09:42:26 Peter Ujfalusi wrote:
> > >> On 12/04/2015 11:51 PM, Tony Lindgren wrote:
> >
> >
* ker...@iktek.de [151207 09:17]:
> Hi Tony,
>
> there are two ethernet interfaces ( dual-emac-configuration ) used.
> One is connected to another 100mbit switch-ic ( refclk should come from
> switch ic ) via rmii, the other one is connected to a 1gbit fpga rgmii
> interface (
* Ulf Hansson [151208 05:18]:
> On 8 December 2015 at 01:32, Tony Lindgren wrote:
> > * Ulf Hansson [151207 16:20]:
> >> +Linus
> >>
> >> On 7 December 2015 at 23:54, Tony Lindgren wrote:
> >> > Commit
* Tony Lindgren [151201 15:43]:
> The timer clock aliases are needed early on dm814x. Let's also
> add the aliases for the interconnects and MMC.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Tero Kristo
>
Hi,
Grygorii Strashko writes:
> ARM TWD and Global timer are clocked by PERIPHCLK which is MPU_CLK/2.
> But now they are clocked by dpll_mpu_m2_ck == MPU_CLK and, as result.
> Timekeeping core misbehaves. For example, execution of command
> "sleep 5" will take 10 sec
Hi Tony, Felipe, Tero,
On 12/03/2015 08:04 PM, Grygorii Strashko wrote:
On 12/03/2015 06:35 PM, Tony Lindgren wrote:
* Grygorii Strashko [151130 07:58]:
ARM TWD and Global timer are clocked by PERIPHCLK which is MPU_CLK/2.
But now they are clocked by dpll_mpu_m2_ck
On 12/08/2015 06:57 PM, Tony Lindgren wrote:
* Tony Lindgren [151201 15:43]:
The timer clock aliases are needed early on dm814x. Let's also
add the aliases for the interconnects and MMC.
Cc: Michael Turquette
Cc: Stephen Boyd
* Tero Kristo [151208 11:25]:
> On 12/08/2015 06:57 PM, Tony Lindgren wrote:
> >
> >Anybody from the clock department care to ack this one?
>
> Sorry been rather busy lately...
>
> >I'd like to
> >get this series into Linux next as it fixes some some issues.
>
> Yeah looks good
On 12/08/2015 10:11 PM, Tony Lindgren wrote:
* Tero Kristo [151208 11:25]:
On 12/08/2015 06:57 PM, Tony Lindgren wrote:
Anybody from the clock department care to ack this one?
Sorry been rather busy lately...
I'd like to
get this series into Linux next as it fixes some
Hi Boris,
On Wed, Dec 02, 2015 at 09:50:01AM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris
Hi,
On Tue, Dec 01, 2015 at 12:02:57PM +0100, Boris Brezillon wrote:
> Hello,
>
> This huge series aims at clarifying the relationship between the mtd and
> nand_chip structures and hiding NAND framework internals to NAND
> controller drivers.
>
> The first part of the series provide an
On Tue, Dec 8, 2015 at 2:53 PM, Lucas Stach wrote:
> Hi Bjorn,
>
> Am Montag, den 07.12.2015, 21:33 -0600 schrieb Bjorn Helgaas:
>> [+cc Jingoo (exynos), Richard, Lucas (imx6), Pratyush (spear13xx)]
>>
>> On Fri, Dec 04, 2015 at 11:22:50PM +0200, Grygorii Strashko wrote:
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