-Original Message-
From: Anand Gadiyar [mailto:gadi...@ti.com]
Sent: Saturday, January 29, 2011 2:19 AM
To: Sricharan R; linux-omap@vger.kernel.org
Cc: Santosh Shilimkar; t...@atomide.com; p...@pwsan.com
Subject: RE: [PATCH 1/5] omap2+: mux: Seperate the pads of a hwmod as
static
-Original Message-
From: Anand Gadiyar [mailto:gadi...@ti.com]
Sent: Saturday, January 29, 2011 2:23 AM
To: Sricharan R; linux-omap@vger.kernel.org
Cc: Santosh Shilimkar; t...@atomide.com; p...@pwsan.com
Subject: RE: [PATCH 4/5] omap4: board-omap4panda: Initialise the serial
pads
-Original Message-
From: Kevin Hilman [mailto:khil...@ti.com]
Sent: Wednesday, February 02, 2011 6:42 AM
To: sricharan
Cc: linux-omap@vger.kernel.org; santosh.shilim...@ti.com;
t...@atomide.com;
p...@pswan.com; gadi...@ti.com; b-cous...@ti.com
Subject: Re: [PATCH v2 4/5] omap4:
Hi Benoit,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Thursday, September 08, 2011 2:35 PM
To: Sricharan R
Subject: Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
Hi Sricharan,
On 9/8/2011 7:22 AM, Shilimkar, Santosh wrote:
From
[...]
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Thursday, September 08, 2011 2:35 PM
To: Sricharan R
Subject: Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
[...]
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2
Hi,
A kernel crash is observed on 3.1rc4 kernel when HIGHMEM is enabled and
kernel is booted with a NFS on omap4430sdp. The issue happens in the
below
scenario.
In file net/sunrpc/xprtsock.c,
static int xs_send_pagedata( xxx, struct xdr_buf *xdr, ..)
{
Hi Trond,
[]
1) In the above piece of code, the *ppage value from ops-
sendpage
function is finally passed on to Kmap by the lower level
code
to
get the virtual address of the page.
2) In some corner cases the value of *ppage pointer is NULL.
[..]
Can you please tell me what the mount options are for this setup?
I'm guessing you've got wsize=1024, in which case, can you please try
the following patch?
The mount options for nfs is rw.
Yes, in my setup wsize=1024 when the issue happened.
I tried your patch and I was not able to see
[..]
memblock_steal tries to reserve physical memory during boot.
When the requested size is not aligned on the section size
then, the remaining memory available for lowmem becomes
unaligned on the section boundary. There is a issue with this,
which is discussed in the thread below.
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Arno Steffen
Sent: Thursday, July 28, 2011 6:45 PM
To: linux-omap@vger.kernel.org
Subject: [Q] No message from Kernel (Howto start debug?)
Maybe you are so kind to give me a
-Original Message-
From: R Sricharan [mailto:r.sricha...@ti.com]
Sent: Thursday, May 10, 2012 10:37 PM
To: linux-omap@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org; santosh.shilim...@ti.com;
t...@atomide.com; b-cous...@ti.com; r.sricha...@ti.com; p...@pswan.com
Subject:
Hi Tony,
-Original Message-
From: R Sricharan [mailto:r.sricha...@ti.com]
Sent: Thursday, May 03, 2012 12:56 PM
To: linux-omap@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org; santosh.shilim...@ti.com;
t...@atomide.com; b-cous...@ti.com; r.sricha...@ti.com
Subject: [PATCH
Hi Paul,
On Thu, 10 May 2012, R Sricharan wrote:
Some prm and cm registers read/write and status functions
are built only for some custom OMAP2+ builds and are stubbed
in header files for other builds under ifdef statements.
But this results in adding new CONFIG_ARCH_OMAPXXX
checks
Vaibhav,
This patch adds new config flag SOC_HAS_OMAP2_SDRC to handle
sdrc,
so that we can reuse same function across omap2/3/4...
But what happens when a single kernel is built that has support
for an
SoC with an SDRC (OMAP4) and one that doesn't (AM33xx)?
As such
Hi Tony,
-Original Message-
From: sricharan [mailto:r.sricha...@ti.com]
Sent: Friday, January 28, 2011 10:38 AM
To: r.sricha...@ti.com; linux-omap@vger.kernel.org
Cc: santosh.shilim...@ti.com; t...@atomide.com; p...@pwsan.com
Subject: [PATCH 0/5] omap2+: mux: Add support for static and
Hi Archit,
Those control registers are not a part of the mux list.
So the mux framework does not support configuring them.
Only the pad mux registers are configured.
Thanks,
Sricharan
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
Hi Benoit,
-Original Message-
From: Cousson, Benoit [mailto:b-cous...@ti.com]
Sent: Monday, February 21, 2011 8:10 PM
To: Shilimkar, Santosh
Cc: linux-omap@vger.kernel.org; Balbi, Felipe; R, Sricharan
Subject: Re: [PATCH 4/6] omap4: hwmod_data: Add l3 errorlog data to hwmod
database.
Hi
Hi Benoit,
-Original Message-
From: Santosh Shilimkar [mailto:santosh.shilim...@ti.com]
Sent: Monday, February 21, 2011 7:16 PM
To: linux-omap@vger.kernel.org
Cc: ba...@ti.com; b-cous...@ti.com; r.sricha...@ti.com; Santosh Shilimkar
Subject: [PATCH 1/6] omap3: hwmod_data: Add l3 error log
Hi Benoit,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Wednesday, February 23, 2011 11:09 AM
To: Benoit Cousson; Santosh Shilimkar
Cc: 'linux-omap@vger.kernel.org'; Felipe Balbi
Subject: RE: [PATCH 4/6] omap4: hwmod_data: Add l3 errorlog data to hwmod
database
-Original Message-
From: Santosh Shilimkar [mailto:santosh.shilim...@ti.com]
Sent: Monday, February 21, 2011 7:16 PM
To: linux-omap@vger.kernel.org
Cc: ba...@ti.com; b-cous...@ti.com; r.sricha...@ti.com; Santosh Shilimkar
Subject: [PATCH 1/6] omap3: hwmod_data: Add l3 error log data to
Hi Benoit,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Wednesday, February 23, 2011 11:09 AM
To: Benoit Cousson; Santosh Shilimkar
Cc: 'linux-omap@vger.kernel.org'; Felipe Balbi
Subject: RE: [PATCH 4/6] omap4: hwmod_data: Add l3 errorlog data to hwmod
database
Hi paul,
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Santosh Shilimkar
Sent: Monday, January 17, 2011 10:09 PM
To: Paul Walmsley
Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
Subject: RE: [PATCH]
Hi Tony,
From: Tony Lindgren t...@atomide.com
Date: Tue, 22 Feb 2011 16:05:15 -0800
Subject: [PATCH] omap2+: Add separate list for dynamic pads to mux
This avoids going through the list unnecessarily when
idling devices for runtime PM.
Based on an earlier patch by sricharan r.sricha...@ti.com.
Hi Tony,
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, February 24, 2011 12:20 AM
To: sricharan
Cc: linux-omap@vger.kernel.org; santosh.shilim...@ti.com; p...@pwsan.com
Subject: Re: [PATCH 2/5] omap4: board-4430sdp: Initialise the serial pads
* sricharan
Hi Tony,
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, February 24, 2011 12:20 AM
To: sricharan
Cc: linux-omap@vger.kernel.org; santosh.shilim...@ti.com; p...@pwsan.com
Subject: Re: [PATCH 5/5] omap2+: board-n8x0: Change the flags for the
serial pads.
*
Hi Tony,
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, February 24, 2011 12:20 AM
To: sricharan
Cc: linux-omap@vger.kernel.org; santosh.shilim...@ti.com; p...@pwsan.com
Subject: Re: [PATCH 4/5] omap4: board-omap4panda: Initialise the serial
pads
*
Hi,
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 755f4aa..530e9e3 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -44,6 +44,15 @@
static int omap_uart_con_id __initdata = -1;
+static struct omap_uart_port_info
Hi,
-Original Message-
From: Govindraj [mailto:govindraj...@gmail.com]
Sent: Wednesday, March 02, 2011 1:11 PM
To: Sricharan R
Cc: Govindraj.R; linux-omap@vger.kernel.org;
linux-ser...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org; Jon Hunter; Tony Lindgren; Benoit
Cousson; Kevin
Hi,
-Original Message-
From: Govindraj [mailto:govindraj...@gmail.com]
Sent: Wednesday, March 02, 2011 3:37 PM
To: Sricharan R
Cc: Govindraj.R; linux-omap@vger.kernel.org;
linux-ser...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org; Jon Hunter; Tony Lindgren; Benoit
Cousson; Kevin
Hi Tony,
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Friday, March 04, 2011 11:13 PM
To: Sricharan R
Cc: linux-omap@vger.kernel.org; Benoit Cousson; p...@pswan.com; Santosh
Shilimkar
Subject: Re: [PATCH] omap2+: mux: Initialise the static pads.
* Sricharan R
Tony,
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Tuesday, March 08, 2011 10:11 PM
To: sricharan
Cc: linux-omap@vger.kernel.org; b-cous...@ti.com;
santosh.shilim...@ti.com;
p...@pswan.com
Subject: Re:
Tony,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Wednesday, March 09, 2011 1:19 PM
To: 'Tony Lindgren'
Cc: 'linux-omap@vger.kernel.org'; Benoit Cousson; Santosh Shilimkar;
'p...@pswan.com'; 'linux-arm-ker...@lists.infradead.org'
Subject: RE: [PATCH] omap2+: mux
Tony,
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Thursday, March 10, 2011 2:02 AM
To: Sricharan R
Cc: linux-omap@vger.kernel.org; Benoit Cousson; Santosh Shilimkar;
p...@pswan.com; linux-arm-ker...@lists.infradead.org
Subject: [PATCH] omap2+: mux: Add macro
Tony,
Look OK to me, but let's make things a bit easier to read
and maintain with the following patch. Can you please
update your patches to use this macro?
Each line then just becomes something like:
OMAP_MUX_STATIC(uart3_tx_irtx.uart3_tx_irtx,
OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
This enables the fixes for the below erratas
applicable for OMAP4 Socs.
754322: Faulty MMU translations following ASID switch
775420: A data cache maintenance operation which aborts,
followed by an ISB, without any DSB in-between,
might lead to deadlock
Signed-off-by: Sricharan
-uevm: Add LED support for uEVM blue LED
Roger Quadros (1):
ARM: dts: omap5-uevm: Add USB Host support
Sourav Poddar (1):
ARM: dts: omap5-uevm: Add uart pinctrl data
Sricharan R (1):
ARM: dts: omap5: Rename omap5-evm to omap5-uevm
arch/arm/boot/dts/Makefile |2 +-
arch/arm/boot
sourav.pod...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
[Sricharan R r.sricha...@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts | 41 ++
1 file changed, 41
From: Dan Murphy dmur...@ti.com
Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.
Cc: Dan Murphy dmur...@ti.com
Signed-off-by: Dan Murphy dmur...@ti.com
[Sricharan R r.sricha...@ti.com: Replaced constants with preprocessor macros]
Signed
From: Roger Quadros rog...@ti.com
Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.
Also provide pin multiplexer information for the USB host
pins.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
[Sricharan R r.sricha
is used in the uevm. Neither DVFS or temperature
polling is supported with DDR3. So remove the DDR3 device and
emif nodes.
* Keypad is not supported on uevm. So remove the device node.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/Makefile |2 +-
arch/arm/boot
On Wednesday 05 June 2013 12:16 PM, Sricharan R wrote:
The uevm is the official board supported for the OMAP5 soc
in mainline. The uevm has an OMAP5432 with a DDR3 memory.
Renaming the board dts file and adding the following cleanups.
* There are no devices connected on I2C 2,3,4 buses. So
is used in the uevm. Neither DVFS or temperature
polling is supported with DDR3. So remove the DDR3 device and
emif nodes.
* Keypad is not supported on uevm. So remove the device node.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/Makefile |2
Hi,
On Wednesday 05 June 2013 01:29 PM, Florian Vaussard wrote:
Hello,
Some very minor comments.
On 06/05/2013 08:46 AM, Sricharan R wrote:
From: Roger Quadros rog...@ti.com
Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.
Also provide pin
Hi Roger,
On Wednesday 05 June 2013 04:02 PM, Roger Quadros wrote:
Hi Sricharan,
Thanks for sending this, but some parts are outdated. See below.
On 06/05/2013 09:46 AM, Sricharan R wrote:
From: Roger Quadros rog...@ti.com
Provide the RESET regulators for the USB PHYs, the USB Host
port
From: Dan Murphy dmur...@ti.com
Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.
Cc: Dan Murphy dmur...@ti.com
Signed-off-by: Dan Murphy dmur...@ti.com
[Sricharan R r.sricha...@ti.com: Replaced constants with preprocessor macros]
Signed
sourav.pod...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
[Sricharan R r.sricha...@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V2] Removed the redundant comments
arch/arm/boot/dts/omap5-uevm.dts | 41
-uevm: Add LED support for uEVM blue LED
Roger Quadros (1):
ARM: dts: omap5-uevm: Add USB Host support
Sourav Poddar (1):
ARM: dts: omap5-uevm: Add uart pinctrl data
Sricharan R (1):
ARM: dts: omap5: Rename omap5-evm to omap5-uevm
arch/arm/boot/dts/Makefile |2 +-
arch/arm/boot
is used in the uevm. Neither DVFS or temperature
polling is supported with DDR3. So remove the DDR3 device and
emif nodes.
* Keypad is not supported on uevm. So remove the device node.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/Makefile |2
From: Roger Quadros rog...@ti.com
Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.
Also provide pin multiplexer information for the USB host
pins.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
[Sricharan R r.sricha
Hi,
On Wednesday 05 June 2013 07:27 PM, Nishanth Menon wrote:
On 12:16-20130605, Sricharan R wrote:
From: Roger Quadros rog...@ti.com
[...]
diff --git a/arch/arm/boot/dts/omap5-uevm.dts
b/arch/arm/boot/dts/omap5-uevm.dts
index 843a001..cf862df 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
Hi,
On Wednesday 05 June 2013 10:34 PM, Dan Murphy wrote:
Sricharan
Thanks for sending this up in the series.
On 06/05/2013 01:46 AM, Sricharan R wrote:
From: Dan Murphy dmur...@ti.com
Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO
On Friday 07 June 2013 12:00 AM, Santosh Shilimkar wrote:
On Thursday 06 June 2013 01:57 PM, Paul Walmsley wrote:
On Wed, 29 May 2013, Santosh Shilimkar wrote:
From: Sricharan R r.sricha...@ti.com
- The IO resource information like dma request lines, irq number and
ocp address space can
On Friday 07 June 2013 12:16 AM, Nishanth Menon wrote:
On 23:21-20130606, Sricharan R wrote:
Hi,
On Wednesday 05 June 2013 07:27 PM, Nishanth Menon wrote:
On 12:16-20130605, Sricharan R wrote:
From: Roger Quadros rog...@ti.com
[...]
diff --git a/arch/arm/boot/dts/omap5-uevm.dts
b/arch/arm
On Friday 07 June 2013 01:22 PM, Paul Walmsley wrote:
cc Benoît
On Fri, 7 Jun 2013, Sricharan R wrote:
I used autogen to remove the data, but some of the data were not in sync
with the mainline .(like abe, dss, aess, context register offsets etc..).
So i have to sync them manually.
OK
On Friday 07 June 2013 03:20 PM, Paul Walmsley wrote:
On Fri, 7 Jun 2013, Tero Kristo wrote:
On Fri, 2013-06-07 at 14:31 +0530, Sricharan R wrote:
On Friday 07 June 2013 01:22 PM, Paul Walmsley wrote:
cc Benoît
On Fri, 7 Jun 2013, Sricharan R wrote:
I used autogen to remove the data
Hi Benoit,
On Friday 07 June 2013 04:13 PM, Benoit Cousson wrote:
Hi Sricharan,
On 06/07/2013 12:27 PM, Sricharan R wrote:
- The IO resource information like dma request lines, irq number and
ocp address space can be populated via dt blob. So such data is stripped
from OMAP4 SOC hwmod
is not supported. Hence the emif kernel driver is not required,
so removing the DDR3 device file and emif nodes for uevm.
* Keypad is not supported on uevm. So remove the device node.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] Rebased on top of Benoit's latest tip and improved
sourav.pod...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
[Sricharan R r.sricha...@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts | 41 ++
1 file changed, 41
: out_of_tree/omap5_clk_data
Dan Murphy (1):
ARM: dts: omap5-uevm: Add LED support for uEVM blue LED
Roger Quadros (1):
ARM: dts: omap5-uevm: Add USB Host support
Sourav Poddar (1):
ARM: dts: omap5-uevm: Add uart pinctrl data
Sricharan R (1):
ARM: dts: omap5: Make uevm as the official board
From: Roger Quadros rog...@ti.com
Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.
Also provide pin multiplexer information for the USB host
pins.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
[Sricharan R r.sricha
From: Dan Murphy dmur...@ti.com
Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.
Cc: Dan Murphy dmur...@ti.com
Signed-off-by: Dan Murphy dmur...@ti.com
[Sricharan R r.sricha...@ti.com: Replaced constants with preprocessor macros]
Signed
On Friday 07 June 2013 05:36 PM, Benoit Cousson wrote:
On 06/06/2013 07:48 PM, Sricharan R wrote:
uevm is the official board supported for OMAP5 soc in the mainline.
This series renames the board dts file for OMAP5 accordingly and cleans
up the same. Also a few additional device DT entry
On Friday 07 June 2013 05:33 PM, Benoit Cousson wrote:
Hi Sricharan,
On 06/06/2013 07:48 PM, Sricharan R wrote:
The uevm is the official board supported for the OMAP5 soc
in mainline. The uevm has an OMAP5432 with a DDR3 memory.
Renaming the board dts file and adding the following cleanups
On Friday 07 June 2013 08:21 PM, Benoit Cousson wrote:
Thanks for the quick update.
I've just applied the series in my for_3.11/dts branch.
Thanks..
Regards,
Sricharan
Regards,
Benoit
On 06/07/2013 03:22 PM, Sricharan R wrote:
uevm is the only official board supported for OMAP5 soc
McSPI driver probe will abort for DT case because of failed
platform_get_resource_byname() lookup. Fix it by skipping resource
byname lookup for device tree build.
Issue comes out when dma entries are removed from the hwmod data.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/spi/spi
Walmsley p...@pwsan.com [130607 05:38]:
On Fri, 7 Jun 2013, Sricharan R wrote:
- The IO resource information like dma request lines, irq number and
ocp address space can be populated via dt blob. So such data is
stripped
from OMAP4 SOC hwmod data file.
- The devices which are still missing
entries [1], irq can be safely removed.
[1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg90115.html
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 54
1 file changed, 54 deletions(-)
diff --git a/arch/arm
Hi Tony,
On Wednesday 12 June 2013 10:44 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [130612 09:37]:
* Ming Lei tom.leim...@gmail.com [130603 08:34]:
Hi,
On Sat, May 18, 2013 at 3:17 AM, Tony Lindgren t...@atomide.com wrote:
We can now boot with device tree. If you don't want
On Thursday 13 June 2013 02:51 PM, Sricharan R wrote:
Hi Tony,
On Wednesday 12 June 2013 10:44 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [130612 09:37]:
* Ming Lei tom.leim...@gmail.com [130603 08:34]:
Hi,
On Sat, May 18, 2013 at 3:17 AM, Tony Lindgren t...@atomide.com wrote
On Friday 14 June 2013 07:28 PM, Ming Lei wrote:
On Fri, Jun 14, 2013 at 9:31 PM, Ming Lei tom.leim...@gmail.com wrote:
On Thu, Jun 13, 2013 at 6:12 PM, Sricharan R r.sricha...@ti.com wrote:
On Thursday 13 June 2013 02:51 PM, Sricharan R wrote:
Hi Tony,
On Wednesday 12 June 2013 10:44 PM
Hi,
On Tuesday 18 June 2013 08:14 PM, Santosh Shilimkar wrote:
On Tuesday 18 June 2013 04:24 AM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130612 14:14]:
Add ramdisk fileystem related options which lets OMAP5 and Keystone
SOCs to boot till shell with multi_v7_config.
On Monday 24 June 2013 08:03 PM, Sricharan R wrote:
Hi,
On Tuesday 18 June 2013 08:14 PM, Santosh Shilimkar wrote:
On Tuesday 18 June 2013 04:24 AM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130612 14:14]:
Add ramdisk fileystem related options which lets OMAP5
On Sunday 14 July 2013 05:37 PM, Kevin Hilman wrote:
On 07/09/2013 08:27 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
DRA7xx has 8 GPIO banks so that there are 32x8 = 256 GPIOs.
In order for the gpiolib to detect and initialize these
additional GPIOs and other TWL GPIOs,
of the basic DRA support from Rajendra [1][2]
[1] http://comments.gmane.org/gmane.linux.ports.arm.omap/100763
[2] http://comments.gmane.org/gmane.linux.ports.arm.omap/100773
Sricharan R (3):
misc: Add crossbar driver
ARM: dts: DRA: Add crossbar device binding
ARM: DRA: Enable crossbar driver
peripherals are
added with the crossbar nodes here.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a5d9350..e6208b4 100644
Enable the crossbar driver to handle the irq/dma
crossbar devices in the soc.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 80aaadc..3def350
the crossbar device's probe. The mappings can also be specified by adding
the crossbar lines to the peripheral device nodes and map it with
crossbar_map/unmap apis.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 24 ++
drivers/misc/Kconfig
On Friday 19 July 2013 12:47 PM, Tony Lindgren wrote:
On Thursday 18 July 2013 02:56 PM, Nishanth Menon wrote:
Since the cross-bar is not limited t0 IRQ lines and applicable for
DMA request lines as well, making it IRQ chip doesn't make sense. Its
not typical pin control functionality either
Hi,
On Friday 19 July 2013 05:43 AM, Nishanth Menon wrote:
On Thu, Jul 18, 2013 at 6:39 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Thursday 18 July 2013 02:56 PM, Nishanth Menon wrote:
On 07/18/2013 11:43 AM, Sricharan R wrote:
Some socs have a large number of interrupts/dma
Hi Linus,
On Sunday 21 July 2013 10:19 PM, Linus Walleij wrote:
On Thu, Jul 18, 2013 at 8:56 PM, Nishanth Menon n...@ti.com wrote:
I carry forward my TI internal objection to this approach:
It is actually a very good sign of FOSS-maturity that you as a company
take unresolved architectural
On Wednesday 24 July 2013 10:17 PM, Nishanth Menon wrote:
On 07/24/2013 11:38 AM, Santosh Shilimkar wrote:
On Wednesday 24 July 2013 12:08 PM, Nishanth Menon wrote:
That said, maybe a intermediate pinctrl approach might be more pragmatic
and less theoretically flexible.
an option might be
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x() is_omap543x()
#endif
+# if defined(CONFIG_SOC_DRA7XX)
+# undef soc_is_dra7xx
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430
Hi,
On Tuesday 30 July 2013 09:02 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 08:06:31PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi
Hi Tony,
On Tuesday 13 August 2013 01:40 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130724 12:06]:
On Wednesday 24 July 2013 02:51 PM, Nishanth Menon wrote:
On 07/24/2013 01:43 PM, Sricharan R wrote:
On Wednesday 24 July 2013 10:17 PM, Nishanth Menon wrote:
On 07
Hi Linus,
On Thursday 22 August 2013 02:40 AM, Linus Walleij wrote:
On Thu, Aug 15, 2013 at 11:14 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Thursday 15 August 2013 04:51 PM, Linus Walleij wrote:
(...)
Sorry I don't understand what thread that is... can you point me there?
My
Hi,
On Friday 23 August 2013 10:17 AM, Rajendra Nayak wrote:
On Thursday 22 August 2013 05:03 PM, Sricharan R wrote:
maps crossbar number- to interrupt number and
calls request_irq(int_no, crossbar_handler,..)
So will this mapping happen based on some data passed from DT or
just based
On Friday 23 August 2013 12:06 PM, Sekhar Nori wrote:
On Friday 23 August 2013 11:41 AM, Sricharan R wrote:
Hi,
On Friday 23 August 2013 10:17 AM, Rajendra Nayak wrote:
On Thursday 22 August 2013 05:03 PM, Sricharan R wrote:
maps crossbar number- to interrupt number and
calls request_irq
one
controller's input line. This models the crossbar as an interrupt
controller. This a cascaded irqchip where the peripheral interrupt
lines are connected to the crossbar and the crossbar's outputs
are in turn connected to the GIC.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot
.
Sricharan R (4):
DRIVERS: IRQCHIP: Add crossbar irqchip driver
ARM: DTS: DRA: Add crossbar device binding
ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar
inputs.
ARM: DRA: Kconfig: Enable crossbar irqchip driver for DRA7xx
.../devicetree/bindings/arm/omap/irq
Enable the crossbar irqchip driver for DRA7xx soc.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 8413252..b602168 100644
--- a/arch/arm/mach
-by: Sricharan R r.sricha...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 88 +--
1 file changed, 44 insertions(+), 44 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index da977e1..2c541af 100644
--- a/arch/arm/boot/dts/dra7
...@atomide.com
Cc: Rajendra Nayak rna...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
There is lockdep warning during the boot. This is because we try to
do one request_irq with in another and that results in kmalloc being
called from an atomic context, which generates the warning.
Any
of this, the counter was getting wrongly
programmed for a sys-clk of 38.4Mhz(default). So adding the ratio
registers for 20MHZ sys-clk.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2/timer.c |4
1 file changed, 4
configuring this secure register for all the cpus here.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Marc Zyngier marc.zyng...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Sricharan R
Hi,
On Tuesday 17 September 2013 10:31 PM, Nishanth Menon wrote:
CNTFREQ isn't pre-programmed on DRA7 just like O5, so provide the
timer frequency via DT. Without a valid value arch_timer_init results
in div0 crash.
Cc: R Sricharan r.sricha...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc:
On Wednesday 18 September 2013 07:01 PM, Santosh Shilimkar wrote:
On Wednesday 18 September 2013 07:23 AM, Sricharan R wrote:
The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ per cpu register is used to denote
On Wednesday 18 September 2013 07:19 PM, Santosh Shilimkar wrote:
On Wednesday 18 September 2013 09:44 AM, Sricharan R wrote:
On Wednesday 18 September 2013 07:01 PM, Santosh Shilimkar wrote:
On Wednesday 18 September 2013 07:23 AM, Sricharan R wrote:
The realtime counter called master counter
Hi Thomas,
On Tuesday 17 September 2013 05:56 PM, Linus Walleij wrote:
On Fri, Sep 13, 2013 at 4:24 PM, Thomas Gleixner t...@linutronix.de wrote:
So why can't you make use of irq domains and have the whole routing
business implemented sanely?
What's needed is in gic_init_bases():
irq
On Wednesday 18 September 2013 07:22 PM, Sricharan R wrote:
Hi Thomas,
On Tuesday 17 September 2013 05:56 PM, Linus Walleij wrote:
On Fri, Sep 13, 2013 at 4:24 PM, Thomas Gleixner t...@linutronix.de wrote:
So why can't you make use of irq domains and have the whole routing
business
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