Hi Geert,
After rebasing this series on top of Simon's latest devel branch, I'm
experiencing hard system freezes when using the VSP.
What makes the problem curious is that PM runtime works fine when the VSP
instances are probed, the A3VP power domain is turned on and off correctly for
each
On Wednesday 24 February 2016 10:21:25 Simon Horman wrote:
> Renesas ARM Based SoC Updates for v4.6
>
> * Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
> * Move emev2_smp_ops to emev2
> * Remove legacy map_io callbacks on r8a7740 and emev2 SoCs
> * Migrate to generic l2c OF
On 02/14/2016 01:26 AM, Sergei Shtylyov wrote:
In the final versions of the Porter board (called "PORTER_C") Renesas
decided to get rid of the Maxim Integrated MAX3355 OTG chip and didn't
add any other provision to differ the host/gadget mode, so we'll have to
remove no longer valid
On Fri, Feb 26, 2016 at 5:38 PM, Ramesh Shanmugasundaram
wrote:
> Adds external CAN clock node for r8a7795. This clock can be used as
> fCAN clock of CAN and CAN FD controller.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
Adds external CAN clock node for r8a7795. This clock can be used as
fCAN clock of CAN and CAN FD controller.
Signed-off-by: Ramesh Shanmugasundaram
---
Thanks Geert for the comments. Added status property as discussed
here
Hi Geert,
On Friday 26 February 2016 16:41:27 Geert Uytterhoeven wrote:
> On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart wrote:
> >> drivers/soc/renesas/pm-rcar.c | 327
> >> 1 file changed, 327 insertions(+)
> >>
> >> diff --git
Hi Laurent,
On Mon, Feb 15, 2016 at 1:35 PM, Laurent Pinchart
wrote:
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
>> > @@ -0,0 +1,24 @@
>> > +Renesas R-Car Frame Compression Processor (FCP)
>> >
Hi Geert,
Thanks for the comments (https://lkml.org/lkml/2016/2/25/531).
Sorry. I assumed /* EtherAVB */ comment block identifies a set
& hence inserted above it.
Changes since v2:
* Inserted pin block in alphabetical order - this time correctly
Changes since v1:
* Inserted
On Thu, Feb 25, 2016 at 8:58 PM, Sergei Shtylyov
wrote:
> From: Andrey Gusakov
>
> GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values
> are listed instead of 4...
>
> [Sergei: fixed up the formatting,
Hi Ramesh,
On Fri, Feb 26, 2016 at 12:10 PM, Ramesh Shanmugasundaram
wrote:
> This patch adds CAN[0-1] pinmux support to r8a7795 SoC.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
Thanks for the update!
> ---
The VSP1 compositor code in DRM links against the respective V4L
driver, but the dependency is not expressed correctly in Kconfig,
which leads to a build error when the DRM driver is built-in
and the V4L driver is a module:
drivers/gpu/built-in.o: In function `rcar_du_vsp_plane_atomic_update':
This patch adds CANFD[0-1] pinmux support to r8a7795 SoC.
Signed-off-by: Ramesh Shanmugasundaram
---
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 37
1 file changed, 37 insertions(+)
diff --git
Hi Morimoto-san,
On Friday 12 February 2016 04:00:42 Laurent Pinchart wrote:
> The parent clock isn't documented in the datasheet, use S2D1 as a best
> guess for now.
Would you be able to find out what the parent clock is for the FCP and LVDS
(patch 2/9) clocks ?
Feel free to tell the
Hi Geert,
On 25 February 2016 08:05, Geert Uytterhoeven wrote:
> On Thu, Feb 25, 2016 at 1:45 AM, Simon Horman
> wrote:
> > Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.
> >
> > This is part of an ongoing process to migrate from ARCH_SHMOBILE to
> > ARCH_RENESAS
On Thu, Feb 25, 2016 at 5:48 PM, Ramesh Shanmugasundaram
wrote:
> This patch adds CAN[0-1] pinmux support to r8a7795 SoC.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
Reviewed-by: Geert Uytterhoeven
On Thu, Feb 25, 2016 at 6:05 PM, Ramesh Shanmugasundaram
wrote:
> Signed-off-by: Ramesh Shanmugasundaram
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Hi Tejun,
On Thu, Feb 25, 2016 at 10:42 PM, Tejun Heo wrote:
> On Thu, Feb 25, 2016 at 4:40 PM, Tejun Heo wrote:
>> Is this the problem fixed by the following patch from Harvey?
>>
>>
>>
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