On Thu, Sep 29, 2016 at 01:25:48AM +0300, Sergei Shtylyov wrote:
> Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers.
> Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings.
Applied, thanks
--
~Vinod
On Thu, Sep 29, 2016 at 09:59:15PM +0200, Niklas Söderlund wrote:
> kbuild test robot reports:
>
>lib/dma-debug.c: In function 'debug_dma_map_resource':
> >> lib/dma-debug.c:1541:16: error: implicit declaration of function
> >> '__phys_to_pfn' [-Werror=implicit-function-declaration]
> en
Hello Jithin,
Could you please reply to e-mails instead of sending unrelated new e-mails, in
order to keep all mails related to the subject grouped in a single thread ?
--
Regards,
Laurent Pinchart
On 09/30/2016 11:38 AM, Geert Uytterhoeven wrote:
Renesas RZ/G SoC also have the SCIF, SCIFA, SCIFB, and HSCIF ports.
Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings along with
the RZ/G family bindings. The driver itself also needs to recognize
the latter binding for the SCIF ports,
On Fri, Sep 30, 2016 at 3:46 PM, Jithin T Raj wrote:
> I would like to give support to RGB LVDS BRIDGE RCAR E2
>
> I am attaching the patch file..can you please review it and let me know the
> status.is it correct or not?
Please don't attach patches, but inline them, so we can easily add re
hi,
I would like to give support to RGB LVDS BRIDGE RCAR E2
I am attaching the patch file..can you please review it and let me know the
status.is it correct or not?
Best Regards
Jithin T Raj
diff --git a/a/r8a7794-alt.dts b/b/r8a7779-marzen.dts
index 383ad79..b795da6 100644
---
On Friday 30 Sep 2016 15:00:59 Geert Uytterhoeven wrote:
> On Fri, Sep 30, 2016 at 2:40 PM, Laurent Pinchart wrote:
> >> --- a/arch/arm/boot/dts/r8a7793-gose.dts
> >> +++ b/arch/arm/boot/dts/r8a7793-gose.dts
> >> @@ -374,6 +374,11 @@
> >> groups = "audio_clk_a";
> >> fun
Hi,
This is my diff file,
diff --git a/a/r8a7794-alt.dts b/b/r8a7779-marzen.dts
index 383ad79..b795da6 100644
--- a/a/r8a7794-alt.dts
+++ b/b/r8a7779-marzen.dts
@@ -1,7 +1,8 @@
/*
- * Device Tree Source for the Alt board
+ * Device Tree Source for the Marzen board
*
- * Copyright (C) 2014 R
On Fri, Sep 30, 2016 at 2:40 PM, Laurent Pinchart
wrote:
>> --- a/arch/arm/boot/dts/r8a7793-gose.dts
>> +++ b/arch/arm/boot/dts/r8a7793-gose.dts
>> @@ -374,6 +374,11 @@
>> groups = "audio_clk_a";
>> function = "audio_clk";
>> };
>> +
>> + vin0_pins: vin0 {
>>
Hi Jithin,
On Friday 30 Sep 2016 11:38:09 Jithin T Raj wrote:
> Thank you so much for the information.
>
> Now i compared "arch/arm/boot/dts/r8a7779-marzen.dts" against
> "arch/arm/boot/dts/r8a7794-alt.dts" and modified r8a7794-alt.dts a little..
> also added "thc63lvdm87"in "drivers/gpu/d
Hi Ulrich,
Thank you for the patch.
On Friday 16 Sep 2016 15:09:35 Ulrich Hecht wrote:
> Signed-off-by: Ulrich Hecht
> ---
> arch/arm/boot/dts/r8a7793-gose.dts | 36 ++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7793-gose.dts
> b/ar
Hi Ulrich,
Thank you for the patch.
On Friday 16 Sep 2016 15:09:34 Ulrich Hecht wrote:
> Identical to the setup on Lager.
>
> Signed-off-by: Ulrich Hecht
> ---
> arch/arm/boot/dts/r8a7793-gose.dts | 41 +++
> 1 file changed, 41 insertions(+)
>
> diff --git a/ar
Thank you so much for the information.
Now i compared "arch/arm/boot/dts/r8a7779-marzen.dts" against
"arch/arm/boot/dts/r8a7794-alt.dts" and modified r8a7794-alt.dts a little..
also added "thc63lvdm87"in "drivers/gpu/drm/rcar-du/rcar_du_kms.c"..here i am
attaching the modified
r8a7794-a
Hi Ulrich,
On Friday 30 Sep 2016 13:55:50 Laurent Pinchart wrote:
> On Friday 16 Sep 2016 15:09:33 Ulrich Hecht wrote:
> > Signed-off-by: Ulrich Hecht
> > ---
> >
> > arch/arm/boot/dts/r8a7793.dtsi | 20
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/arch/arm/bo
Hi Ulrich,
Thanks for the patch.
On Friday 16 Sep 2016 15:09:33 Ulrich Hecht wrote:
> Signed-off-by: Ulrich Hecht
> ---
> arch/arm/boot/dts/r8a7793.dtsi | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dts
Hi Geert,
The issue you're seeing is due to a combination of commits
5f3bca0db8ac01a7
("ARM: shmobile: apmu: Add APMU DT support via Enable method") and
dc378795156d980c ("ARM: dts: r8a7790: Add APMU nodes").
When debug mode is enabled (SW8-4 = OFF), trying to boot secondary CPUs
may
lock up t
Hi Hiep,
On Fri, Sep 30, 2016 at 11:55 AM, Hiep Cao Minh wrote:
> On 09/29/2016 10:40 PM, Geert Uytterhoeven wrote:
>> On Thu, Sep 29, 2016 at 1:03 PM, Hiep Cao Minh
>> wrote:
>>> I'd like to report the issue of the CPU operation.
>>> We tested and found it on Lager board at linux-v4.8-rcx.
>>>
Hi Geert,
Thanks for your reply!
On 09/29/2016 10:40 PM, Geert Uytterhoeven wrote:
Hi Hiep,
On Thu, Sep 29, 2016 at 1:03 PM, Hiep Cao Minh wrote:
I'd like to report the issue of the CPU operation.
We tested and found it on Lager board at linux-v4.8-rcx.
The test procedure is the following:
Hi Jithin,
On Fri, Sep 30, 2016 at 10:46 AM, Jithin T Raj wrote:
>I have an (R-Car E2) RTPORC7794SEB00011S ALT Board with me ..On that I
> can see a "LVDS IF" Output at the back side..is it same as LVDS?then how
IF = Interface, so I assume yes ;-)
> can i make it work on that Board
As Lau
Hi,
I have an (R-Car E2) RTPORC7794SEB00011S ALT Board with me ..On that I can
see a "LVDS IF" Output at the back side..is it same as LVDS?then how can i make
it work on that Board
Best Regards
Jithin T Raj
Engineer - Transport Business Unit
Hi Sergei,
On Thu, Sep 29, 2016 at 11:37 PM, Sergei Shtylyov
wrote:
> Renesas RZ/G SoC also have the SCIF, SCIFA, SCIFB, and HSCIF ports.
> Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings along with
> the RZ/G family bindings. The driver itself also needs to recognize
> the latter bi
On Fri, Sep 30, 2016 at 12:32 AM, Sergei Shtylyov
wrote:
> Document the SK-RZG1M device tree bindings, listing it as a supported board.
>
> This allows to use checkpatch.pl to validate .dts files referring to the
> SK-RZG1M board.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeve
On Thu, Sep 29, 2016 at 11:25 PM, Sergei Shtylyov
wrote:
> Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt controllers.
> Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings.
>
> Signed-off-by: Sergei Shtylyov
Acked-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Hi PM posse!
On 23/09/16 15:27, Geert Uytterhoeven wrote:
> Hi Jon,
>
> On Fri, Sep 23, 2016 at 2:57 PM, Jon Hunter wrote:
>> On 21/09/16 15:57, Geert Uytterhoeven wrote:
>>> On Wed, Sep 21, 2016 at 4:37 PM, Jon Hunter wrote:
On 21/09/16 09:53, Geert Uytterhoeven wrote:
> On Tue, Sep 2
Hi Geert,
On Fri, Sep 30, 2016 at 4:20 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Fri, Sep 30, 2016 at 9:07 AM, Magnus Damm wrote:
>> On Fri, Sep 23, 2016 at 6:03 PM, Simon Horman wrote:
>>> On Fri, Sep 23, 2016 at 10:35:06AM +0200, Geert Uytterhoeven wrote:
And these are planned to
Hi Magnus,
On Fri, Sep 30, 2016 at 9:07 AM, Magnus Damm wrote:
> On Fri, Sep 23, 2016 at 6:03 PM, Simon Horman wrote:
>> On Fri, Sep 23, 2016 at 10:35:06AM +0200, Geert Uytterhoeven wrote:
>>> And these are planned to be removed again with Magnus'
>>> "devicetree: bindings: r8a73a4 and R-Car Gen
Hi Geert,
On Fri, Sep 30, 2016 at 4:09 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Fri, Sep 30, 2016 at 9:04 AM, Magnus Damm wrote:
>> On Tue, Sep 27, 2016 at 9:37 PM, Geert Uytterhoeven
>> wrote:
>>> On Mon, Aug 22, 2016 at 4:44 PM, Geert Uytterhoeven
>>> wrote:
This patch series i
Hi Magnus,
On Fri, Sep 30, 2016 at 9:04 AM, Magnus Damm wrote:
> On Tue, Sep 27, 2016 at 9:37 PM, Geert Uytterhoeven
> wrote:
>> On Mon, Aug 22, 2016 at 4:44 PM, Geert Uytterhoeven
>> wrote:
>>> This patch series is an attempt to allow booting secondary CPU cores on
>>> R-Car Gen2 when hardware
On Fri, Sep 23, 2016 at 6:03 PM, Simon Horman wrote:
> On Fri, Sep 23, 2016 at 10:35:06AM +0200, Geert Uytterhoeven wrote:
>> Hi Simon, Magnus,
>>
>> On Fri, Sep 23, 2016 at 10:20 AM, Simon Horman
>> wrote:
>> > This documents the SoC specific binding for the r8a779[34] SoCs.
>> > This is in keep
Hi Geert,
On Tue, Sep 27, 2016 at 9:37 PM, Geert Uytterhoeven
wrote:
> Hi Simon, Magnus,
>
> On Mon, Aug 22, 2016 at 4:44 PM, Geert Uytterhoeven
> wrote:
>> This patch series is an attempt to allow booting secondary CPU cores on
>> R-Car Gen2 when hardware debug mode is enabled. In this mode, re
30 matches
Mail list logo
