Re: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Chris, On Mon, Jan 23, 2017 at 8:58 PM, Chris Brandt wrote: > One difference between R-Car/RZG vs RZA is that there is no status bits for > the MSTP clocks. > This means even though you enable a clock by clearing the module-stop bit, > you're not really guaranteed

Re: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Chris, On Mon, Jan 23, 2017 at 8:58 PM, Chris Brandt wrote: > One difference between R-Car/RZG vs RZA is that there is no status bits for > the MSTP clocks. > This means even though you enable a clock by clearing the module-stop bit, > you're not really guaranteed

Re: [Lager(H2)-V4.10-rc2]: QSPI-FLASH: Warning message happened when writing a data file to SPI-FLASH

CC linux-mtd On Tue, Jan 24, 2017 at 7:34 AM, DongCV wrote: > Dear Michal, > Cc: Geert, > > I've tested the linux v4.10-rc2 for Gen2 Lager and found an issues when > writing data to SPI-FLASH with jffs2 format > > "root@linaro-naro:~# cp test.dat /mnt/media > [ 223.874078]

Re: [Lager(H2)-V4.10-rc2]: QSPI-FLASH: Warning message happened when writing a data file to SPI-FLASH

CC linux-mtd On Tue, Jan 24, 2017 at 7:34 AM, DongCV wrote: > Dear Michal, > Cc: Geert, > > I've tested the linux v4.10-rc2 for Gen2 Lager and found an issues when > writing data to SPI-FLASH with jffs2 format > > "root@linaro-naro:~# cp test.dat /mnt/media > [ 223.874078]

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

Hi Marek, On Tue, Jan 24, 2017 at 12:15 AM, Marek Vasut wrote: > On 01/23/2017 09:41 PM, Geert Uytterhoeven wrote: >> On Mon, Jan 23, 2017 at 8:56 PM, Marek Vasut wrote: >>> On 01/23/2017 06:08 PM, Rob Herring wrote: On Sat, Jan 21, 2017 at

[Lager(H2)-V4.10-rc2]: QSPI-FLASH: Warning message happened when writing a data file to SPI-FLASH

Dear Michal, Cc: Geert, I've tested the linux v4.10-rc2 for Gen2 Lager and found an issues when writing data to SPI-FLASH with jffs2 format "root@linaro-naro:~# cp test.dat /mnt/media [ 223.874078] [ cut here ] [ 223.888017] WARNING: CPU: 2 PID: 2008 at

RE: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

Hello Daniel, Thank you for the review. Your suggestions were very helpful to me. I basically made all the changes, but I had some questions on the Kconfig and multi-line commenting. On Monday, January 23, 2017, Daniel Lezcano wrote: > > This patch adds a OSTM driver for the Renesas

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

On 01/23/2017 09:41 PM, Geert Uytterhoeven wrote: > Hi Marek, > > On Mon, Jan 23, 2017 at 8:56 PM, Marek Vasut wrote: >> On 01/23/2017 06:08 PM, Rob Herring wrote: >>> On Sat, Jan 21, 2017 at 03:42:11PM +0100, Marek Vasut wrote: new file mode 100644 index

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

Hi Marek, On Mon, Jan 23, 2017 at 8:56 PM, Marek Vasut wrote: > On 01/23/2017 06:08 PM, Rob Herring wrote: >> On Sat, Jan 21, 2017 at 03:42:11PM +0100, Marek Vasut wrote: >>> new file mode 100644 >>> index ..081947367135 >>> --- /dev/null >>> +++

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

On 01/23/2017 06:08 PM, Rob Herring wrote: > On Sat, Jan 21, 2017 at 03:42:11PM +0100, Marek Vasut wrote: >> Add DT bindings for the Renesas RCar GyroADC block. This block is >> a simple 4/8-channel ADC which samples 12/15/24 bits of data every >> cycle from all channels. > > Isn't this v7?

[RFC] Runtime PM on the RZ/A series is never going to work right

Hello Renesas SoC people, One difference between R-Car/RZG vs RZA is that there is no status bits for the MSTP clocks. This means even though you enable a clock by clearing the module-stop bit, you're not really guaranteed that the peripheral block is ready to be used. For the most part, the

RE: [PATCH v5 2/3] mmc: sh_mobile_sdhi: explain clock bindings

Hello Rob, On Monday, January 23, 2017, Rob Herring wrote: > > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt > > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt > > @@ -25,8 +25,32 @@ Required properties: > > "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC > >

Re: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

On Mon, Jan 23, 2017 at 08:54:23AM -0500, Chris Brandt wrote: > This patch adds a OSTM driver for the Renesas architecture. As it is a new driver, please give technical details for the log. Replace ioread/write by readl/writel in the code. > Signed-off-by: Chris Brandt

Re: [PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

On Sat, Jan 21, 2017 at 03:42:11PM +0100, Marek Vasut wrote: > Add DT bindings for the Renesas RCar GyroADC block. This block is > a simple 4/8-channel ADC which samples 12/15/24 bits of data every > cycle from all channels. Isn't this v7? > > Signed-off-by: Marek Vasut

Re: [PATCH v5 2/3] mmc: sh_mobile_sdhi: explain clock bindings

On Fri, Jan 20, 2017 at 10:06:03PM -0500, Chris Brandt wrote: > In the case of a single clock source, you don't need names. However, > if the controller has 2 clock sources, you need to name them correctly > so the driver can find the 2nd one. The 2nd clock is for the internal > card detect logic.

[PATCH v2 0/7] Renesas *SCIF* RX FIFO support

Hi! This series implements support for using RX FIFO thresholds higher than one in PIO mode on SCIF, HSCIF, SCIFA and SCIFB serial ports. This revision addresses the issues found by Geert and Sergei in their reviews, see below for details. Setting the RX trigger on SH77xx-style ports is still

[PATCH v2 2/7] serial: sh-sci: consider DR (data ready) bit adequately

To allow operation with a higher RX FIFO interrupt threshold in PIO mode, it is necessary to consider the DR bit ("FIFO not full, but no data received for 1.5 frames") as an indicator that data can be read. Otherwise the driver will let data rot in the FIFO until the threshold is reached.

[PATCH v2 3/7] serial: sh-sci: implement FIFO threshold register setting

Sets the closest match for a desired RX trigger level. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/sh-sci.c | 59 + 1 file changed, 59 insertions(+) diff

[PATCH v2 5/7] serial: sh-sci: SCIFA/B RX FIFO software timeout

Implements support for FIFO fill thresholds greater than one with software timeout. This mechanism is not possible (or at least not useful) on SCIF family hardware other than SCIFA and SCIFB because they do not support turning off the DR hardware timeout interrupt separately from the RI

[PATCH v2 6/7] serial: sh-sci: make RX FIFO parameters tunable via sysfs

Allows tuning of the RX FIFO fill threshold and timeout. (The latter is only applicable to SCIFA and SCIFB). Signed-off-by: Ulrich Hecht --- drivers/tty/serial/sh-sci.c | 87 + 1 file changed, 87 insertions(+) diff

[PATCH v2 4/7] serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF

Signed-off-by: Ulrich Hecht --- drivers/tty/serial/sh-sci.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 39734cc..c7e2d0d 100644 --- a/drivers/tty/serial/sh-sci.c

[PATCH v2 7/7] arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1)

Enables the SCIF hooked up to the DEBUG1 connector. Signed-off-by: Ulrich Hecht --- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts

[PATCH v2 1/7] serial: sh-sci: add FIFO trigger bits

Defines the bits controlling FIFO thresholds, adds the additional HSCIF registers to the register map. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/sh-sci.c | 2 ++ drivers/tty/serial/sh-sci.h | 6

Re: [PATCH v3 2/3] ARM: dts: r7s72100: add ostm to device tree

On Mon, Jan 23, 2017 at 2:55 PM, Chris Brandt wrote: > Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux

Re: [PATCH] ARM: dts: r7s72100: add power-domains to mmcif

On Mon, Jan 23, 2017 at 3:13 PM, Chris Brandt wrote: > Signed-off-by: Chris Brandt Reported-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven Gr{oetje,eeting}s,

RE: [PATCH v5 1/3] mmc: sh_mobile_sdhi: add support for 2 clocks

Hi Geert, On Monday, January 23, 2017, Geert Uytterhoeven: > > @@ -190,6 +191,12 @@ static int sh_mobile_sdhi_clk_enable(struct > tmio_mmc_host *host) > > if (ret < 0) > > return ret; > > > > + ret = clk_prepare_enable(priv->clk_cd); > > + if (ret < 0) { > > +

[PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

This patch adds a OSTM driver for the Renesas architecture. Signed-off-by: Chris Brandt --- v2: * changed implementation to be independent channel nodes --- arch/arm/mach-shmobile/Kconfig | 1 + drivers/clocksource/Kconfig| 12 ++

[PATCH v3 1/2] dt-bindings: document renesas-ostm timer

Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven --- v3: * changed ostm@fcfec000 to timer@fcfec000 in example * added power-domains in example v2: * remove sw implementation specific portions ---

[PATCH v3 0/2] clocksource: Add renesas-ostm timer driver

This patch set adds a new clocksource driver that uses the OS Timer (OSTM) that exists in the R7S72100 (RZ/A1) SoC. The operation of the driver was tested with a simple user application that does multiple calls to nanosleep() and gettimeofday(). The purpose of adding this driver is to get better

[PATCH v3 3/3] ARM: dts: rskrza1: add ostm DT support

Signed-off-by: Chris Brandt --- v2: * remove part that was supposed to go in dsti * now there is a node for each channel --- arch/arm/boot/dts/r7s72100-rskrza1.dts | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts

[PATCH v3 2/3] ARM: dts: r7s72100: add ostm to device tree

Signed-off-by: Chris Brandt --- v3: * changed ostm@xxx to timer@xxx * added power-domains to nodes v2: * wrap clock lines to avoid 80 char max * split into 2 separate channel nodes --- arch/arm/boot/dts/r7s72100.dtsi | 18 ++ 1 file changed, 18

Re: [PATCH/RFC] iommu/ipmmu-vmsa: Initial R-Car Gen3 VA64 mode support

Hi Magnus, On Mon, Jan 23, 2017 at 12:52 PM, Magnus Damm wrote: > From: Magnus Damm > > Here's a prototype that enables IMCTR_VA64 support for the IPMMU driver > on R-Car Gen3 platforms. I've tested it lightly on r8a7796 Salvator-X > with local

Re: [PATCH/RFC 2/2] iommu/ipmmu-vmsa: Opt-in slave devices based on ES version

Hi Magnus, On Mon, Jan 23, 2017 at 1:12 PM, Magnus Damm wrote: > From: Magnus Damm > > Match on r8a7795 ES2 and enable a certain DMA controller. > In other cases the IPMMU driver remains disabled. > > Signed-off-by: Magnus Damm

Re: [PATCH v2 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48

Hi Magnus, On Mon, Jan 23, 2017 at 12:40 PM, Magnus Damm wrote: > From: Magnus Damm > > Bump up the maximum numbers of micro-TLBS to 48. > > Each IPMMU device instance get micro-TLB assignment via > the "iommus" property in DT. Older SoCs tend

Re: [PATCH/RFC 1/2] arm64: mm: Silently allow devices lacking IOMMU group

Hi Magnus, On 23/01/17 12:12, Magnus Damm wrote: > From: Magnus Damm > > Consider failure of iommu_get_domain_for_dev() as non-critical and > get rid of the warning printout. This allows IOMMU properties to be > included in the DTB even though the kernel is

[PATCH/RFC 2/2] iommu/ipmmu-vmsa: Opt-in slave devices based on ES version

From: Magnus Damm Match on r8a7795 ES2 and enable a certain DMA controller. In other cases the IPMMU driver remains disabled. Signed-off-by: Magnus Damm --- drivers/iommu/ipmmu-vmsa.c | 24 1 file changed, 24

[PATCH/RFC 0/2] iommu/ipmmu-vmsa: IPMMU slave device whitelist

iommu/ipmmu-vmsa: IPMMU slave device whitelist [PATCH/RFC 1/2] arm64: mm: Silently allow devices lacking IOMMU group [PATCH/RFC 2/2] iommu/ipmmu-vmsa: Opt-in slave devices based on ES version Here's a little prototype that shows how DT integration of IPMMU details may be integrated and merged

[PATCH/RFC] iommu/ipmmu-vmsa: Initial R-Car Gen3 VA64 mode support

From: Magnus Damm Here's a prototype that enables IMCTR_VA64 support for the IPMMU driver on R-Car Gen3 platforms. I've tested it lightly on r8a7796 Salvator-X with local second serial port code and SYS-DMAC support via DMA Engine. My goal has been to enable 40 bits

[PATCH v2 1/3] iommu/ipmmu-vmsa: Add r8a7796 DT binding

From: Magnus Damm Update the IPMMU DT binding documentation to include the r8a7796 compat string for R-Car M3-W. Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart Acked-by: Rob Herring

[PATCH v2 3/3] iommu/ipmmu-vmsa: Hook up r8a7796 DT matching code

From: Magnus Damm Support the r8a7796 IPMMU by sharing feature flags between r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook up the updated compat string. Signed-off-by: Magnus Damm --- Changes since V1: - None

[PATCH v2 0/3] iommu/ipmmu-vmsa: r8a7796 support V2

iommu/ipmmu-vmsa: r8a7796 support V2 [PATCH v2 1/3] iommu/ipmmu-vmsa: Add r8a7796 DT binding [PATCH v2 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48 [PATCH v2 3/3] iommu/ipmmu-vmsa: Hook up r8a7796 DT matching code This series adds r8a7796 support to the IPMMU driver. The DT binding

[PATCH v2 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48

From: Magnus Damm Bump up the maximum numbers of micro-TLBS to 48. Each IPMMU device instance get micro-TLB assignment via the "iommus" property in DT. Older SoCs tend to use a maximum number of 32 micro-TLBs per IPMMU instance however newer SoCs such as r8a7796 make

Re: [PATCH 4/8] clk: renesas: cpg-mssr: Add support for reset control

Hi Niklas, On Fri, Jan 20, 2017 at 11:03 PM, Niklas Söderlund wrote: > Nice patch! It took me a while to understand why you didn't need to read > the register before writing to it in cpg_mssr_deassert() :-) Yeah, deassertion and assertion are asymmetrical. Note

[PATCH] clk: renesas: mstp: Reformat cpg_mstp_clock_register() for git diff

As the function header of cpg_mstp_clock_register() is split in an unusual way, "git diff" gets confused when changes to the body of the function are made, and attributes them to the wrong function. Reformat the function header to fix this. Signed-off-by: Geert Uytterhoeven

Re: [PATCH 2/2] clk: renesas: mstp: Make INTC-SYS a critical clock

Hi Stephen, On Sat, Jan 21, 2017 at 12:12 AM, Stephen Boyd wrote: > On 01/17, Geert Uytterhoeven wrote: >> INTC-SYS is the module clock for the GIC. Accessing the GIC while it is >> disabled causes: >> >> Unhandled fault: asynchronous external abort (0x1211) at

Re: [PATCH 0/4] ARM/arm64: dts: renesas: Link ARM GIC to clock and clock domain

On Mon, Jan 23, 2017 at 10:26:34AM +0100, Geert Uytterhoeven wrote: > Hi Simon, > > On Mon, Jan 23, 2017 at 10:23 AM, Simon Horman wrote: > > On Tue, Jan 17, 2017 at 01:49:16PM +0100, Geert Uytterhoeven wrote: > >> This patch series improves the topology description in DT of

Re: [PATCH] ARM: shmobile: rcar-gen2: Add more register documentation

On Mon, Jan 23, 2017 at 10:11:20AM +0100, Geert Uytterhoeven wrote: > Hi Sergei, > > On Fri, Jan 20, 2017 at 5:21 PM, Sergei Shtylyov > wrote: > > On 01/20/2017 04:04 PM, Geert Uytterhoeven wrote: > > > >> Signed-off-by: Geert Uytterhoeven

Re: [PATCH 0/2] clk: renesas: Use CLK_IS_CRITICAL to handle critical clocks

Hi Stephen, On Sat, Jan 21, 2017 at 12:00 AM, Stephen Boyd wrote: > On 01/17, Geert Uytterhoeven wrote: >> This patch series adds support for the CLK_IS_CRITICAL flag to drivers >> for module clocks on Renesas ARM SoCs. For now, this is used to prevent >> disabling of the

Re: [PATCH v7 0/2] arm64: dts: r8a779x: add thermal to DTS

On Fri, Jan 20, 2017 at 12:26:41PM +0100, Wolfram Sang wrote: > Since the driver is now merged into next, we can add the DTS snipplets as > well. > Changes from V6: > > * rebased to latest renesas/arm64-dt-for-v4.11 > * changed critical temp from 90° to 120° which is the state in the latest BSP

Re: [PATCH] ARM: shmobile: r8a7779: marzen: Fix sata device status

On Wed, Jan 18, 2017 at 08:06:02PM +0300, Sergei Shtylyov wrote: > On 01/16/2017 07:56 PM, Geert Uytterhoeven wrote: > > >Device nodes representing I/O devices should be marked disabled in the > >SoC-specific DTS, and overridden by board-specific DTSes where needed. > > > >Signed-off-by: Geert

Re: [PATCH 0/4] ARM/arm64: dts: renesas: Link ARM GIC to clock and clock domain

Hi Simon, On Mon, Jan 23, 2017 at 10:23 AM, Simon Horman wrote: > On Tue, Jan 17, 2017 at 01:49:16PM +0100, Geert Uytterhoeven wrote: >> This patch series improves the topology description in DT of the ARM GIC >> on Renesas SoCs using the CPG/MSSR bindings (R-Car Gen3 and

Re: [PATCH 0/4] ARM/arm64: dts: renesas: Link ARM GIC to clock and clock domain

On Tue, Jan 17, 2017 at 01:49:16PM +0100, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > This patch series improves the topology description in DT of the ARM GIC > on Renesas SoCs using the CPG/MSSR bindings (R-Car Gen3 and RZ/G). > It links the GIC to its module clock, and adds it to

Re: [PATCH v5 1/3] mmc: sh_mobile_sdhi: add support for 2 clocks

Hi Chris, On Sat, Jan 21, 2017 at 4:06 AM, Chris Brandt wrote: > Some controllers have 2 clock sources instead of 1. The 2nd clock > is for the internal card detect logic and must be enabled/disabled > along with the main core clock for proper operation. > >

Re: [PATCH/RFC v2 net-next] ravb: unmap descriptors when freeing rings

On Mon, Jan 16, 2017 at 11:41:51PM +0300, Sergei Shtylyov wrote: > Hello! > > On 01/12/2017 04:18 PM, Simon Horman wrote: > > >... > > Here, it stop once an untransmitted buffer is encountered... > >>> > >>>Yes, I see that now. > >>> > >>>I wonder if we should: > >>> > >>>a) paramatise

Re: [PATCH v2 1/2] dt-bindings: document renesas-ostm timer

Hi Chris, On Fri, Jan 20, 2017 at 10:20 PM, Chris Brandt wrote: > Signed-off-by: Chris Brandt > > --- > v2: > * remove sw implementation specific portions > --- > .../devicetree/bindings/timer/renesas,ostm.txt | 29 >

Re: [PATCH] ARM: shmobile: rcar-gen2: Add more register documentation

Hi Sergei, On Fri, Jan 20, 2017 at 5:21 PM, Sergei Shtylyov wrote: > On 01/20/2017 04:04 PM, Geert Uytterhoeven wrote: > >> Signed-off-by: Geert Uytterhoeven >> --- >> arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 >>

Re: The failure summary report of GEN2 for linux stable v4.10-rc2

Hi Laurent, Thanks for your feedback. Dear Dong, On Friday 20 Jan 2017 12:11:50 DongCV wrote: Dear Mr Laurent, Thank you for your quick reply. This is the log file contains information about the command "modetest -M rcar-du" (with the HDMI cable plugged). Thank you. I think I know what's

Re: [PATCH 3/3] sh_eth: stop using bare numbers for EESIPR values

Hi Sergei, On Sun, Jan 22, 2017 at 8:19 PM, Sergei Shtylyov wrote: > Now that we have almost all EESIPR bits declared (and those that are > still not are most probably reserved anyway) we can at last replace the > bare numbers used for