[PATCH 1/2] iio: adc: Add Renesas GyroADC bindings

From: Marek Vasut Add DT bindings for the Renesas RCar GyroADC block. This block is a simple 4/8-channel ADC which samples 12/15/24 bits of data every cycle from all channels. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven

[PATCH 2/2] iio: adc: Add Renesas GyroADC driver

From: Marek Vasut Add IIO driver for the Renesas RCar GyroADC block. This block is a simple 4/8-channel ADC which samples 12/15/24 bits of data every cycle from all channels. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven

Re: [PATCH V8 1/2] iio: adc: Add Renesas GyroADC bindings

On 01/27/2017 11:26 PM, Rob Herring wrote: > On Tue, Jan 24, 2017 at 07:26:41PM +0100, Marek Vasut wrote: >> Add DT bindings for the Renesas RCar GyroADC block. This block is >> a simple 4/8-channel ADC which samples 12/15/24 bits of data every >> cycle from all channels. >> >> Signed-off-by:

Re: [PATCH V8 1/2] iio: adc: Add Renesas GyroADC bindings

On Tue, Jan 24, 2017 at 07:26:41PM +0100, Marek Vasut wrote: > Add DT bindings for the Renesas RCar GyroADC block. This block is > a simple 4/8-channel ADC which samples 12/15/24 bits of data every > cycle from all channels. > > Signed-off-by: Marek Vasut > Cc: Geert

RE: [RFC fixes 0/2] FIX: Renesas RZ series pinctrl driver

Hi Jacopo, On Friday, January 27, 2017, Jacopo Mondi wrote: > Hello, >sorry if I'm sending 2 patches on top of an RFC series with comments > still pending, but these patches enabled me to properly test pin > configuration sequence in order to access the internal EEPROM through > RIIC2

Re: [PATCH 2/5] arm64: dts: r8a7796: Add I2C for DVFS device node

On Thu, Jan 26, 2017 at 11:07:24AM +0100, Geert Uytterhoeven wrote: > On Thu, Jan 26, 2017 at 9:52 AM, Simon Horman > wrote: > > From: Dien Pham > > > > This patch adds I2C for DVFS device node for R8A7796 SoC. > > > > Signed-off-by: Dien

[PATCH v7 0/2] clocksource: Add renesas-ostm timer driver

This patch set adds a new clocksource driver that uses the OS Timer (OSTM) that exists in the R7S72100 (RZ/A1) SoC. The operation of the driver was tested with a simple user application that does multiple calls to nanosleep() and gettimeofday(). The purpose of adding this driver is to get better

[PATCH v7 1/2] dt-bindings: document renesas-ostm timer

Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven --- v3: * changed ostm@fcfec000 to timer@fcfec000 in example * added power-domains in example v2: * remove sw implementation specific portions ---

Re: [git pull] clk: renesas: Updates for v4.11 (take two)

On 01/27, Geert Uytterhoeven wrote: > Hi Mike, Stephen, > > The following changes since commit e6bdf28eff475a026b922abe78ae710e7179bdf7: > > clk: renesas: r8a7796: Add MSIOF controller clocks (2016-12-27 10:56:08 > +0100) > > are available in the git repository at: > >

[PATCH v3 net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy. This has been reported to occur with both the

[PATCH v3 net-next 2/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

From: Geert Uytterhoeven The limitation to 10/100Mbit speeds on R-Car Gen3 is valid for R-Car H3 ES1.0 only. Check for the exact SoC model to allow 1Gbps on newer revisions of R-Car H3, and on R-Car M3-W. Signed-off-by: Geert Uytterhoeven

[PATCH v3 net-next 0/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

Hi, this series adds support for gigabit communication to the Renesas EthernetAVB controller when used in conjunction with R-Car Gen3 H3 ES1.1+ and M3-W SoCs. Gigabit is already supported with R-Car Gen 2 SoCs. The patch from Geert was previously posted for inclusion in v4.10 and acked by Dave

Re: [PATCH v2 net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On Fri, Jan 27, 2017 at 10:05:58PM +0300, Sergei Shtylyov wrote: > On 01/27/2017 09:35 PM, Simon Horman wrote: > > >From: Kazuya Mizuguchi > > > >This patch enables tx and rx clock internal delay modes (TDM and RDM). > > > >This is to address a failure in the

Re: [PATCH/RFC] iommu/dma: Per-domain flag to control size-alignment

Hi Magnus, On 27/01/17 06:24, Magnus Damm wrote: > From: Magnus Damm > > Introduce the flag "no_size_align" to allow disabling size-alignment > on a per-domain basis. This follows the suggestion by the comment > in the code, however a per-device control may be

[PATCH v2 net-next 0/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

Hi, this series adds support for gigabit communication to the Renesas EthernetAVB controller when used in conjunction with R-Car Gen3 H3 ES1.1+ and M3-W SoCs. Gigabit is already supported with R-Car Gen 2 SoCs. The patch from Geert was previously posted for inclusion in v4.10 and acked by Dave

[PATCH v2 net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy. This has been reported to occur with both the

[PATCH v2 net-next 2/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

From: Geert Uytterhoeven The limitation to 10/100Mbit speeds on R-Car Gen3 is valid for R-Car H3 ES1.0 only. Check for the exact SoC model to allow 1Gbps on newer revisions of R-Car H3, and on R-Car M3-W. Signed-off-by: Geert Uytterhoeven

[PATCH] clk: renesas: mstp: ensure register writes complete before returning

When there is no status bit, it is possible for the clock enable/disable operation to have not completed by the time the driver code resumes execution. This is due to the fact that write operations are sometimes queued and delayed internally. Doing a read ensures the write operations has

[PATCH] clk: renesas: mstp: disable runtime pm for r7s72100

Due to the lack of clock status bits, we need to disable runtime pm for all RZ/A1 peripherals. Otherwise, it is possible that a driver will start using a peripheral before it is fully ready. By using pm_clk_resume immediately after we add the clock we ensure the usage counter will never get back

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On Fri, Jan 27, 2017 at 09:11:35PM +0300, Sergei Shtylyov wrote: > On 01/27/2017 09:07 PM, Simon Horman wrote: > > >From: Kazuya Mizuguchi > > > >This patch enables tx and rx clock internal delay modes (TDM and RDM). > > > >This is to address

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On 01/27/2017 09:07 PM, Simon Horman wrote: From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy.

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On Fri, Jan 27, 2017 at 07:55:25PM +0300, Sergei Shtylyov wrote: > On 01/27/2017 07:49 PM, Simon Horman wrote: > > >>>From: Kazuya Mizuguchi > >>> > >>>This patch enables tx and rx clock internal delay modes (TDM and RDM). > >>> > >>>This is to address a failure

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On 01/27/2017 07:49 PM, Simon Horman wrote: From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy.

Re: [PATCH v2 1/2] iommu/dma: Add support for DMA_ATTR_FORCE_CONTIGUOUS

Hi Geert, On 27/01/17 15:34, Geert Uytterhoeven wrote: > Add helpers for allocating physically contiguous DMA buffers to the > generic IOMMU DMA code. This can be useful when two or more devices > with different memory requirements are involved in buffer sharing. > > The

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On 01/27/2017 07:51 PM, Simon Horman wrote: From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy.

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On Fri, Jan 27, 2017 at 04:00:27PM +0300, Sergei Shtylyov wrote: > On 01/27/2017 02:04 PM, Simon Horman wrote: > > >From: Kazuya Mizuguchi > > > >This patch enables tx and rx clock internal delay modes (TDM and RDM). > > > >This is to address a failure in the

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On Fri, Jan 27, 2017 at 03:42:05PM +0300, Sergei Shtylyov wrote: > Hello! > > On 01/27/2017 02:04 PM, Simon Horman wrote: > > >From: Kazuya Mizuguchi > > > >This patch enables tx and rx clock internal delay modes (TDM and RDM). > > > >This is to address a

[RFC fixes 2/2] pinctrl: rz-pfc: Fix RZ/A1 pin function configuration

Fix alternate function configuration sequence for RZ/A1 SoC. The pin is first configured as simple input port, then alternate function is configured. Always enable input buffer for now as long as we don't have configuration paramters coming from device tree. Tested accessing embedded EEPROM chip

[RFC fixes 0/2] FIX: Renesas RZ series pinctrl driver

Hello, sorry if I'm sending 2 patches on top of an RFC series with comments still pending, but these patches enabled me to properly test pin configuration sequence in order to access the internal EEPROM through RIIC2 interface on pins 1_4 and 1_5. The outcome is a bugfix to RZ/A1 pincontroller

[RFC fixes 1/2] arm: dts: genmai: Configure RIIC2 pins

Add pin configuration for RIIC2 pins interface. The i2c2 is connected to internal eeprom. Signed-off-by: Jacopo Mondi --- arch/arm/boot/dts/r7s72100-genmai.dts | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git

Re: [PATCH net-next 0/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

On Fri, Jan 27, 2017 at 01:16:43PM +0100, Geert Uytterhoeven wrote: > Hi Simon, > > On Fri, Jan 27, 2017 at 12:04 PM, Simon Horman > wrote: > > The path from Mizuguchi-san is to address timing problems observed with > > gigabit transfers. I would like it considered

[PATCH/RFC] arm64: defconfig: Enlarge CMA alignment to 2 MiB

Some IOMMUs (e.g. Renesas IPMMU/VMSA) support only page sizes of 4 KiB, 2 MiB, and 1 GiB. With the default setting of CONFIG_CMA_ALIGNMENT = 8, allocations larger than 1 MiB are aligned to a 1 MiB boundary only. Hence a 2 MiB allocation may not be aligned, leading to a mapping of 512 4 KiB

[PATCH v2 0/2] iommu/dma: Add support for DMA_ATTR_FORCE_CONTIGUOUS

Hi all, Tis patch series adds helpers for DMA_ATTR_FORCE_CONTIGUOUS to the generic IOMMU DMA code, and support for allocating physically contiguous DMA buffers on arm64 systems with an IOMMU. This can be useful when two or more devices with different memory requirements are involved in

[PATCH v2 2/2] arm64: Add support for DMA_ATTR_FORCE_CONTIGUOUS to IOMMU

Add support for allocation physically contiguous DMA buffers on arm64 systems with an IOMMU, by dispatching DMA buffer allocations with the DMA_ATTR_FORCE_CONTIGUOUS attribute to the appropriate IOMMU DMA helpers. Note that as this uses the CMA allocator, setting this attribute has a

[PATCH v2 1/2] iommu/dma: Add support for DMA_ATTR_FORCE_CONTIGUOUS

Add helpers for allocating physically contiguous DMA buffers to the generic IOMMU DMA code. This can be useful when two or more devices with different memory requirements are involved in buffer sharing. The iommu_dma_{alloc,free}_contiguous() functions complement the existing

Re: [PATCH] spi: rspi: fix the bug related to mount/remount jffs2

CC correct linux-renesas-soc On Fri, Jan 27, 2017 at 10:00 AM, Geert Uytterhoeven wrote: > Hi Dong, > > On Fri, Jan 27, 2017 at 9:12 AM, DongCV wrote: >> This patch fixes the output warning logs and data loss when performing >> mount/umount then

Re: [PATCH v6 0/3] mmc: sh_mobile_sdhi: fix missing r7s72100 clocks

On 26 January 2017 at 11:12, Wolfram Sang wrote: > >> Thanks, applied patch1 and patch2 for next. Patch3 is for Simon, I >> guess!? (And I can add Rob's ack afterwards). > > Can you add my tags as well. They got dropped somehow: > > Reviewed-by: Wolfram Sang

RE: [PATCH v2 6/7] dt-bindings: media: Add Renesas R-Car DRIF binding

Hi Hans, Many thanks for the response & comments. > Subject: Re: [PATCH v2 6/7] dt-bindings: media: Add Renesas R-Car DRIF > binding > > On 01/10/2017 10:31 AM, Ramesh Shanmugasundaram wrote: > > Hi Laurent, > > > >> On Wednesday 21 Dec 2016 08:10:37 Ramesh Shanmugasundaram wrote: > >>>

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

On 01/27/2017 02:04 PM, Simon Horman wrote: From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy.

Re: [PATCH net-next 2/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

On 01/27/2017 02:04 PM, Simon Horman wrote: From: Geert Uytterhoeven The limitation to 10/100Mbit speeds on R-Car Gen3 is valid for R-Car H3 ES1.0 only. Check for the exact SoC model to allow 1Gbps on newer revisions of R-Car H3, and on R-Car M3-W. Signed-off-by:

Re: [PATCH] v4l: of: check for unique lanes in data-lanes and clock-lanes

Hi Niklas, On Thu, Jan 26, 2017 at 02:12:59PM +0100, Niklas Söderlund wrote: > All lines in data-lanes and clock-lanes properties must be unique. > Instead of drivers checking for this add it to the generic parser. > > Signed-off-by: Niklas Söderlund > ---

Re: [PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

Hello! On 01/27/2017 02:04 PM, Simon Horman wrote: From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX

Re: [PATCH net-next 0/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

Hi Simon, On Fri, Jan 27, 2017 at 12:04 PM, Simon Horman wrote: > The path from Mizuguchi-san is to address timing problems observed with > gigabit transfers. I would like it considered although my own testing on > M3-W did not show any timing problems. Is there any

[PATCH net-next 2/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

From: Geert Uytterhoeven The limitation to 10/100Mbit speeds on R-Car Gen3 is valid for R-Car H3 ES1.0 only. Check for the exact SoC model to allow 1Gbps on newer revisions of R-Car H3, and on R-Car M3-W. Signed-off-by: Geert Uytterhoeven

Re: [PATCH v2 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48

On Mon, Jan 23, 2017 at 08:40:29PM +0900, Magnus Damm wrote: > From: Magnus Damm > > Bump up the maximum numbers of micro-TLBS to 48. > > Each IPMMU device instance get micro-TLB assignment via > the "iommus" property in DT. Older SoCs tend to use a > maximum number

[PATCH net-next 0/2] ravb: Support 1Gbps on R-Car H3 ES1.1+ and R-Car M3-W

Hi, this series adds support for gigabit communication to the Renesas EthernetAVB controller when used in conjunction with R-Car Gen3 H3 ES1.1+ and M3-W SoCs. Gigabit is already supported with R-Car Gen 2 SoCs. The patch from Geert was previously posted for inclusion in v4.10 and acked by Dave

Re: [PATCH v2 6/7] dt-bindings: media: Add Renesas R-Car DRIF binding

On 01/10/2017 10:31 AM, Ramesh Shanmugasundaram wrote: > Hi Laurent, > >> On Wednesday 21 Dec 2016 08:10:37 Ramesh Shanmugasundaram wrote: >>> Add binding documentation for Renesas R-Car Digital Radio >>> Interface >>> (DRIF) controller. >>> >>> Signed-off-by: Ramesh

[PATCH net-next 1/2] ravb: Add tx and rx clock internal delays mode of APSR

From: Kazuya Mizuguchi This patch enables tx and rx clock internal delay modes (TDM and RDM). This is to address a failure in the case of 1Gbps communication using the by salvator-x board with the KSZ9031RNX phy. This has been reported to occur with both the

Re: [PATCH 2/2] arm64: dts: r8a7795: Enable I2C DVFS DMA

On Fri, Jan 27, 2017 at 11:06 AM, Simon Horman wrote: > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > @@ -804,6 +804,9 @@ > interrupts = ; > clocks = < CPG_MOD 926>; >

Re: [PATCH 1/2] arm64: dts: r8a7796: Enable I2C DVFS DMA

Hi Simon, On Fri, Jan 27, 2017 at 11:06 AM, Simon Horman wrote: > Signed-off-by: Simon Horman > --- > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git

[PATCH 2/2] arm64: dts: r8a7795: Enable I2C DVFS DMA

Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index fe266bb3d913..d1d404c29563 100644 ---

[PATCH 1/2] arm64: dts: r8a7796: Enable I2C DVFS DMA

Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index c95ad177b097..c8592d05620b 100644 ---

[PATCH 0/2] arm64: dts: r8a779[56]: Enable I2C DVFS DMA

Hi, this series enables DMA for I2C DVFS on the r8a7795 and r8a7796 SoCs. I2C DVFS was recently enabled on the salvator-x board for those SoCs. Base: * This series is based on renesas-devel-20170127v2-v4.10-rc5 Dependencies: * This series has a run-time dependency on "[PATCH 0/2] clk:

[git pull] clk: renesas: Updates for v4.11 (take two)

Hi Mike, Stephen, The following changes since commit e6bdf28eff475a026b922abe78ae710e7179bdf7: clk: renesas: r8a7796: Add MSIOF controller clocks (2016-12-27 10:56:08 +0100) are available in the git repository at:

[git pull] pinctrl: sh-pfc: Updates for v4.11 (take two)

Hi Linus, The following changes since commit 0e4e4999aac16641f47699e8929693b83a7a4d64: pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions (2016-12-27 10:57:39 +0100) are available in the git repository at:

[PATCH 3/9] arm64: dts: r8a7795: Add R-Car Gen3 thermal support

From: Wolfram Sang Signed-off-by: Hien Dang Signed-off-by: Thao Nguyen Signed-off-by: Khiem Nguyen Signed-off-by: Niklas Söderlund

[PATCH 9/9] arm64: dts: r8a7796: Mark EthernetAVB device node disabled

From: Geert Uytterhoeven Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: 8e8b9eaef8fb05d9 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance") Signed-off-by:

[PATCH 1/9] arm64: dts: h3ulcb: follow sound CTU/MIX supports

From: Kuninori Morimoto commit 5bcd74e8a30d9259 ("arm64: dts: r8a7795: add sound MIX support") commit 5be5ee41d011f26b ("arm64: dts: r8a7795: add sound CTU support") added MIX/CTU support, and it updated clocks on SoC level. Thus, h3ulcb should be updated

[GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11

Hi Olof, Hi Kevin, Hi Arnd, Please consider these second round of Renesas ARM64 based SoC DT updates for v4.11. This pull request is based on the previous round of such requests, tagged as renesas-arm64-dt-for-v4.11, which you have already pulled. The following changes since commit

[PATCH 2/9] arm64: dts: r8a7795: Add missing power-domains property for sata

From: Geert Uytterhoeven This went unnoticed as the sata_rcar driver doesn't support Runtime PM yet, but manages module clocks manually. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman ---

[PATCH 6/9] arm64: dts: r8a7796: Link ARM GIC to clock and clock domain

From: Geert Uytterhoeven Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC "always-on" PM Domain, so it can be power managed using that clock. Note that currently the GIC-400 driver doesn't support module clocks nor Runtime PM, so this must be handled

[PATCH 4/9] arm64: dts: r8a7796: Add R-Car Gen3 thermal support

From: Wolfram Sang Signed-off-by: Hien Dang Signed-off-by: Thao Nguyen Signed-off-by: Khiem Nguyen Signed-off-by: Niklas Söderlund

[PATCH 7/9] arm64: dts: r8a7795: tidyup audma definition order

From: Kuninori Morimoto Current r8a7795.dtsi defines audma -> ipmmu -> dma order. Because of this order, dma can connect to ipmmu, but audma can't connect to it. This patch moves audma order as ipmmu -> dma -> audma. Signed-off-by: Kuninori Morimoto

[PATCH 8/9] arm64: dts: r8a7795: Mark EthernetAVB device node disabled

From: Geert Uytterhoeven Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: a92843c8a6f8c039 ("arm64: dts: r8a7795: add EthernetAVB device node") Signed-off-by: Geert

Re: [PATCH v6 0/3] mmc: sh_mobile_sdhi: fix missing r7s72100 clocks

On Thu, Jan 26, 2017 at 11:12:11AM +0100, Wolfram Sang wrote: > > > Thanks, applied patch1 and patch2 for next. Patch3 is for Simon, I > > guess!? (And I can add Rob's ack afterwards). > > Can you add my tags as well. They got dropped somehow: > > Reviewed-by: Wolfram Sang

Re: [PATCH v5 2/3] mmc: sh_mobile_sdhi: explain clock bindings

On 26 January 2017 at 15:39, Rob Herring wrote: > On Mon, Jan 23, 2017 at 11:56 AM, Chris Brandt > wrote: >> Hello Rob, >> >> >> On Monday, January 23, 2017, Rob Herring wrote: >>> > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt >>> > +++

Re: [PATCH 2/2] arm64: dts: h3ulcb: enable HS200 for eMMC

[CC Wolfram, linux-mmc] On Thu, Jan 26, 2017 at 06:14:00PM +0300, Vladimir Barinov wrote: > From: Vladimir Barinov > > This supports HS200 mode for eMMC on H3ULCB board > > Signed-off-by: Vladimir Barinov

Re: [PATCH RESEND 0/2] arm64: gen3: enable eMMC HS200 in DT

On Fri, Jan 27, 2017 at 08:27:28AM +0100, Wolfram Sang wrote: > > > Using renesas-next without mmc-next I see the problem above on the M3-W. > > Using renesas-next with mmc-next I do not see the problem above. > > Using v4.10-rc2 I also do not see the problem above. > > OK. So there is no