Hi Alan,
> From: Alan Stern
> Sent: Wednesday, February 15, 2017 2:57 AM
>
> On Tue, 14 Feb 2017, Yoshihiro Shimoda wrote:
>
> > Hi Alan,
> >
> > > From: Alan Stern
> > > Sent: Tuesday, February 14, 2017 1:35 AM
> > >
> > > On Mon, 13 Feb 2017, Yoshihiro Shimoda wrote:
> > >
> > > > > Hmmm.
Hi,
I would like to get a related device pointer on usb EHCI drivers (or USB
framework)
because related device (e.g. OHCI or UHCI, called "companion controllers") has
to
finish resuming. I discussed this topic with Alan:
http://marc.info/?t=14865351421=1=2
In PCI bus, USB framework already
Hi Geert,
Sorry for the delay.
Thanks for your reply.
On Mon, Feb 13, 2017 at 7:50 AM, Hiep Cao Minh wrote:
Sorry to bother you!
No, thank you for finally make me see my wrong reasoning!
qspi_transfer_in() does:
while (n > 0) {
len =
Hello Hiep,
On Monday 23 Jan 2017 16:58:34 Hiep Cao Minh wrote:
> > On Friday 20 Jan 2017 12:11:50 DongCV wrote:
> >> Dear Mr Laurent,
> >>
> >> Thank you for your quick reply.
> >> This is the log file contains information about the command "modetest -M
> >> rcar-du" (with the HDMI cable
On Tue, 14 Feb 2017, Yoshihiro Shimoda wrote:
> Hi Alan,
>
> > From: Alan Stern
> > Sent: Tuesday, February 14, 2017 1:35 AM
> >
> > On Mon, 13 Feb 2017, Yoshihiro Shimoda wrote:
> >
> > > > Hmmm. You're using platform drivers for OHCI and EHCI, not PCI,
> > >
> > > Yes, I'm using platform
Hi Chris,
On Mon, Feb 13, 2017 at 7:25 PM, Chris Brandt wrote:
> Add device tree bindings document for renesas-reset driver.
> This driver uses the WDT hardware to issue an immediate reset.
>
> Signed-off-by: Chris Brandt
> ---
>
When there is no status bit, it is possible for the clock enable/disable
operation to have not completed by the time the driver code resumes
execution. This is due to the fact that write operations are sometimes
queued and delayed internally. Doing a read ensures the write operations
has
Hi Hans,
On Monday 13 Feb 2017 13:46:08 Hans Verkuil wrote:
> On 02/07/2017 04:02 PM, Ramesh Shanmugasundaram wrote:
> > Hi Media, DT maintainers, All,
> >
> > This patch set contains two drivers
> >
> > - Renesas R-Car Digital Radio Interface (DRIF) driver
> > - Maxim's MAX2175 RF to Bits
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
topic/dma-attr-force-contiguous-v4
head: eed2b654e58fdefff043be4464cc3963725e6415
commit: eed2b654e58fdefff043be4464cc3963725e6415 [53/53] [TEST]
DMA_ATTR_FORCE_CONTIGUOUS test code
config: alpha-allyesconfig
Hi Alan,
> From: Alan Stern
> Sent: Tuesday, February 14, 2017 1:35 AM
>
> On Mon, 13 Feb 2017, Yoshihiro Shimoda wrote:
>
> > > Hmmm. You're using platform drivers for OHCI and EHCI, not PCI,
> >
> > Yes, I'm using platform drivers for OHCI and EHCI.
> >
> > > right? The resume_common()
On Tuesday, February 14, 2017 10:31:38 AM Geert Uytterhoeven wrote:
> Hi all,
>
> Laurent Pinchart reported that r8a7790/Lager crashes during suspend tests.
>
> I managed to reproduce the issue on r8a7791/koelsch:
> - It only happens during suspend tests, after writing either "platform"
>
Shimoda-san, Ulf,
On Tue, Feb 14, 2017 at 10:06:47AM +, Yoshihiro Shimoda wrote:
> Hi,
>
> > From: Wolfram Sang [mailto:wsa+rene...@sang-engineering.com]
> > Sent: Tuesday, February 14, 2017 3:04 AM
> >
> > After we received the dataend interrupt, R1 response register carries
> > the value
Hi all,
Laurent Pinchart reported that r8a7790/Lager crashes during suspend tests.
I managed to reproduce the issue on r8a7791/koelsch:
- It only happens during suspend tests, after writing either "platform"
or "processors" to /sys/power/pm_test,
- It does not (or is less likely) to
Hi Chris,
On Mon, Feb 13, 2017 at 7:44 PM, Chris Brandt wrote:
> When there is no status bit, it is possible for the clock enable/disable
> operation to have not completed by the time the driver code resumes
> execution. This is due to the fact that write operations are
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