Hi Wolfram-san,
Thank you for the patch!
> From: Wolfram Sang, Sent: Monday, June 11, 2018 11:50 PM
>
> Signed-off-by: Wolfram Sang
> ---
> arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 5 +
> arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts | 5 +
>
Hi Wolfram-san,
> From: Wolfram Sang, Sent: Monday, June 11, 2018 11:50 PM
>
> Signed-off-by: Wolfram Sang
> ---
This patch looks good. So,
Acked-by: Yoshihiro Shimoda
Best regards,
Yoshihiro Shimoda
> arch/arm/boot/dts/emev2-kzm9d.dts | 5 +
>
Hi Wolfram-san,
Thank you for the patch!
> From: Wolfram Sang, Sent: Monday, June 11, 2018 11:50 PM
>
> Signed-off-by: Wolfram Sang
> ---
> arch/arm/include/debug/renesas-scif.S | 5 +
> arch/arm/mach-shmobile/headsmp-apmu.S | 5 +
>
Hi Wolfram
Thank you for your patch
> I'd think it would be good to have an Acked-by from someone with a
> renesas.com email address to ack the process, just to be very sure. I
> don't think it has to be a Rev-by, although that would be welcome, too,
> of course.
For all patches
Acked-by:
On 06/11/2018 04:30 PM, Geert Uytterhoeven wrote:
> Hi Marek,
>
> On Mon, Jun 11, 2018 at 4:19 PM Marek Vasut wrote:
>> On 06/11/2018 04:10 PM, Geert Uytterhoeven wrote:
>>> On Mon, Jun 11, 2018 at 4:04 PM Marek Vasut wrote:
On 06/11/2018 03:49 PM, Geert Uytterhoeven wrote:
> On Mon,
Add documentation for Aptina MT9V111 image sensor.
Signed-off-by: Jacopo Mondi
---
.../bindings/media/i2c/aptina,mt9v111.txt | 46 ++
1 file changed, 46 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.txt
diff --git
Add V4L2 sensor driver for Aptina MT9V111 CMOS image sensor.
The MT9V111 is a 1/4-Inch CMOS image sensor based on MT9V011 with an
integrated Image Flow Processor.
Signed-off-by: Jacopo Mondi
---
MAINTAINERS |8 +
drivers/media/i2c/Kconfig | 12 +
Hello,
this is a sensor level driver for Aptina MT9V111.
The driver supports YUYV_2X8 output formats and VGA,QVGA,QQVGA,CIF and QCIF
resolution.
The driver allows control of frame rate through s_frame_interval or
V4L2_CID_H/VBLANK control. In order to allow manual frame control, the chip
is
I'd think it would be good to have an Acked-by from someone with a
renesas.com email address to ack the process, just to be very sure. I
don't think it has to be a Rev-by, although that would be welcome, too,
of course.
signature.asc
Description: PGP signature
Signed-off-by: Wolfram Sang
---
arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 5 +
arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dts | 5 +
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts | 5 +
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 5 +
Signed-off-by: Wolfram Sang
---
arch/arm/boot/dts/emev2-kzm9d.dts | 5 +
arch/arm/boot/dts/emev2.dtsi| 5 +
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 5 +
arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi| 5 +
Signed-off-by: Wolfram Sang
---
arch/arm/include/debug/renesas-scif.S | 5 +
arch/arm/mach-shmobile/headsmp-apmu.S | 5 +
arch/arm/mach-shmobile/platsmp-apmu.c | 5 +
arch/arm/mach-shmobile/platsmp-apmu.h | 10 +-
So, here are the first patches to convert files copyright by Renesas to the
SPDX format. I have way more pending, but these are the easiest ones for now.
In 'mach-shmobile', there are a few files left which don't have a clear GPL2
only statement. I want to leave them for now, group the
Hi Geert,
> -Original Message-
> From: Geert Uytterhoeven [mailto:ge...@linux-m68k.org]
> Sent: 11 June 2018 12:41
> To: Biju Das
> Cc: Daniel Lezcano ; Thomas Gleixner
> ; Simon Horman ; Geert
> Uytterhoeven ; Chris Paterson
> ; Fabrizio Castro
> ; Linux-Renesas s...@vger.kernel.org>
Hi Marek,
On Mon, Jun 11, 2018 at 4:19 PM Marek Vasut wrote:
> On 06/11/2018 04:10 PM, Geert Uytterhoeven wrote:
> > On Mon, Jun 11, 2018 at 4:04 PM Marek Vasut wrote:
> >> On 06/11/2018 03:49 PM, Geert Uytterhoeven wrote:
> >>> On Mon, Jun 11, 2018 at 3:39 PM Marek Vasut wrote:
> On
Hi Marek,
On Mon, Jun 11, 2018 at 4:04 PM Marek Vasut wrote:
> On 06/11/2018 03:49 PM, Geert Uytterhoeven wrote:
> > On Mon, Jun 11, 2018 at 3:39 PM Marek Vasut wrote:
> >> On 06/11/2018 03:03 PM, Geert Uytterhoeven wrote:
> >>> On Mon, Jun 11, 2018 at 2:15 PM Marek Vasut wrote:
> On
On Thu, May 31, 2018 at 03:11:33PM +0900, Yoshihiro Shimoda wrote:
> This patch adds role switch support for R-Car SoCs into the USB 3.0
> peripheral driver. Some R-Car SoCs (e.g. R-Car H3) have USB 3.0
> dual-role device controller which has the USB 3.0 xHCI host and
> Renesas USB 3.0 peripheral.
On 06/11/2018 03:49 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Mon, Jun 11, 2018 at 3:39 PM Marek Vasut wrote:
>> On 06/11/2018 03:03 PM, Geert Uytterhoeven wrote:
>>> On Mon, Jun 11, 2018 at 2:15 PM Marek Vasut wrote:
On 06/11/2018 11:56 AM, Geert Uytterhoeven wrote:
> On
On Sun, Jun 10, 2018 at 03:57:10PM +0200, Marek Vasut wrote:
> On 11/17/2017 06:49 PM, Lorenzo Pieralisi wrote:
> > On Fri, Nov 10, 2017 at 10:58:42PM +0100, Marek Vasut wrote:
> >> From: Phil Edworthy
> >>
> >> Most PCIe host controllers support L0s and L1 power states via ASPM.
> >> The R-Car
Hi Marek,
On Mon, Jun 11, 2018 at 3:39 PM Marek Vasut wrote:
> On 06/11/2018 03:03 PM, Geert Uytterhoeven wrote:
> > On Mon, Jun 11, 2018 at 2:15 PM Marek Vasut wrote:
> >> On 06/11/2018 11:56 AM, Geert Uytterhoeven wrote:
> >>> On Mon, Jun 4, 2018 at 7:59 PM Marek Vasut wrote:
> Rather
On 06/11/2018 03:03 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Mon, Jun 11, 2018 at 2:15 PM Marek Vasut wrote:
>> On 06/11/2018 11:56 AM, Geert Uytterhoeven wrote:
>>> On Mon, Jun 4, 2018 at 7:59 PM Marek Vasut wrote:
Rather than hard-coding the quirk topology, which stopped
Hi Marek,
On Mon, Jun 11, 2018 at 2:15 PM Marek Vasut wrote:
> On 06/11/2018 11:56 AM, Geert Uytterhoeven wrote:
> > On Mon, Jun 4, 2018 at 7:59 PM Marek Vasut wrote:
> >> Rather than hard-coding the quirk topology, which stopped scaling,
> >> parse the information from DT. The code looks for
On 06/11/2018 11:56 AM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Mon, Jun 4, 2018 at 7:59 PM Marek Vasut wrote:
>> Rather than hard-coding the quirk topology, which stopped scaling,
>> parse the information from DT. The code looks for all compatible
>> PMICs -- da9036 and da9210 -- and
Rather than hard-coding the quirk topology, which stopped scaling,
parse the information from DT. The code looks for all compatible
PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
to the same pin. If so, the code sends a matching sequence to the
PMIC to deassert the IRQ.
Use devm_mfd_add_devices() instead of plain mfd_add_devices(), which
removes the need for da9063_device_exit() altogether and also for the
.remove callback in da9063-i2c.c .
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc:
Convert the regmap_range tables to use regmap_reg_range() macro.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven
Acked-for-MFD-by: Lee Jones
---
V5: New
Convert the regmap_irq table to use REGMAP_IRQ_REG().
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Acked-by: Steve Twiss
Reviewed-by: Geert Uytterhoeven
Acked-for-MFD-by: Lee Jones
Add type for DA9063L, which is a reduced variant of the DA9063
without RTC block and with less regulators.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven
The model number stored in the struct da9063 is the same for all
variants of the da9063 since it is the chip ID, which is always
the same. Replace that with a separate identifier instead, which
allows us to discern the DA9063 variants by setting the type
based on either DT match or otherwise.
The DA9063L does not have an RTC. Add custom regmap for DA9063L to
prevent access into that register block.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Acked-for-MFD-by: Lee Jones
---
The DA9063L does not have an RTC. Add custom IRQ map for DA9063L to
ignore the Alarm and Tick IRQs from the PMIC.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Acked-for-MFD-by: Lee Jones
The DA9063L does not contain RTC block, unlike the full DA9063.
Split the RTC block into separate mfd cell and register it only
on DA9063.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Add support for DA9063L, which is a reduced variant of the DA9063
with less regulators and without RTC.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Acked-by: Mark Brown
Reviewed-by:
Move the LDOs present only on DA9063 at the end of the list, so that
the DA9063L can simply indicate less LDOs and still share the list of
regulators with DA9063.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc:
Replace DA9063_NUM_IRQ macro which is not used anywhere with
plain ARRAY_SIZE().
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Lee Jones
Cc: Mark Brown
Cc: Steve Twiss
Cc: Wolfram Sang
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven
Acked-for-MFD-by: Lee Jones
Hi Biju,
On Mon, Jun 11, 2018 at 1:21 PM Biju Das wrote:
> > Subject: Re: [PATCH] clocksource/drivers/sh_cmt: wait for CMCNT on init
> > On Fri, Jun 8, 2018 at 6:24 PM Biju Das wrote:
> > > As per section 57A.3.5/69A.3.5/79.A.3.5 of rz/g/r-car gen2/3 hardware
> > > manual,it is mentioned that
Hi Laurent,
On Fri, Jun 8, 2018 at 2:22 PM Laurent Pinchart
wrote:
> The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
> devices are mapped in the memory range usually used by the VSP LUT and
> CLU, which are not present in the VSPD. Fix this by shortening the VSPD
>
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH] clocksource/drivers/sh_cmt: wait for CMCNT on init
>
> Hi Biju,
>
> Thanks for your patch!
>
> On Fri, Jun 8, 2018 at 6:24 PM Biju Das wrote:
> > As per section 57A.3.5/69A.3.5/79.A.3.5 of rz/g/r-car gen2/3 hardware
> > manual,it is
> > Subject: Re: [PATCH] clocksource/drivers/sh_cmt: wait for CMCNT on
> > > diff --git a/drivers/clocksource/sh_cmt.c
> > > b/drivers/clocksource/sh_cmt.c index 70b3cf8..48910df 100644
> > > --- a/drivers/clocksource/sh_cmt.c
> > > +++ b/drivers/clocksource/sh_cmt.c
> > > @@ -328,7 +328,7 @@
On Thu, Jun 7, 2018 at 2:14 PM Yoshihiro Kaneko wrote:
> This patch adds support for r8a77965 (R-Car M3-N)
>
> Signed-off-by: Yoshihiro Kaneko
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
On Wed, Jun 6, 2018 at 8:44 AM Yoshihiro Shimoda
wrote:
> From: Takeshi Kihara
>
> This patch adds USB0_{PWEN,OVC}_{A,B} and USB0_ID pins, groups and
> functions to the R8A77990 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
i.e.
Hi Shimoda-san,
On Wed, Jun 6, 2018 at 8:44 AM Yoshihiro Shimoda
wrote:
> Since the datasheet Rev.1.00 has an error about the USB ID pin name,
> this patch revises it.
>
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.19.
Gr{oetje,eeting}s,
Hi Michel,
On Tue, Jun 5, 2018 at 10:36 AM Michel Pollet
wrote:
> The Renesas R9A06G032 SYSCTRL node description.
>
> Signed-off-by: Michel Pollet
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt
> @@ -0,0 +1,32 @@
> +* Renesas R9A06G032 SYSCTRL
> +
Hi Marek,
On Mon, Jun 4, 2018 at 7:59 PM Marek Vasut wrote:
> Rather than hard-coding the quirk topology, which stopped scaling,
> parse the information from DT. The code looks for all compatible
> PMICs -- da9036 and da9210 -- and checks if their IRQ line is tied
da9063
> to the same pin. If
On Wed, May 30, 2018 at 6:47 AM Viresh Kumar wrote:
> The OPP properties, like "operating-points", should either be present
> for all the CPUs of a cluster or none. If these are present only for a
> subset of CPUs of a cluster then things will start falling apart as soon
> as the CPUs are brought
Hi Simon-san,
> From: Simon Horman, Sent: Friday, June 8, 2018 5:19 PM
>
> On Wed, Jun 06, 2018 at 06:52:06PM +0900, Yoshihiro Shimoda wrote:
> > This patch adds USB2.0 PHY and Host(EHCI/OHCI) nodes and
> > enables them for R-Car E3 Ebisu board.
> >
> > Signed-off-by: Yoshihiro Shimoda
> > ---
Hi Sergie,
Thanks for the feedback.
> Subject: Re: [PATCH] clocksource/drivers/sh_cmt: wait for CMCNT on init
>
> Hello!
>
> On 6/8/2018 7:19 PM, Biju Das wrote:
>
> > As per section 57A.3.5/69A.3.5/79.A.3.5 of rz/g/r-car gen2/3 hardware
>
> 79A.3.5?
Will fix this.
> > manual,it is
On Thu, Jun 07, 2018 at 09:11:34PM +0900, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
>
> Based on a similar patches of the R8A7796 device tree
> by Harunobu Kurokawa .
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro
On Thu, Jun 07, 2018 at 09:11:33PM +0900, Yoshihiro Kaneko wrote:
> This patch adds support for r8a77965 (R-Car M3-N)
>
> Signed-off-by: Yoshihiro Kaneko
Acked-by: Simon Horman
> ---
> Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Fri, Jun 08, 2018 at 05:27:19PM +0300, Laurent Pinchart wrote:
> Hi Sergei,
>
> On Thursday, 7 June 2018 23:17:03 EEST Sergei Shtylyov wrote:
> > Hello!
> >
> > Here's the set of 5 patches against Simon Horman's 'renesas.git' repo's
> > 'renesas-devel-20180604-v4.17' tag. We're adding the
On Sun, Jun 10, 2018 at 09:22:46PM +0300, Sergei Shtylyov wrote:
> This PHY is still mostly undocumented -- the only documented registers
> exist on R-Car V3H (R8A77980) SoC. Add the corresponding device tree
> bindings.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> Changes in version 2:
> -
On Sun, Jun 10, 2018 at 09:24:13PM +0300, Sergei Shtylyov wrote:
> This PHY is still mostly undocumented -- the only documented registers
> exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down
> state after a reset and thus we must power it up for PCIe to work...
>
>
Hi Biju,
Thanks for your patch!
On Fri, Jun 8, 2018 at 6:24 PM Biju Das wrote:
> As per section 57A.3.5/69A.3.5/79.A.3.5 of rz/g/r-car gen2/3 hardware
> manual,it is mentioned that we need to provide 2 cycles in counter input
> clock (RCLK) for reflecting written data to counter behaviour.
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