Signed-off-by: Wolfram Sang
Acked-by: Yoshihiro Shimoda
Acked-by: Kuninori Morimoto
---
arch/arm/include/debug/renesas-scif.S | 5 +
arch/arm/mach-shmobile/headsmp-apmu.S | 5 +
arch/arm/mach-shmobile/platsmp-apmu.c | 5 +
Due to a merge conflict, this got accidently dropped. Add it again.
Signed-off-by: Wolfram Sang
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index
So, here is the rebased patch adding SPDX identifiers to mach-shmobile.
And a fixup patch to add the missing identifier in r8a7796.dtsi.
Thanks,
Wolfram
Wolfram Sang (2):
ARM: shmobile: convert to SPDX identifier
arm64: dts: renesas: r8a7796 add missing SPDX identifier
> This does not apply cleanly on top of renesas-devel-20180608-v4.17.
>
> Please rebase.
Sorry, seems I missed an update to renesas/devel :( Will rebase and
resend.
signature.asc
Description: PGP signature
Hi Simon,
> I applied this by hand, resolving the conflict in r8a7796.dtsi.
Thanks for doing this Simon.
> The result is below. Wolfram, please check it.
I am afraid there is something missing, though...
> arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts| 5 +
>
When using the generic functions for setting SCL/SDA high, we make sure
necessary delays are met.
Signed-off-by: Wolfram Sang
---
drivers/i2c/algos/i2c-algo-bit.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/algos/i2c-algo-bit.c
If SCL was low but SDA high, we would simply raise SCL but not send a
STOP. To make sure we always send STOP initially, lower both lines
first.
Signed-off-by: Wolfram Sang
---
drivers/i2c/algos/i2c-algo-bit.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/i2c/algos/i2c-algo-bit.c
This series tries to fix Bugzilla bug #200045. I can't reproduce the issue, so
this is my buest guess what could be wrong so far.
cerg2010cerg2...@mail.ru: can you try these patches? Preferably, one after the
other seperately?
Thank you very much for the report!
Wolfram Sang (2):
i2c: algos:
On 06/13/2018 01:28 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
[...]
But wait, since we control which machines this code runs on , can't we
assure they have valid DTs ? This situation with invalid DT starts to
look a bit hypothetical to me.
>>>
>>> That assumes you keep the
On 06/13/2018 11:09 PM, Sergei Shtylyov wrote:
> Here's the set of 5 patches against Simon Horman's 'renesas.git' repo's
Only 2, not 5 anymore. :-)
> 'renesas-devel-20180613-v4.17' tag and the Condor/V3HSK TD patches adding
Only 1 DT patch, not 2 anymore. :-)
> Ethernet PHY IR
Define the Condor/V3HSK board dependent parts of the DU and LVDS device
nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and
Analog Devices ADV7511W HDMI transmitter...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Describe the interconnected FCPVD0, VSPD0, DU, and LVDS0 devices in the
R8A77980 device tree...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Reviewed-by: Laurent Pinchart
---
Changes in version 3:
- merged in the
Hello!
Here's the set of 5 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20180613-v4.17' tag and the Condor/V3HSK TD patches adding
Ethernet PHY IRQs. We're adding the R8A77980 FCPVD/VSPD/DU/LVDS device nodes
and then describing the LVDS decoder and HDMI encoder connected
On Wed, Jun 13, 2018 at 04:52:52PM +0100, Lorenzo Pieralisi wrote:
> On Wed, Jun 13, 2018 at 08:53:08AM -0500, Bjorn Helgaas wrote:
> > On Wed, Jun 13, 2018 at 01:54:51AM +0200, Marek Vasut wrote:
> > > On 06/11/2018 03:59 PM, Bjorn Helgaas wrote:
> > > > On Sun, Jun 10, 2018 at 03:57:10PM +0200,
Hi Simon,
On Wed, Jun 13, 2018 at 4:36 PM Simon Horman wrote:
> On Wed, Jun 13, 2018 at 01:21:34PM +0200, Geert Uytterhoeven wrote:
> > On Wed, Jun 13, 2018 at 1:06 PM Simon Horman wrote:
> > > On Mon, Jun 11, 2018 at 02:15:13PM +0200, Marek Vasut wrote:
> > > > Rather than hard-coding the
d-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
>
> ---
Forgot to add the the patch is against the 'renesas-devel-20180613-v4.17'
tag.
[...]
MBR, Sergei
Specify Ethernet PHY IRQs in the Condor/V3HSK board device trees, now that
we have the GPIO support (previously phylib had to resort to polling).
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
Changes in version
On Wed, Jun 13, 2018 at 08:53:08AM -0500, Bjorn Helgaas wrote:
> On Wed, Jun 13, 2018 at 01:54:51AM +0200, Marek Vasut wrote:
> > On 06/11/2018 03:59 PM, Bjorn Helgaas wrote:
> > > On Sun, Jun 10, 2018 at 03:57:10PM +0200, Marek Vasut wrote:
> > >> On 11/17/2017 06:49 PM, Lorenzo Pieralisi wrote:
Hello!
On 06/13/2018 06:13 PM, Simon Horman wrote:
> From: Takeshi Kihara
>
> This patch adds the device nodes for SCIF-{0,1,3,4,5} serial ports,
Why hyphen between SCIF and # here in the subject?
> incl. clocks and power domain.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Ulrich
/arm64/boot/dts/renesas/r8a77995.dtsi | 70 +++
1 file changed, 70 insertions(+)
Based on renesas-devel-20180613-v4.17
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 1de6ffca4772..16cbb34692ad 100644
--- a/arch
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35 +++
1 file changed, 35 insertions(+)
Based on renesas-devel-20180613-v4.17
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 16cbb34692ad..0a9caf9cdc86 100644
On Wed, Jun 13, 2018 at 01:21:34PM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Jun 13, 2018 at 1:06 PM Simon Horman wrote:
> > On Mon, Jun 11, 2018 at 02:15:13PM +0200, Marek Vasut wrote:
> > > Rather than hard-coding the quirk topology, which stopped scaling,
> > > parse the
On Wed, Jun 13, 2018 at 01:54:51AM +0200, Marek Vasut wrote:
> On 06/11/2018 03:59 PM, Bjorn Helgaas wrote:
> > On Sun, Jun 10, 2018 at 03:57:10PM +0200, Marek Vasut wrote:
> >> On 11/17/2017 06:49 PM, Lorenzo Pieralisi wrote:
> >>> On Fri, Nov 10, 2017 at 10:58:42PM +0100, Marek Vasut wrote:
>
From: Geert Uytterhoeven
The quirk for R-Car E3 ES1.0 added in commit 086b399965a7ee7e ("soc:
renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}") makes the 3DG-A
PM domain a subdomain of the 3DG-B PM domain. However, registering
3DG-A with its parent fails silently, as the 3DG-B PM domain
On Fri, Jun 08, 2018 at 07:49:43PM +0300, Laurent Pinchart wrote:
> Hi Sergei,
>
> (CC'ing Olof)
>
> On Friday, 8 June 2018 19:41:01 EEST Sergei Shtylyov wrote:
> > On 06/08/2018 03:21 PM, Laurent Pinchart wrote:
> > > The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
> > >
Hi Simon,
On Wed, Jun 13, 2018 at 1:06 PM Simon Horman wrote:
> On Mon, Jun 11, 2018 at 02:15:13PM +0200, Marek Vasut wrote:
> > Rather than hard-coding the quirk topology, which stopped scaling,
> > parse the information from DT. The code looks for all compatible
> > PMICs -- da9063 and da9210
On Mon, Jun 11, 2018 at 11:49:37PM +0900, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang
> ---
> arch/arm/include/debug/renesas-scif.S | 5 +
> arch/arm/mach-shmobile/headsmp-apmu.S | 5 +
> arch/arm/mach-shmobile/platsmp-apmu.c | 5 +
>
On Tue, Jun 12, 2018 at 02:27:10AM +, Yoshihiro Shimoda wrote:
> Hi Wolfram-san,
>
> > From: Wolfram Sang, Sent: Monday, June 11, 2018 11:50 PM
> >
> > Signed-off-by: Wolfram Sang
> > ---
>
> This patch looks good. So,
>
> Acked-by: Yoshihiro Shimoda
Thanks, applied.
On Tue, Jun 12, 2018 at 02:27:05AM +, Yoshihiro Shimoda wrote:
> Hi Wolfram-san,
>
> Thank you for the patch!
>
> > From: Wolfram Sang, Sent: Monday, June 11, 2018 11:50 PM
> >
> > Signed-off-by: Wolfram Sang
> > ---
> > arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts | 5 +
> >
On Mon, Jun 11, 2018 at 02:15:13PM +0200, Marek Vasut wrote:
> Rather than hard-coding the quirk topology, which stopped scaling,
> parse the information from DT. The code looks for all compatible
> PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
> to the same pin. If so, the
On Mon, Jun 11, 2018 at 10:06:51AM +0200, Simon Horman wrote:
> On Sun, Jun 10, 2018 at 09:24:13PM +0300, Sergei Shtylyov wrote:
> > This PHY is still mostly undocumented -- the only documented registers
> > exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down
> > state after
On Mon, Jun 11, 2018 at 10:28:22AM +0200, Simon Horman wrote:
> On Thu, Jun 07, 2018 at 09:11:34PM +0900, Yoshihiro Kaneko wrote:
> > From: Takeshi Kihara
> >
> > This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
> >
> > Based on a similar patches of the R8A7796 device tree
> > by
In case of a bi-directional transfer, receive DMA may complete in the
rcar-dmac driver before transmit DMA, due to scheduling latencies.
As the MSIOF driver waits for completion of the receive DMA only, it may
submit the next transmit DMA request before the previous one has
completed.
Make the
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