ion so that the constants
don't need to be defined in multiple places.
Signed-off-by: Doug Berger <open...@gmail.com>
Signed-off-by: Florian Fainelli <f.faine...@gmail.com>
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/include/asm/cputype.h | 10 ++
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Acked-b
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 inserti
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org&g
correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Acked-by: Maxime Ri
well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Acked-by: Maxime Ripard <m
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 +
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Acked-by: Maxime Ripard <maxime.rip...@bootlin.com>
---
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/mc
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Tested-by: Geert Uytterhoeven
- Thanks to Maxime's review: order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Doug Berger (1):
ARM: Allow this header to be included by assembly files
Mylèn
Hi Maxime,
On Wed, 2 May 2018 15:08:42 +0200
Maxime Ripard <maxime.rip...@bootlin.com> wrote:
> On Tue, May 01, 2018 at 02:31:26PM +0200, Mylène Josserand wrote:
> > Add the initialization of CNTVOFF for sun8i-a83t.
> >
> > For boot CPU, create a new machine that
ion so that the constants
don't need to be defined in multiple places.
Signed-off-by: Doug Berger <open...@gmail.com>
Signed-off-by: Florian Fainelli <f.faine...@gmail.com>
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/include/asm/cputype.h | 10 ++
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org&g
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mac
well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 inserti
correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Acked-by: Maxime Ri
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Tested-by: Geert Uytterhoeven
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/mc_smp
) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
2
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 +
og and commit title of my last patch (see
patch 05).
Doug Berger (1):
ARM: Allow this header to be included by assembly files
Mylène Josserand (11):
ARM: sunxi: smp: Move assembly code into a file
ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
ARM: dts: sun8i: Add R_CPUCFG de
Hello,
On Mon, 23 Apr 2018 10:14:23 +0200
Maxime Ripard <maxime.rip...@bootlin.com> wrote:
> On Fri, Apr 20, 2018 at 11:10:19PM +0200, Mylène Josserand wrote:
> > To prepare the support of sun8i-a83t, add a field in the smp_data
> > structure to know if we are on su
Hello Maxime,
Thanks for your review.
On Mon, 23 Apr 2018 10:16:09 +0200
Maxime Ripard <maxime.rip...@bootlin.com> wrote:
> On Fri, Apr 20, 2018 at 11:10:17PM +0200, Mylène Josserand wrote:
> > Add the initialization of CNTVOFF for sun8i-a83t.
> >
> > For boo
Hello,
On Fri, 20 Apr 2018 23:10:11 +0200
Mylène Josserand <mylene.josser...@bootlin.com> wrote:
> Hello everyone,
>
> This is a V7 of my series that adds SMP support for Allwinner sun8i-a83t.
> Based on sunxi's tree, sunxi/for-next branch.
> Depends on a patch from Do
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org&g
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 inserti
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/mc_smp
well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/headsm
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
2
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Tested-by: Geert Uytterhoeven
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 +
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mac
order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Mylène Josserand (11):
ARM: sunxi: smp: Move assembly code into a file
ARM: dts: sun8i: Add CPUCFG
order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Mylène Josserand (11):
ARM: sunxi: smp: Move assembly code into a file
ARM: dts: sun8i: Add CPUCFG
7, 2018 at 7:17 PM, Maxime Ripard
> >> <maxime.rip...@bootlin.com> wrote:
> >> > On Tue, Apr 17, 2018 at 11:12:41AM +0800, Chen-Yu Tsai wrote:
> >> >> On Tue, Apr 17, 2018 at 5:50 AM, Mylène Josserand
> >> >> <mylene.josser...@b
Hello Simon,
On Wed, 18 Apr 2018 15:48:55 +0200
Simon Horman <ho...@verge.net.au> wrote:
> On Wed, Apr 18, 2018 at 12:03:27PM +0200, Mylène Josserand wrote:
> > Hello,
> >
> > On Wed, 18 Apr 2018 11:36:27 +0200
> > Geert Uytterhoeven <ge...@linux-m68
Hello,
On Wed, 18 Apr 2018 11:36:27 +0200
Geert Uytterhoeven <ge...@linux-m68k.org> wrote:
> Hi Mylène,
>
> On Mon, Apr 16, 2018 at 11:50 PM, Mylène Josserand
> <mylene.josser...@bootlin.com> wrote:
> > Now that a common function is available for CNTVOFF's
>
Hello Geert,
On Wed, 18 Apr 2018 11:30:47 +0200
Geert Uytterhoeven <ge...@linux-m68k.org> wrote:
> Allo Mylène,
>
> On Mon, Apr 16, 2018 at 11:50 PM, Mylène Josserand
> <mylene.josser...@bootlin.com> wrote:
> > The CNTVOFF register from arch timer is uninit
Hello,
On Tue, 17 Apr 2018 11:21:02 +0300
Sergei Shtylyov <sergei.shtyl...@cogentembedded.com> wrote:
> Hello!
>
> On 4/17/2018 12:50 AM, Mylène Josserand wrote:
>
> > To prepare the support for sun8i-a83t, rename the variable name
>
> s/variable/macro/ ma
select ARM_CPU_SUSPEND
>
> Because otherwise when I'm building kernel just for sun8i and I don't have
> sun9i
> enabled, this new SMP code for A83T (which is sun8i) will not be built.
>
True, I forgot to add this, thanks!
Best regards,
Mylène
--
Mylène Josserand, Bo
Hello Maxime,
On Tue, 17 Apr 2018 13:20:38 +0200
Maxime Ripard <maxime.rip...@bootlin.com> wrote:
> On Mon, Apr 16, 2018 at 11:50:30PM +0200, Mylène Josserand wrote:
> > @@ -535,8 +599,12 @@ static int sunxi_mc_smp_cpu_kill(unsigned int l_cpu)
> > return !ret;
> >
rding
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Mylène Josserand (11):
ARM: sunxi: smp: Move assembly code into a file
ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
ARM: dt
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Re
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mac
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 ++
well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
ar
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 inserti
correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/headsm
To prepare the support for sun8i-a83t, rename the variable name
that handles the power-off of clusters because it is different from
sun9i-a80 to sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/mc_smp
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-shmobile/common.h | 1 -
arch/arm/mach-shmobile/headsmp-apmu.S
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 +
) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand <mylene.josser...@bootlin.com>
---
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
1 file changed, 136 insertions(+), 15 del
62 matches
Mail list logo
