Hi Shoji-san,
> From: Yasushi SHOJI
> Sent: Thursday, May 18, 2017 2:10 PM
>
> Hi,
>
> On Wed, May 17, 2017 at 4:47 PM, Yoshihiro Shimoda
> wrote:
> >>
> >> drivers/mmc/host/tmio_mmc_pio.c | 7 ---
> >> 1 file changed, 4 insertions(+), 3 deletions(-)
> >>
Hi Wolfram-san,
> From: Wolfram Sang
> Sent: Thursday, May 18, 2017 3:18 PM
>
> Shimoda-san,
>
> > This patch enables CTL_TRANSACTION_CTL to 0x0001 in tmio_mmc_host_probe().
> > But, I have a concern we have to disable/enable the register in
> > suspend/resume()
> > because registers setting
Shimoda-san,
> This patch enables CTL_TRANSACTION_CTL to 0x0001 in tmio_mmc_host_probe().
> But, I have a concern we have to disable/enable the register in
> suspend/resume()
> because registers setting is possible to be cleared after resume.
> What do you think?
This is very likely true. I'll
Hi,
On Wed, May 17, 2017 at 4:47 PM, Yoshihiro Shimoda
wrote:
>>
>> drivers/mmc/host/tmio_mmc_pio.c | 7 ---
>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mmc/host/tmio_mmc_pio.c
>> b/drivers/mmc/host/tmio_mmc_pio.c
>> index
Hi Wolfram-san,
> -Original Message-
> From: Wolfram Sang
> Sent: Saturday, December 10, 2016 1:52 AM
>
> The master bit to enable SDIO interrupts can only be accessed if
> SCLKDIVEN bit allows that. However, the core uses the SDIO enable
> callback at times when SCLKDIVEN forbids the
On 9 December 2016 at 17:51, Wolfram Sang
wrote:
> The master bit to enable SDIO interrupts can only be accessed if
> SCLKDIVEN bit allows that. However, the core uses the SDIO enable
> callback at times when SCLKDIVEN forbids the change. This leads to
> "timeout