Re: [PATCH v2 01/19] clk: renesas: cpg-mssr: Add support for R-Car M3-N

Hi Jacopo, On Tue, Feb 20, 2018 at 4:12 PM, Jacopo Mondi wrote: > Initial support for R-Car M3-N (r8a77965), including core and module > clocks. > > Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual: > Hardware (Rev. 0.80, Oct 31, 2017)". > >

Re: [PATCH] arm64: defconfig: enable R8A77965 SoC

Hi Simon, On Fri, Feb 23, 2018 at 4:00 PM, Simon Horman wrote: > On Fri, Feb 23, 2018 at 10:19:45AM +0100, Geert Uytterhoeven wrote: >> On Fri, Feb 23, 2018 at 9:51 AM, Simon Horman >> wrote: >> > Enable the Renesas R-Car M3-W (R8A77965) SoC in

Re: [PATCH 1/4] pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions

On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven wrote: > Would there be a use case for vin4_data4 and vin5_data4, or is that > mode only supported on R-Car H2? The docs don't mention it, so I would assume it's not supported. CU Uli

Re: [PATCH 1/4] pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions

Hi Ulrich, On Mon, Feb 26, 2018 at 10:02 AM, Ulrich Hecht wrote: > On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven > wrote: >> Would there be a use case for vin4_data4 and vin5_data4, or is that >> mode only supported on R-Car H2? > >

[PATCH] media: platform: Drop OF dependency of VIDEO_RENESAS_VSP1

VIDEO_RENESAS_VSP1 depends on ARCH_RENESAS && OF. As ARCH_RENESAS implies OF, the latter can be dropped. Signed-off-by: Geert Uytterhoeven --- drivers/media/platform/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 3/8] arm64: dts: renesas: r8a7795: Set EtherAVB phy mode to "rgmii"

Set the "phy-mode" property of EtherAVB device to "rgmii" and let board files override it if the installed PHY layer provides delays for the RX/TX channels. Signed-off-by: Jacopo Mondi --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +- 1 file changed, 1

[PATCH 2/8] arm64: dts: renesas: r8a7796: Set EtherAVB phy mode to "rgmii"

Set the "phy-mode" property of EtherAVB device to "rgmii" and let board files override it if the installed PHY layer provides delays for the RX/TX channels. Signed-off-by: Jacopo Mondi --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +- 1 file changed, 1

[PATCH 4/8] arm64: dts: renesas: r8a77995: Set EtherAVB phy mode to "rgmii"

Set the "phy-mode" property of EtherAVB device to "rgmii" and let board files override it if the installed PHY layer provides delays for the RX/TX channels. Signed-off-by: Jacopo Mondi --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +- 1 file changed, 1

[PATCH 1/8] arm64: dts: renesas: salvator-common: Override EtherAVB phy-mode

As the PHY interface installed on the Salvator-X[S] board, provides TX channel delay, make the "phy-mode" property a board-specific one, meant to override the one specified in the SoC DTSI. Follow up patches will reset the SoC DTSI to use "rgmii" mode and let the board file override that.

[PATCH 5/8] dt-bindings: iommu/ipmmu-vmsa: Add R-Car M3-N (R8A77965)

Add Renesas R-Car M3-N (R8A77965) compat string to IPMMU DT bindings documentation. Signed-off-by: Jacopo Mondi --- Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [PATCH 8/8] arm64: dts: renesas: r8a77965: Add EtherAVB device node

Hi Jacopo, On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > Populate the ethernet@e680 device node to enable Ethernet interface > for R-Car M3-N (R8A77965) SoC. > > Signed-off-by: Jacopo Mondi > Reviewed-by: Geert Uytterhoeven

Re: [PATCH 5/8] dt-bindings: iommu/ipmmu-vmsa: Add R-Car M3-N (R8A77965)

On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > Add Renesas R-Car M3-N (R8A77965) compat string to IPMMU DT bindings > documentation. > > Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven

Re: [PATCH 0/8] R-Car M3-N: Enable EtherAVB device node

Hi Jacopo, On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > as discussed with you Sergei and Geert, in order to enable EtherAVB for > R8A77965 we first wanted to make the phy-mode "rgmii-txid" a board specific > property for all other SoCs. Thanks for your

Re: [PATCH 1/8] arm64: dts: renesas: salvator-common: Override EtherAVB phy-mode

On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > As the PHY interface installed on the Salvator-X[S] board, provides TX > channel delay, make the "phy-mode" property a board-specific one, meant > to override the one specified in the SoC DTSI. > > Follow up patches

Re: [PATCH 6/8] iommu/ipmmu-vmsa: Hook up R8A77965 DT matching code

On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > Add support for R-Car M3-N (R8A77965) SoC IPMMUs. > > Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s,

Re: [PATCH v2 4/5] i2c: rcar: document R8A77995 bindings

On Mon, Jan 29, 2018 at 04:45:47PM +0100, Ulrich Hecht wrote: > R-Car D3 (R8A77995) SoC has a R-Car Gen3-compatible I2C controller. > > Signed-off-by: Ulrich Hecht > Reviewed-by: Geert Uytterhoeven Fixed $subject according to Rob's

[PATCH 0/4] dt-bindings: arm: Improve Renesas Board Documentation

Hi Simon, Magnus, This patch series improves the DT binding documentation for Renesas boards. Thanks! Geert Uytterhoeven (4): dt-bindings: arm: Document SoC compatible value for Armadillo-800 EVA dt-bindings: arm: Document Renesas V3MSK and Wheat board part numbers dt-bindings:

[PATCH 3/4] dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-X board

The Renesas Salvator-X development board can be equipped with an R-Car H3, M3-W, or M3-N SiP, which are pin-compatible. Document board part number and compatible values for the version with R-Car M3-N. The board part number was extracted from a big patch by Takeshi Kihara in the BSP.

[PATCH 2/4] dt-bindings: arm: Document Renesas V3MSK and Wheat board part numbers

The DT binding documentation for the Renesas V3MSK and Wheat boards lacked board part numbers. Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/arm/shmobile.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 1/4] dt-bindings: arm: Document SoC compatible value for Armadillo-800 EVA

The compatible property of the root node in a DTS for Atmark Techno Armadillo-800 EVA should include the compatible value for the R-Mobile A1 SoC, too. Fixes: d2c2a0776899ba2d ("ARM: shmobile: Add platform device tree bindings documentation") Signed-off-by: Geert Uytterhoeven

[PATCH 4/4] dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-XS board

The Renesas Salvator-XS development board can be equipped with an R-Car H3, M3-W, or M3-N SiP, which are pin-compatible. Document board part number and compatible values for the version with R-Car M3-N. Signed-off-by: Geert Uytterhoeven ---

Re: [PATCH 4/8] arm64: dts: renesas: r8a77995: Set EtherAVB phy mode to "rgmii"

On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > Set the "phy-mode" property of EtherAVB device to "rgmii" and let board > files override it if the installed PHY layer provides delays for the > RX/TX channels. > > Signed-off-by: Jacopo Mondi

[PATCH 0/8] R-Car M3-N: Enable EtherAVB device node

Hi Simon, as discussed with you Sergei and Geert, in order to enable EtherAVB for R8A77965 we first wanted to make the phy-mode "rgmii-txid" a board specific property for all other SoCs. This series adds the phy-mode property to salvator-common.dtsi and reset the one for

Re: [PATCH net-next] sh_eth: TSU_QTAG0/1 registers the same as TSU_QTAGM0/1

From: Sergei Shtylyov Date: Sat, 24 Feb 2018 20:28:16 +0300 > The TSU_QTAG0/1 registers found in the Gigabit Ether controllers actually > have the same long name as the TSU_QTAGM0/1 registers in the early Ether > controllers: Qtag Addition/Deletion Set

[PATCH 8/8] arm64: dts: renesas: r8a77965: Add EtherAVB device node

Populate the ethernet@e680 device node to enable Ethernet interface for R-Car M3-N (R8A77965) SoC. Signed-off-by: Jacopo Mondi Reviewed-by: Geert Uytterhoeven --- v1 -> v2: - Replace ALWAYS_ON power area identifier with numeric constant

[PATCH 7/8] arm64: dts: renesas: r8a77965: Add IPMMU mm and ds0 blocks

Add IPMMU device nodes for mm and ds0 domains. "ipmmu_ds0" is a dependency for EtherAVB enablement and it has "ipmmu_mm" as it main ipmmu. Signed-off-by: Jacopo Mondi --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 17 + 1 file changed, 17

[PATCH 6/8] iommu/ipmmu-vmsa: Hook up R8A77965 DT matching code

Add support for R-Car M3-N (R8A77965) SoC IPMMUs. Signed-off-by: Jacopo Mondi --- drivers/iommu/ipmmu-vmsa.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 933a3da..6a0e714 100644 ---

Re: [PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

From: Sergei Shtylyov Date: Sat, 24 Feb 2018 22:41:45 +0300 > It appears that the single port Ether controllers having TSU (like SH7734/ > R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100 > currently has -- they also don't have the TSU

Re: [PATCH 2/8] arm64: dts: renesas: r8a7796: Set EtherAVB phy mode to "rgmii"

On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > Set the "phy-mode" property of EtherAVB device to "rgmii" and let board > files override it if the installed PHY layer provides delays for the > RX/TX channels. > > Signed-off-by: Jacopo Mondi

Re: [PATCH 3/8] arm64: dts: renesas: r8a7795: Set EtherAVB phy mode to "rgmii"

On Mon, Feb 26, 2018 at 6:57 PM, Jacopo Mondi wrote: > Set the "phy-mode" property of EtherAVB device to "rgmii" and let board > files override it if the installed PHY layer provides delays for the > RX/TX channels. > > Signed-off-by: Jacopo Mondi

[PATCH v2 2/2] arm64: dts: renesas: eagle: add I2C0 support

Define the Eagle board dependent part of the I2C0 device node. The I2C0 bus is populated by ON Semiconductor PCA9653 I/O expander and Analog Devices ADV7511W HDMI transmitter (but we're only describing the former chip now). Based on the original (and large) patch by Vladimir Barinov.

[PATCH] watchdog: renesas_wdt: adapt timer setup to recommended procedure

The datasheet says we should stop the timer before changing the clock divider. So, let's meet that recommendation. Signed-off-by: Wolfram Sang --- drivers/watchdog/renesas_wdt.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git

[PATCH v2 0/2] Add R8A77970/Eagle I2C support

Hello! Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's 'renesas-devel-20180226-v4.16-rc3' tag. We're adding the R8A77970 I2C nodes and then describing the PCA9654 I/O expander connected to the I2C0 bus. [1/2] arm64: dts: renesas: r8a77970: add I2C support [2/2] arm64: dts

Re: [PATCH] DT: net: renesas,ravb: document R8A77980 bindings

From: Simon Horman Date: Mon, 26 Feb 2018 11:58:24 +0100 > On Sat, Feb 24, 2018 at 09:53:17PM -0500, David Miller wrote: >> From: Sergei Shtylyov >> Date: Sat, 24 Feb 2018 21:01:15 +0300 >> >> > On 02/01/2018 11:13 PM, Sergei Shtylyov

Re: [PATCH] watchdog: renesas_wdt: adapt timer setup to recommended procedure

On Mon, Feb 26, 2018 at 10:49:05PM +0100, Wolfram Sang wrote: > The datasheet says we should stop the timer before changing the clock > divider. So, let's meet that recommendation. > > Signed-off-by: Wolfram Sang > --- > drivers/watchdog/renesas_wdt.c | 9

[PATCH 06/15] v4l: vsp1: Share duplicated DRM pipeline configuration code

Move the duplicated DRM pipeline configuration code to a function and call it from vsp1_du_setup_lif() and vsp1_du_atomic_flush(). Signed-off-by: Laurent Pinchart --- drivers/media/platform/vsp1/vsp1_drm.c | 95 +++--- 1

[PATCH 13/15] v4l: vsp1: Assign BRU and BRS to pipelines dynamically

The VSPDL variant drives two DU channels through two LIF and two blenders, BRU and BRS. The DU channels thus share the five available VSPDL inputs and expose them as five KMS planes. The current implementation assigns the BRS to the second LIF and thus artificially limits the number of planes for

[PATCH 10/15] v4l: vsp1: Move DRM pipeline output setup code to a function

In order to make the vsp1_du_setup_lif() easier to read, and for symmetry with the DRM pipeline input setup, move the pipeline output setup code to a separate function. Signed-off-by: Laurent Pinchart --- drivers/media/platform/vsp1/vsp1_drm.c | 107

[PATCH 05/15] v4l: vsp1: Use vsp1_entity.pipe to check if entity belongs to a pipeline

The DRM pipeline handling code uses the entity's pipe list head to check whether the entity is already included in a pipeline. This method is a bit fragile in the sense that it uses list_empty() on a list_head that is a list member. Replace it by a simpler check for the entity pipe pointer.

[PATCH 14/15] v4l: vsp1: Add BRx dynamic assignment debugging messages

Dynamic assignment of the BRU and BRS to pipelines is prone to regressions, add messages to make debugging easier. Keep it as a separate commit to ease removal of those messages once the code will deem to be completely stable. Signed-off-by: Laurent Pinchart

[PATCH 07/15] v4l: vsp1: Move DRM atomic commit pipeline setup to separate function

The DRM pipeline setup code used at atomic commit time is similar to the setup code used when enabling the pipeline. Move it to a separate function in order to share it. Signed-off-by: Laurent Pinchart --- drivers/media/platform/vsp1/vsp1_drm.c | 347

Re: [PATCH v3 0/2] mmc: renesas_sdhi: add eMMC HS400 mode support

On 13 February 2018 at 13:33, Simon Horman wrote: > Hi, > > this patch-set provides SDHI driver support for eMMC HS400. > > Based on mmc/next > > Dependencies for applying these patches: none > > Dependencies to test eMMC HS400: > * [PATCH] clk: renesas: rcar-gen3: Fix

[PATCH v2 1/2] arm64: dts: renesas: r8a77970: add I2C support

Define the generic R8A77970 parts of the I2C[0-4] device node. Based on the original (and large) patch by Daisuke Matsushita . Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov

[PATCH 12/15] v4l: vsp1: Generalize detection of entity removal from DRM pipeline

When disabling a DRM plane, the corresponding RPF is only marked as removed from the pipeline in the atomic update handler, with the actual removal happening when configuring the pipeline at atomic commit time. This is required as the RPF has to be disabled in the hardware, which can't be done

[PATCH 15/15] v4l: vsp1: Rename BRU to BRx

Some VSP instances have two blending units named BRU (Blend/ROP Unit) and BRS (Blend/ROP Sub unit). The BRS is a smaller version of the BRU with only two inputs, but otherwise offers similar features and offers the same register interface. The BRU and BRS can be used exchangeably in VSP pipelines

[PATCH 09/15] v4l: vsp1: Replace manual DRM pipeline input setup in vsp1_du_setup_lif

The vsp1_du_setup_lif() function setups the DRM pipeline input manually. This duplicates the code from the vsp1_du_pipeline_setup_input() function. Replace the manual implementation by a call to the function. As the pipeline has no enabled input in vsp1_du_setup_lif(), the

[PATCH 03/15] v4l: vsp1: Remove unused field from vsp1_drm_pipeline structure

The vsp1_drm_pipeline enabled field is set but never used. Remove it. Signed-off-by: Laurent Pinchart --- drivers/media/platform/vsp1/vsp1_drm.c | 4 drivers/media/platform/vsp1/vsp1_drm.h | 2 -- 2 files changed, 6 deletions(-) diff --git

[PATCH 11/15] v4l: vsp1: Add per-display list completion notification support

Display list completion is already reported to the frame end handler, but that mechanism is global to all display lists. In order to implement BRU and BRS reassignment in DRM pipelines we will need to wait for completion of a particular display list. Extend the display list and frame end handler

[PATCH 00/15] R-Car VSP1: Dynamically assign blend units to display pipelines

Hello, On R-Car H3 ES2.0+ and M3-N SoCs, two display pipelines are served by the same VSP instance (named VSPDL). The VSPDL includes two blending units named BRU and BRS, unlike the other display-related VSPD that serves a single display channel with a single blending unit. The VSPDL has five

[PATCH 04/15] v4l: vsp1: Store pipeline pointer in vsp1_entity

Various types of objects subclassing vsp1_entity currently store a pointer to the pipeline. Move the pointer to vsp1_entity to simplify the code and avoid storing the pipeline in more entity subclasses later. Signed-off-by: Laurent Pinchart ---

[PATCH 02/15] v4l: vsp1: Remove outdated comment

The entities in the pipeline are all started when the LIF is setup. Remove the outdated comment that state otherwise. Signed-off-by: Laurent Pinchart --- drivers/media/platform/vsp1/vsp1_drm.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-)

[PATCH 08/15] v4l: vsp1: Setup BRU at atomic commit time

To implement fully dynamic plane assignment to pipelines, we need to reassign the BRU and BRS to the DRM pipelines in the atomic commit handler. In preparation for this setup factor out the BRU source pad code and call it both at LIF setup and atomic commit time. Signed-off-by: Laurent Pinchart

[PATCH 01/15] v4l: vsp1: Don't start/stop media pipeline for DRM

The DRM support code manages a pipeline of VSP entities, each backed by a media entity. When starting or stopping the pipeline, it starts and stops the media pipeline through the media API in order to store the pipeline pointer in every entity. The driver doesn't use the pipe pointer in media

Re: [PATCH] dt-bindings: i2c: sh_mobile: Document R-Car M3-N support

On Mon, Feb 26, 2018 at 04:26:43PM +0100, Geert Uytterhoeven wrote: > Document support for the IIC Bus Interface for DVFS (IIC for DVFS) in > the Renesas M3-N (r8a77965) SoC. > > No driver update is needed. > > Signed-off-by: Geert Uytterhoeven Reviewed-by: Simon

Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document R-Car M3-N support

On Mon, Feb 26, 2018 at 04:25:12PM +0100, Geert Uytterhoeven wrote: > Document support for the Interrupt Controller for Externel Devices > (INTC-EX) in the Renesas M3-N (r8a77965) SoC. > > No driver update is needed. > > Signed-off-by: Geert Uytterhoeven Reviewed-by:

[PATCH 3/5] arm64: dts: renesas: r8a7795: Add cpu capacity-dmips-mhz

Set the capacity-dmips-mhz for r8a7795, that is based on dhrystone. Expected cpu capacity: Cortex-A57@1.5GHz: 1024, Cortex-A53@1.2GHz: 411 Signed-off-by: Gaku Inami --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 1 file changed, 8 insertions(+) diff --git

[PATCH 2/5] arm64: dts: renesas: r8a7796: Add multi-cluster definition

This patch adds the "cpu-map" for multi-cluster into r8a7796 device-tree. This definition is used to parse the cpu topology. Signed-off-by: Gaku Inami --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 26 ++ 1 file changed, 26 insertions(+) diff

[PATCH 4/5] arm64: dts: renesas: r8a7796: Add cpu capacity-dmips-mhz

Set the capacity-dmips-mhz for r8a7796, that is based on dhrystone. Expected cpu capacity: Cortex-A57@1.5Ghz: 1024, Cortex-A53@1.2GHz: 411 Signed-off-by: Gaku Inami --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH 1/5] arm64: dts: renesas: r8a7795: Add multi-cluster definition

This patch adds the "cpu-map" for multi-cluster into r8a7795 device-tree. This definition is used to parse the cpu topology. Signed-off-by: Gaku Inami --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 32 1 file changed, 32 insertions(+)

[PATCH 5/5] soc: renesas: rcar-topology: Add support to be aware cpu capacity

Some R-Car SoCs support big LITTLE architecture produced by ARM, that have different power/performance characteristics between each CPUs. In order to aware such as difference, this patch changes the sched domain flags that the tasks can be scheduled with capacity awareness. If you use big LITTLE

Re: [PATCH] ARM: dts: porter: Add missing PMIC nodes

On Sat, Feb 24, 2018 at 11:11:31PM +0100, Marek Vasut wrote: > On 02/18/2018 04:07 PM, Geert Uytterhoeven wrote: > > Hi Marek, > > Hi, > > > CC Steve Twiss > > > > On Sat, Feb 17, 2018 at 3:07 AM, Marek Vasut wrote: > >> Add PMIC nodes to Porter and connect CPU DVFS

Re: [PATCH] arm64: defconfig: enable R8A77965 SoC

On Fri, Feb 23, 2018 at 05:27:30PM +0200, Vladimir Zapolskiy wrote: > Hi Simon, > > On 02/23/2018 10:51 AM, Simon Horman wrote: > > Enable the Renesas R-Car M3-W (R8A77965) SoC in the ARM64 defconfig. > > If I'm not mistaken in my tardy note, then M3-W is R8A7796 and R8A77965 is > M3-N, no? On

Re: [PATCH] DT: net: renesas,ravb: document R8A77980 bindings

On Sat, Feb 24, 2018 at 09:53:17PM -0500, David Miller wrote: > From: Sergei Shtylyov > Date: Sat, 24 Feb 2018 21:01:15 +0300 > > > On 02/01/2018 11:13 PM, Sergei Shtylyov wrote: > > > >> Renesas R-Car V3H (R8A77980) SoC has the R-Car gen3 compatible EtherAVB

Re: [PATCH 1/2] vfio: platform: Fix reset module leak in error path

Hi Geert, On 13/02/18 17:36, Geert Uytterhoeven wrote: > If the IOMMU group setup fails, the reset module is not released. > > Fixes: b5add544d677d363 ("vfio, platform: make reset driver a requirement by > default") > Signed-off-by: Geert Uytterhoeven Reviewed-by: Eric

Re: [PATCH 1/2] vfio: platform: Fix reset module leak in error path

Hi Geert, On 21/02/18 17:07, Geert Uytterhoeven wrote: > Hi Eric, > > On Wed, Feb 14, 2018 at 10:32 AM, Geert Uytterhoeven > wrote: >> On Wed, Feb 14, 2018 at 9:36 AM, Auger Eric wrote: >>> If I am not wrong we also leak the reset_module if >>>

Re: [PATCH 1/2] pinctrl: sh-pfc: add PORT_GP_CFG_25() helper macro

On Sun, Feb 25, 2018 at 7:13 PM, Sergei Shtylyov wrote: > They follow the style of the existing PORT_GP_CFG_() macros and > will be used by a follow-up patch for the R8A77980 SoC. > > Based on the original (and large) patch by Vladimir Barinov. > >

Re: [PATCH 1/4] pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions

Hi Uli, On Mon, Feb 26, 2018 at 10:21 AM, Geert Uytterhoeven wrote: > On Mon, Feb 26, 2018 at 10:02 AM, Ulrich Hecht > wrote: >> On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven >> wrote: >>> Would there be a use

Re: [PATCH] arm64: defconfig: enable R8A77965 SoC

On Mon, Feb 26, 2018 at 09:23:33AM +0100, Geert Uytterhoeven wrote: > Hi Simon, > > On Fri, Feb 23, 2018 at 4:00 PM, Simon Horman wrote: > > On Fri, Feb 23, 2018 at 10:19:45AM +0100, Geert Uytterhoeven wrote: > >> On Fri, Feb 23, 2018 at 9:51 AM, Simon Horman > >>

Re: [PATCH] ARM: dts: porter: Add missing PMIC nodes

On 02/26/2018 11:55 AM, Simon Horman wrote: > On Sat, Feb 24, 2018 at 11:11:31PM +0100, Marek Vasut wrote: >> On 02/18/2018 04:07 PM, Geert Uytterhoeven wrote: >>> Hi Marek, >> >> Hi, >> >>> CC Steve Twiss >>> >>> On Sat, Feb 17, 2018 at 3:07 AM, Marek Vasut wrote: Add

Re: [PATCH 0/2] Add Renesas R8A77970 PFC driver

Sorry, should read R8A77980 in the subject...

[PATCH 1/2] phy: rcar-gen3-usb2: Add support for r8a77965

This patch adds support for r8a77965 (R-Car M3-N). This SoC has dedicated pins. Signed-off-by: Yoshihiro Shimoda --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 4 2

[PATCH] dmaengine: usb-dmac: add binding for r8a77965

This patch adds binding for r8a77965 (R-Car M3-N). Signed-off-by: Yoshihiro Shimoda --- Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt

[PATCH 0/2] phy rcar-gen3-usb[23]: Add support for r8a77965

This patch set adds R-Car Gen3 USB 2.0 and 3.0 support for R8A77965. Yoshihiro Shimoda (2): phy: rcar-gen3-usb2: Add support for r8a77965 phy: rcar-gen3-usb3: Add binding for r8a77965 Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++

[PATCH 2/2] phy: rcar-gen3-usb3: Add binding for r8a77965

This patch adds binding for r8a77965 (R-Car M3-N). Signed-off-by: Yoshihiro Shimoda --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH] dt-bindings: irqchip: renesas-irqc: Document R-Car M3-N support

Document support for the Interrupt Controller for Externel Devices (INTC-EX) in the Renesas M3-N (r8a77965) SoC. No driver update is needed. Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt | 1 + 1 file

[PATCH] dt-bindings: i2c: sh_mobile: Document R-Car M3-N support

Document support for the IIC Bus Interface for DVFS (IIC for DVFS) in the Renesas M3-N (r8a77965) SoC. No driver update is needed. Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 1 + 1 file changed, 1 insertion(+) diff

Re: [PATCHv2 6/8] arm_pmu: explicitly enable/disable SPIs at hotplug

On Mon, Feb 26, 2018 at 04:16:19PM +0100, Geert Uytterhoeven wrote: > On Mon, Feb 5, 2018 at 5:42 PM, Mark Rutland wrote: > > To support ACPI systems, we need to request IRQs before CPUs are > > hotplugged, and thus we need to request IRQs before we know their > > associated

[PATCH] pinctrl: sh-pfc: r8a77965: Add support for INTC-EX IRQ pins

From: Takeshi Kihara Most pins on the R8A77965 SoC can be configured in GPIO mode for interrupt and GPIO functionality, while a couple of them can also be routed to the INTC-EX hardware block (formerly known as IRQC). On R8A77965 the INTC-EX hardware handles pins

Re: [PATCHv2 6/8] arm_pmu: explicitly enable/disable SPIs at hotplug

Hi Mark, On Mon, Feb 5, 2018 at 5:42 PM, Mark Rutland wrote: > To support ACPI systems, we need to request IRQs before CPUs are > hotplugged, and thus we need to request IRQs before we know their > associated PMU. > > This is problematic if a PMU IRQ is pending out of

[PATCH 2/2] arm64: dts: r8a77965: Add INTC-EX device node

Populate the device node for the Interrupt Controller for External Devices (INTC-EX) on R-Car M3-N, which serves external IRQ pins IRQ[0-5]. Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 11 ++- 1 file changed, 10

[PATCH 0/2] arm64: dts: r8a77965: salvator-x(s): Enable s2ram and PMIC

Hi Simon, Magnus, This patch populates the placeholders in the R-Car M3-N DTS file for the IIC Bus Interface for DVFS (IIC for DVFS) and Interrupt Controller for External Devices (INTC-EX) device nodes. After applying the first patch, you can start using s2ram (PSCI suspend), like on

[PATCH 1/2] arm64: dts: r8a77965: Add IIC-DVFS device node

Populate the device node for the IIC Bus Interface for DVFS (IIC for DVFS) on R-Car M3-N, and add an alias to fix its bus number. Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 16 ++-- 1 file changed, 14 insertions(+), 2

Re: [PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

Hi Sergei, On Sat, Feb 24, 2018 at 8:41 PM, Sergei Shtylyov wrote: > It appears that the single port Ether controllers having TSU (like SH7734/ > R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100 > currently has -- they also don't have

Re: [PATCH net-next] sh_eth: fix TSU init on SH7734/R8A7740

On 02/24/2018 10:41 PM, Sergei Shtylyov wrote: > It appears that the single port Ether controllers having TSU (like SH7734/ > R8A7740) need the same kind of treating in sh_eth_tsu_init() as R7S72100 > currently has -- they also don't have the TSU registers related e.g. to > passing the frames

Re: [PATCHv2 6/8] arm_pmu: explicitly enable/disable SPIs at hotplug

Hi Will, On Mon, Feb 26, 2018 at 4:22 PM, Will Deacon wrote: > On Mon, Feb 26, 2018 at 04:16:19PM +0100, Geert Uytterhoeven wrote: >> On Mon, Feb 5, 2018 at 5:42 PM, Mark Rutland wrote: >> > To support ACPI systems, we need to request IRQs before CPUs

Re: [PATCHv2 6/8] arm_pmu: explicitly enable/disable SPIs at hotplug

On Mon, Feb 26, 2018 at 03:22:53PM +, Will Deacon wrote: > On Mon, Feb 26, 2018 at 04:16:19PM +0100, Geert Uytterhoeven wrote: > > On Mon, Feb 5, 2018 at 5:42 PM, Mark Rutland wrote: > > > To support ACPI systems, we need to request IRQs before CPUs are > > > hotplugged,

Re: [PATCH 01/02] ARM: dts: silk: Add r1ex24002 EEPROM to DT

On Mon, Feb 19, 2018 at 12:49 PM, Magnus Damm wrote: > From: Magnus Damm > > Extend the Silk board support to include U14 which is an I2C based EEPROM > hooked up to the I2C1 bus. > > Signed-off-by: Magnus Damm late

Re: [PATCH 02/02] ARM: dts: silk: Add GPIO keys to DT

On Mon, Feb 19, 2018 at 12:49 PM, Magnus Damm wrote: > From: Magnus Damm > > Extend the Silk board support to include SW3, SW4, SW6 and SW12. They > are all connected via GPIO lines and handled by the gpio-keys driver. > > Signed-off-by: Magnus

Re: [PATCH 2/2] pinctrl: sh-pfc: add R8A77980 PFC support

Hi Sergei, On Sun, Feb 25, 2018 at 7:14 PM, Sergei Shtylyov wrote: > Add the PFC support for the R8A77980 SoC including pin groups for some > on-chip devices such as AVB, CAN-FD, GETHER, [H]SCIF, I2C, INTC-EX, MMC, > MSIOF, PWM, and VIN... > > Based on the

[PATCH 1/2] arm: add basic support for Renesas RZ/N1 boards

This adds the Renesas RZ/N1 CPU and bare bone support. This currently only handles generic parts (gic, architected timer) and a UART. This also relies on the bootloader to set the pinctrl and clocks. Signed-off-by: Michel Pollet ---

[PATCH 2/2] arm: rzn1: Add basic support for RZN1D-DB Board

Only enables the uart0 for now, and also relies on the bootloader for setting up the clocks and pinctrl. Signed-off-by: Michel Pollet --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ arch/arm/boot/dts/rzn1d400-db.dts | 25

Re: [PATCH 2/2] pinctrl: sh-pfc: add R8A77980 PFC support

Hello! On 02/26/2018 03:42 PM, Geert Uytterhoeven wrote: >> Add the PFC support for the R8A77980 SoC including pin groups for some >> on-chip devices such as AVB, CAN-FD, GETHER, [H]SCIF, I2C, INTC-EX, MMC, >> MSIOF, PWM, and VIN... >> >> Based on the original (and large) patch by Vladimir