On Fri, Sep 21, 2018 at 03:45:54PM +0100, Biju Das wrote:
> RZ/G1N (R8A7744) SoC also has the R-Car gen2 compatible SCIF, SCIFA,
> SCIFB, and HSCIF ports, so document the SoC specific bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Fri, Sep 21, 2018 at 04:34:04PM +0100, Biju Das wrote:
> Renesas RZ/G1N (R8A7744) SoC GPIO blocks are identical to the R-Car Gen2
> family. Add support for its GPIO controllers.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Fri, Sep 21, 2018 at 04:52:58PM +0100, Biju Das wrote:
> Document APMU and SMP enable method for RZ/G1N (R8A7744) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Fri, Sep 21, 2018 at 5:59 PM Biju Das wrote:
> Document APMU and SMP enable method for RZ/G1N (R8A7744) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots
On Fri, Sep 21, 2018 at 7:37 PM Fabrizio Castro
wrote:
> From: Biju Das
>
> Document i2c Device Tree support for RZ/G1N (R8A7744) SoC, which is
> compatible with R-Car Gen2 SoC family.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Hello Simon,
Thank you for your feedback.
> -Original Message-
> From: Simon Horman
> Sent: 24 September 2018 10:14
> To: Fabrizio Castro
> Cc: Ulf Hansson ; Rob Herring ;
> Mark Rutland ; Laurent
> Pinchart ; Geert Uytterhoeven
> ; Linus Walleij
> ; Wolfram Sang ;
> Magnus Damm ;
>
On Sat, Sep 22, 2018 at 08:39:29PM +0200, Wolfram Sang wrote:
> On Fri, Sep 21, 2018 at 06:37:01PM +0100, Fabrizio Castro wrote:
> > Add I2C4 support to RZ/G1C (a.k.a. r8a77470) SoC specific
> > device tree.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju Das
>
> Looks sane to me
On Fri, Sep 21, 2018 at 06:37:00PM +0100, Fabrizio Castro wrote:
> From: Biju Das
>
> Document i2c Device Tree support for RZ/G1N (R8A7744) SoC, which is
> compatible with R-Car Gen2 SoC family.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
> ---
>
On Fri, Sep 21, 2018 at 06:36:58PM +0100, Fabrizio Castro wrote:
> Although the I2C IP found in the RZ/G1C is not exactly the same
> as the one found in the R-Car Gen2 family or R-Car Gen3 family,
> it can still be considered as compatible with R-Car Gen2 from
> a software perpective.
> This patch
Hello Simon,
Thank you for the feedback.
> Subject: Re: [PATCH 1/4] dt-bindings: i2c: rcar: Add r8a77470 support
>
> On Fri, Sep 21, 2018 at 06:36:58PM +0100, Fabrizio Castro wrote:
> > Although the I2C IP found in the RZ/G1C is not exactly the same
> > as the one found in the R-Car Gen2 family
Hi Chris,
On Fri, Sep 21, 2018 at 5:21 PM Chris Brandt wrote:
> The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
> ostm module clocks to be registers early in boot.
>
> Signed-off-by: Chris Brandt
Thanks for your patch!
> --- a/drivers/clk/renesas/r7s9210-cpg-mssr.c
>
On Sat, Sep 22, 2018 at 5:02 PM Marek Vasut wrote:
> From: Tho Vu
>
> Document the R-Car E3 (R8A77990) SoC in the R-Car PCIe bindings.
>
> Signed-off-by: Tho Vu
> Signed-off-by: Kazuya Mizuguchi
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Fri, Sep 21, 2018 at 7:37 PM Fabrizio Castro
wrote:
> From: Biju Das
>
> Document i2c Device Tree support for RZ/G1N (R8A7744) SoC, which is
> compatible with R-Car Gen2 SoC family.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
On Fri, Sep 21, 2018 at 7:37 PM Fabrizio Castro
wrote:
> Add I2C4 support to RZ/G1C (a.k.a. r8a77470) SoC specific
> device tree.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
On Fri, Sep 21, 2018 at 03:07:55PM +0100, Biju Das wrote:
> PCIe is not populated by default on iWave RZ/G1N board. RZ/G1N board
> is almost identical to RZ/G1M. In order to reuse the common dtsi for
> both the boards, it is required to move pcie node from common dtsi
> to board specific dts.
>
>
On Fri, Sep 21, 2018 at 5:41 PM Biju Das wrote:
> Renesas RZ/G1N (R8A7744) SoC GPIO blocks are identical to the R-Car Gen2
> family. Add support for its GPIO controllers.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Hi Fabrizio,
On Fri, Sep 21, 2018 at 1:55 PM Fabrizio Castro
wrote:
> Document SDHI support for the RZ/G1C (a.k.a. R8A77470) SoC.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
> ---
> Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 +
> 1 file changed, 1 insertion(+)
>
>
On Sat, Sep 22, 2018 at 8:44 PM Wolfram Sang wrote:
> On Fri, Sep 21, 2018 at 12:55:09PM +0100, Fabrizio Castro wrote:
> > Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI2 pins
> > capable of switching voltage. Please note that with the
> > RZ/G1C only 1 bit of the POC Control Register is
Hi Fabrizio,
On Mon, Sep 24, 2018 at 11:30 AM Fabrizio Castro
wrote:
> > -Original Message-
> > From: Simon Horman
> > Sent: 24 September 2018 10:14
> > To: Fabrizio Castro
> > Cc: Ulf Hansson ; Rob Herring ;
> > Mark Rutland ; Laurent
> > Pinchart ; Geert Uytterhoeven
> > ; Linus
On Wed, Sep 19, 2018 at 8:10 PM Sergei Shtylyov
wrote:
> The TPU0 clock wasn't present in the original R8A77970 patch by Daisuke
> Matsushita, it was added in a later BSP version...
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
>
On Sat, Sep 22, 2018 at 05:02:52PM +0200, Marek Vasut wrote:
> From: Tho Vu
>
> Document the R-Car E3 (R8A77990) SoC in the R-Car PCIe bindings.
>
> Signed-off-by: Tho Vu
> Signed-off-by: Kazuya Mizuguchi
> Signed-off-by: Marek Vasut
> Cc: Geert Uytterhoeven
> Cc: Lorenzo Pieralisi
> Cc:
On Sat, Sep 22, 2018 at 11:30:09PM +0300, Sergei Shtylyov wrote:
> Describe TPU in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
Thanks, this looks good but I'd like to see
Hi Chris,
On Fri, Sep 21, 2018 at 5:21 PM Chris Brandt wrote:
> Add support for SoCs that need to register core and module clocks early in
> order to use OF drivers that exclusively use macros such as
> TIMER_OF_DECLARE.
>
> Signed-off-by: Chris Brandt
Thanks for your patch!
> ---
On Fri, Sep 21, 2018 at 12:55:11PM +0100, Fabrizio Castro wrote:
> Add uSD card support to the iwg23s single board computer powered
> by the RZ/G1C SoC (a.k.a. r8a77470).
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
> ---
> Hello Simon,
>
> this patch can only be taken after
On Wed, Sep 19, 2018 at 11:16:45AM +0200, Simon Horman wrote:
> On Wed, Sep 19, 2018 at 07:24:05AM +, Kuninori Morimoto wrote:
> >
> > From: Kuninori Morimoto
> >
> > It can't boot without bootargs settings on Uboot on ulcb board.
> > This patch adds missing default bootargs.
> > ulcb BSP
On Sat, Sep 22, 2018 at 08:44:50PM +0200, Wolfram Sang wrote:
> On Fri, Sep 21, 2018 at 12:55:10PM +0100, Fabrizio Castro wrote:
> > Add SoC specific device tree definitions for the SDHI2 interface.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju Das
>
> Acked-by: Wolfram Sang
On Fri, Sep 21, 2018 at 12:55:08PM +0100, Fabrizio Castro wrote:
> Document SDHI support for the RZ/G1C (a.k.a. R8A77470) SoC.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Simon Horman
On Fri, Sep 21, 2018 at 06:36:59PM +0100, Fabrizio Castro wrote:
> From: Biju Das
>
> Document i2c Device Tree support for RZ/G1N (R8A7744) SoC, which is
> compatible with R-Car Gen2 SoC family.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Simon Horman
> ---
>
> It seems RZ/G1C has two slighty different types of SD card interfaces:
> 1. SDHI0 and SDHI2 use SYS-DMAC,
> 2. SDHI1 can also be used as an MMC interface, and has an internal DMAC.
>
> Do we need to distinguish between them using the compatible value, or
> are there other ways?
Yes, that
On Thu, Jul 26, 2018 at 05:39:50AM +0900, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> Based on a similar patch of the R8A7796 device tree
> by Kuninori Morimoto .
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
> ---
>
> The following patches were squashed into
On Sat, Sep 22, 2018 at 9:57 PM Sergei Shtylyov
wrote:
> Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas TPU bindings;
> the TPU hardware in those is the Renesas standard 4-channel timer pulse
> unit.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
On Sat, Sep 22, 2018 at 10:43:24PM +0300, Sergei Shtylyov wrote:
> The "compatible" property description contradicts even the example given:
> it only says that there must be a single value while the example has the
> fallback value too -- which makes much more sense. Moreover, the generic
>
On Sat, Sep 22, 2018 at 10:30 PM Sergei Shtylyov
wrote:
> Describe TPU in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
> ---
On Mon, Sep 17, 2018 at 5:25 PM Biju Das wrote:
> Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers.
> Document RZ/G1N (also known as R8A7744) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Fri, Aug 17, 2018 at 04:53:21PM +0900, Yoshihiro Kaneko wrote:
> This patch adds Audio-DMAC0 device node and Sound device node
> for the R8A77990 SoC.
>
> The following patches were squashed into this patch:
> * Takeshi Kihara
> arm64: dts: r8a77990: Add Audio-DMAC device nodes
> arm64:
Hi Wolfram,
On Mon, Sep 24, 2018 at 2:26 PM Wolfram Sang wrote:
> > It seems RZ/G1C has two slighty different types of SD card interfaces:
> > 1. SDHI0 and SDHI2 use SYS-DMAC,
> > 2. SDHI1 can also be used as an MMC interface, and has an internal DMAC.
> >
> > Do we need to distinguish
On Mon, Sep 24, 2018 at 11:04:39AM +0200, Simon Horman wrote:
> On Sat, Sep 22, 2018 at 08:39:29PM +0200, Wolfram Sang wrote:
> > On Fri, Sep 21, 2018 at 06:37:01PM +0100, Fabrizio Castro wrote:
> > > Add I2C4 support to RZ/G1C (a.k.a. r8a77470) SoC specific
> > > device tree.
> > >
> > >
On Sun, Sep 23, 2018 at 06:18:17AM -0700, Olof Johansson wrote:
> Hi Simon,
>
> On Thu, Sep 13, 2018 at 11:08:18AM +0200, Simon Horman wrote:
> > Hi Olof, Hi Kevin, Hi Arnd,
> >
> > Please consider these Renesas ARM based SoC DT updates for v4.20.
> >
> > I am sending out this pull-request at
Hello Geert,
Thank you for your feedback.
> Subject: Re: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add uSD card support
>
> Hi Fabrizio,
>
> On Mon, Sep 24, 2018 at 11:30 AM Fabrizio Castro
> wrote:
> > > -Original Message-
> > > From: Simon Horman
> > > Sent: 24 September 2018 10:14
> > > To:
On Mon, Sep 24, 2018 at 03:09:49PM +, Fabrizio Castro wrote:
> Hello Geert,
>
> Thank you for your feedback.
>
> > Subject: Re: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add uSD card support
> >
> > Hi Fabrizio,
> >
> > On Mon, Sep 24, 2018 at 11:30 AM Fabrizio Castro
> > wrote:
> > > >
Document support for RZ/A2
Signed-off-by: Chris Brandt
Reviewed-by: Guenter Roeck
---
v2:
* Added Reviewed-by
---
Documentation/devicetree/bindings/watchdog/renesas-wdt.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
Slightly modify the rza_wdt.c driver and update the binding docs.
Chris Brandt (2):
watchdog: rza_wdt: Support longer timeouts
dt-bindings: watchdog: renesas-wdt: Add support for R7S9210
.../devicetree/bindings/watchdog/renesas-wdt.txt | 1 +
drivers/watchdog/rza_wdt.c
The RZ/A2 watchdog timer extends the clock source options in order to
allow for longer timeouts.
Signed-off-by: Chris Brandt
Reviewed-by: Guenter Roeck
---
v5:
* Added type casting as pointed out by kbuild test robot
* Added Reviewed-by
v4:
* Documented CKS_3BIT/CKS_4BIT better
* Changed
On 09/24/2018 12:07 PM, Simon Horman wrote:
>> Describe TPU in the R8A779{7|8}0 device trees.
>>
>> Based on the original (and large) patches by Vladimir Barinov.
>>
>> Signed-off-by: Vladimir Barinov
>> Signed-off-by: Sergei Shtylyov
>
> Thanks, this looks good but I'd like to see the binding
On Fri, Sep 21, 2018 at 11:45:24PM +0300, Sergei Shtylyov wrote:
> The "compatible" property description contradicts even the example given:
> it only says that there must be a single value while the example has the
> fallback value too -- which makes much more sense. Moreover, the generic
>
On Mon, Sep 24, 2018 at 05:44:22PM +0300, Sergei Shtylyov wrote:
> On 09/24/2018 12:07 PM, Simon Horman wrote:
>
> >> Describe TPU in the R8A779{7|8}0 device trees.
> >>
> >> Based on the original (and large) patches by Vladimir Barinov.
> >>
> >> Signed-off-by: Vladimir Barinov
> >>
On Sat, Sep 22, 2018 at 10:57:29PM +0300, Sergei Shtylyov wrote:
> Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas TPU bindings;
> the TPU hardware in those is the Renesas standard 4-channel timer pulse
> unit.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Simon Horman
> > It seems to me that the RZ/G1C has some extra registers described
> > for I2C when compared with both other RZ/G1 and R-Car Gen2 SoCs.
>
> Exactly. The extra registers found with the RZ/G1C I2C controller are
> also found in R-Car Gen3, but the driver doesn't handle them. R-Car
> Gen3 has
On Mon, Sep 24, 2018 at 09:10:53AM +, Fabrizio Castro wrote:
> Hello Simon,
>
> Thank you for the feedback.
>
> > Subject: Re: [PATCH 1/4] dt-bindings: i2c: rcar: Add r8a77470 support
> >
> > On Fri, Sep 21, 2018 at 06:36:58PM +0100, Fabrizio Castro wrote:
> > > Although the I2C IP found in
The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.
This series add early clock support to cpg-mssr
Here are some notes I took:
* Switched to using
of_iomap(cpg_np, 0)
instead of
platform_get_resource(pdev,
Same functionality, just easier to read.
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 94 ++
1 file changed, 49 insertions(+), 45 deletions(-)
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.
Signed-off-by: Chris Brandt
---
v2:
* List early clocks first
* Remove unnecessary comments
* Removed new function r7s9210_update_clk_table (to be included in a
Add support for SoCs that need to register core and module clocks early in
order to use OF drivers that exclusively use macros such as
TIMER_OF_DECLARE.
Signed-off-by: Chris Brandt
---
v2:
* List early clocks first
* Renamed early_priv to cpg_mssr_priv and make it static
* Always set
Hi Wolfram,
On Mon, Sep 24, 2018 at 5:52 PM Wolfram Sang wrote:
> > > It seems to me that the RZ/G1C has some extra registers described
> > > for I2C when compared with both other RZ/G1 and R-Car Gen2 SoCs.
> >
> > Exactly. The extra registers found with the RZ/G1C I2C controller are
> > also
Hello Wolfram,
> Subject: Re: [PATCH 1/4] dt-bindings: i2c: rcar: Add r8a77470 support
>
>
> > > It seems to me that the RZ/G1C has some extra registers described
> > > for I2C when compared with both other RZ/G1 and R-Car Gen2 SoCs.
> >
> > Exactly. The extra registers found with the RZ/G1C I2C
Hi Geert,
On Monday, September 24, 2018, Geert Uytterhoeven wrote:
> Thanks for your patch!
Thanks for your review!
> > +struct cpg_mssr_priv *early_priv;
>
> static
>
> Just call the pointer cpg_mssr_priv, as you're gonna need it in both
> cases
> (see below)?
Seems strange to have a
On 09/24/2018 02:29 PM, Geert Uytterhoeven wrote:
>> Describe TPU in the R8A779{7|8}0 device trees.
>>
>> Based on the original (and large) patches by Vladimir Barinov.
>>
>> Signed-off-by: Vladimir Barinov
>> Signed-off-by: Sergei Shtylyov
>
> Reviewed-by: Geert Uytterhoeven
>
>> ---
Hello Geert,
> Subject: Re: [PATCH 1/4] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
>
> Hi Fabrizio,
>
> On Fri, Sep 21, 2018 at 1:55 PM Fabrizio Castro
> wrote:
> > Document SDHI support for the RZ/G1C (a.k.a. R8A77470) SoC.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju
On Mon, Sep 24, 2018 at 11:22:09AM +0200, Geert Uytterhoeven wrote:
> On Fri, Sep 21, 2018 at 5:59 PM Biju Das wrote:
> > Document APMU and SMP enable method for RZ/G1N (R8A7744) SoC.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
> Reviewed-by: Geert Uytterhoeven
Thanks,
On Mon, Sep 24, 2018 at 08:58:16AM -0500, Chris Brandt wrote:
> Document support for RZ/A2
>
> Signed-off-by: Chris Brandt
> Reviewed-by: Guenter Roeck
Reviewed-by: Simon Horman
Describe TPU in the R8A779{7|8}0 device trees.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20180924-v4.19-rc5' branch of
Simon Horman's 'renesas.git' repo.
Changes
Hello Geert, hello Wolfram,
Thank you both for your feedback.
> Subject: Re: [PATCH 2/4] pinctrl: sh-pfc: r8a77470: Add SDHI2 voltage switch
>
> On Sat, Sep 22, 2018 at 8:44 PM Wolfram Sang wrote:
> > On Fri, Sep 21, 2018 at 12:55:09PM +0100, Fabrizio Castro wrote:
> > > Add
Describe TMUs in the R8A779{7|8}0 device trees.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20180924-v4.19-rc5' branch of
Simon Horman's 'renesas.git' repo.
Changes
On Mon, Sep 24, 2018 at 9:31 PM Sergei Shtylyov
wrote:
> Describe TPU in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
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