[PATCH] MAINTAINERS: add maintainer for Renesas I2C driver
The RIIC I2C controller is used in Renesas RZ/A SoCs. Signed-off-by: Chris Brandt --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index e20d9af09573..c261135cd00c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12599,6 +12599,11 @@ S: Supported F: drivers/i2c/busses/i2c-rcar.c F: drivers/i2c/busses/i2c-sh_mobile.c +RENESAS RIIC DRIVER +M: Chris Brandt +S: Supported +F: drivers/i2c/busses/i2c-riic.c + RENESAS USB PHY DRIVER M: Yoshihiro Shimoda L: linux-renesas-soc@vger.kernel.org -- 2.16.1
[RFC] gpio: rcar: Request GPIO before enabling interrupt
There are cases when the bootloader configures a pin to work
as a function rather than GPIO, and other cases when the pin
is configured as a function at POR.
This commit makes sure the pin is configured as a GPIO the
moment we need it to work as an interrupt.
Signed-off-by: Fabrizio Castro
---
Dear All,
we have got some issues while trying to bring up the interrupt
line of the HDMI transmitter on the iwg23s, as GP2_29 is configured
as a function when the kernel starts, and therefore setting up the
interrupt from the driver won't have the desired effect.
This patch makes sure the pinctrl driver sets GP2[29] to GP-2-29
before enabling the interrupt, but it doesn't addresses the
"direction problem", as in the pin will be a GPIO after calling
gc->request, but the direction would be whatever was previously
configured. There could be the option of moving the additional
code added by this patch to the bottom of function
gpio_rcar_irq_set_type, but is that going to behave properly on
every SoC this driver is supporting?
Is configuring every gpio with direction input while probing
something that should be looked into to reduce concerns over
switching from function to GPIO?
Comments very welcome!
Thanks,
Fab
drivers/gpio/gpio-rcar.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 3c82bb3..8c69431 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -147,6 +147,14 @@ static int gpio_rcar_irq_set_type(struct irq_data *d,
unsigned int type)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct gpio_rcar_priv *p = gpiochip_get_data(gc);
unsigned int hwirq = irqd_to_hwirq(d);
+ int err;
+
+ err = gc->request(gc, hwirq);
+ if (err) {
+ dev_err(>pdev->dev, "Can't request GPIO %d from %s\n", hwirq,
+ gc->label);
+ return err;
+ }
dev_dbg(>pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
--
2.7.4
RE: [PATCH] dt-bindings: watchdog: renesas-wdt: Document r8a77470 support
> Subject: [PATCH] dt-bindings: watchdog: renesas-wdt: Document r8a77470 support > > RZ/G1C (R8A77470) watchdog implementation is compatible with R-Car > Gen2, therefore add relevant documentation. > > Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro > --- > This patch is tested against linux-next > --- > Documentation/devicetree/bindings/watchdog/renesas-wdt.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt > b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt > index a8ee29f..a47bdea 100644 > --- a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt > +++ b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt > @@ -8,6 +8,7 @@ Required properties: > - "renesas,r8a7743-wdt" (RZ/G1M) > - "renesas,r8a7744-wdt" (RZ/G1N) > - "renesas,r8a7745-wdt" (RZ/G1E) > + - "renesas,r8a77470-wdt" (RZ/G1C) > - "renesas,r8a774a1-wdt" (RZ/G2M) > - "renesas,r8a7790-wdt" (R-Car H2) > - "renesas,r8a7791-wdt" (R-Car M2-W) > -- > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH] dt-bindings: timer: renesas, cmt: Document r8a77470 CMT support
> Subject: [PATCH] dt-bindings: timer: renesas, cmt: Document r8a77470 CMT > support > > Document SoC specific compatible strings for r8a77470. No driver change > is needed as the fallback strings will activate the right code. > > Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro > --- > This patch is tested against linux-next > --- > Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt > b/Documentation/devicetree/bindings/timer/renesas,cmt.txt > index 6de27b6..eb602c5 100644 > --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt > +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt > @@ -28,6 +28,8 @@ Required Properties: > - "renesas,r8a7744-cmt1" for the 48-bit CMT1 device included in r8a7744. > - "renesas,r8a7745-cmt0" for the 32-bit CMT0 device included in r8a7745. > - "renesas,r8a7745-cmt1" for the 48-bit CMT1 device included in r8a7745. > +- "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in > r8a77470. > +- "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in > r8a77470. > - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790. > - "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790. > - "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791. > -- > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 2/2] ARM: dts: iwg23s-sbc: Enable cmt0
> Subject: [PATCH 2/2] ARM: dts: iwg23s-sbc: Enable cmt0
>
> This patch enables cmt0 support on the iWave iwg23s sbc.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> index 518b0c0..6277571 100644
> --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> @@ -73,6 +73,10 @@
> };
> };
>
> + {
> +status = "okay";
> +};
> +
> {
> status = "okay";
> };
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
> Subject: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
> are working fine.The clocksource_switch asynchronous test is failing due
> to inconsistency-check failure on "arch_sys_counter".
>
> But if i skip the clocksource_switching of "arch_sys_counter", the
> asynchronous test is passing for CMT0/1/2/3 timer.
>
> Has any one noticed this issue?
> ---
> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
>
> 1 file changed, 70 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> index 1ec6aaa..d62febd0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> @@ -401,6 +401,76 @@
> reg = <0 0xe606 0 0x50c>;
> };
>
> +cmt0: timer@e60f {
> +compatible = "renesas,r8a7796-cmt0",
> + "renesas,rcar-gen3-cmt0";
> +reg = <0 0xe60f 0 0x1004>;
> +interrupts = ,
> + ;
> +clocks = < CPG_MOD 303>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 303>;
> +status = "disabled";
> +};
> +
> +cmt1: timer@e613 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe613 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 302>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 302>;
> +status = "disabled";
> +};
> +
> +cmt2: timer@e614 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe614 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 301>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 301>;
> +status = "disabled";
> +};
> +
> +cmt3: timer@e6148000 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe6148000 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 300>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 300>;
> +status = "disabled";
> +};
> +
> cpg: clock-controller@e615 {
> compatible = "renesas,r8a7796-cpg-mssr";
> reg = <0 0xe615 0 0x1000>;
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 1/2] ARM: dts: r8a77470: Add CMT SoC specific support
> Subject: [PATCH 1/2] ARM: dts: r8a77470: Add CMT SoC specific support
>
> Add CMT[01] support to r8a77470 SoC DT.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas-dev
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 32
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 74ca5d3..e40f5a9 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -710,6 +710,38 @@
> compatible = "renesas,prr";
> reg = <0 0xff44 0 4>;
> };
> +
> +cmt0: timer@ffca {
> +compatible = "renesas,r8a77470-cmt0",
> + "renesas,rcar-gen2-cmt0";
> +reg = <0 0xffca 0 0x1004>;
> +interrupts = ,
> + ;
> +clocks = < CPG_MOD 124>;
> +clock-names = "fck";
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 124>;
> +status = "disabled";
> +};
> +
> +cmt1: timer@e613 {
> +compatible = "renesas,r8a77470-cmt1",
> + "renesas,rcar-gen2-cmt1";
> +reg = <0 0xe613 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 329>;
> +clock-names = "fck";
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 329>;
> +status = "disabled";
> +};
> };
>
> timer {
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 2/2] ARM: dts: r8a77470: Add USB-DMAC device nodes
> Subject: [PATCH 2/2] ARM: dts: r8a77470: Add USB-DMAC device nodes
>
> This patch adds USB DMAC nodes.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch depend upon the below patch.
>
> https://patchwork.kernel.org/patch/10655861/
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 56
> +
> 1 file changed, 56 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 935b82b..eec71dd 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -353,6 +353,62 @@
> };
> };
>
> +usb_dmac00: dma-controller@e65a {
> +compatible = "renesas,r8a77470-usb-dmac",
> + "renesas,usb-dmac";
> +reg = <0 0xe65a 0 0x100>;
> +interrupts = + GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> +interrupt-names = "ch0", "ch1";
> +clocks = < CPG_MOD 330>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 330>;
> +#dma-cells = <1>;
> +dma-channels = <2>;
> +};
> +
> +usb_dmac10: dma-controller@e65b {
> +compatible = "renesas,r8a77470-usb-dmac",
> + "renesas,usb-dmac";
> +reg = <0 0xe65b 0 0x100>;
> +interrupts = + GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> +interrupt-names = "ch0", "ch1";
> +clocks = < CPG_MOD 331>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 331>;
> +#dma-cells = <1>;
> +dma-channels = <2>;
> +};
> +
> +usb_dmac01: dma-controller@e65a8000 {
> +compatible = "renesas,r8a77470-usb-dmac",
> + "renesas,usb-dmac";
> +reg = <0 0xe65a8000 0 0x100>;
> +interrupts = + GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
> +interrupt-names = "ch0", "ch1";
> +clocks = < CPG_MOD 326>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 326>;
> +#dma-cells = <1>;
> +dma-channels = <2>;
> +};
> +
> +usb_dmac11: dma-controller@e65b8000 {
> +compatible = "renesas,r8a77470-usb-dmac",
> + "renesas,usb-dmac";
> +reg = <0 0xe65b8000 0 0x100>;
> +interrupts = + GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
> +interrupt-names = "ch0", "ch1";
> +clocks = < CPG_MOD 327>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 327>;
> +#dma-cells = <1>;
> +dma-channels = <2>;
> +};
> +
> dmac0: dma-controller@e670 {
> compatible = "renesas,dmac-r8a77470",
> "renesas,rcar-dmac";
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH] dt-bindings: timer: renesas, cmt: Document r8a7796 CMT support
> Subject: [PATCH] dt-bindings: timer: renesas, cmt: Document r8a7796 CMT > support > > Document SoC specific bindings for R-Car M3-W (r8a7796) SoC. > > Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro > --- > This patch is tested against linu-next > --- > Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt > b/Documentation/devicetree/bindings/timer/renesas,cmt.txt > index 3399267..6de27b6 100644 > --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt > +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt > @@ -36,6 +36,8 @@ Required Properties: > - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793. > - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794. > - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794. > +- "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796. > +- "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796. > - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in > r8a77970. > - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in > r8a77970. > - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in > r8a77980. > -- > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 1/2] dt-bindings: dmaengine: usb-dmac: Add binding for r8a77470
> Subject: [PATCH 1/2] dt-bindings: dmaengine: usb-dmac: Add binding for > r8a77470 > > This patch adds usb high-speed dmac binding for r8a77470 (RZ/G1C) SoC. > > Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro > --- > This patch tested against linux-next. > --- > Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt > b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt > index 1743017..a1e7b814 100644 > --- a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt > +++ b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt > @@ -6,6 +6,7 @@ Required Properties: >- "renesas,r8a7743-usb-dmac" (RZ/G1M) >- "renesas,r8a7744-usb-dmac" (RZ/G1N) >- "renesas,r8a7745-usb-dmac" (RZ/G1E) > + - "renesas,r8a77470-usb-dmac" (RZ/G1C) >- "renesas,r8a7790-usb-dmac" (R-Car H2) >- "renesas,r8a7791-usb-dmac" (R-Car M2-W) >- "renesas,r8a7793-usb-dmac" (R-Car M2-N) > -- > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 6/7] ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host
> Subject: [PATCH 6/7] ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host
>
> Enable USB2.0 host on USB port1 of the iwg23s sbc.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas-devel.
> ---
> arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> index 157af7c..7aa7993e 100644
> --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> @@ -73,10 +73,18 @@
> };
> };
>
> + {
> +status = "okay";
> +};
> +
> _clk {
> clock-frequency = <2000>;
> };
>
> + {
> +status = "okay";
> +};
> +
> {
> mmc_pins_uhs: mmc_uhs {
> groups = "mmc_data8", "mmc_ctrl";
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 7/7] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support in shmobile_defconfig
> Subject: [PATCH 7/7] ARM: shmobile: Enable USB [EO]HCI HCD PLATFORM support > in shmobile_defconfig > > The USB [EO]HCI controller on RZ/G1C SoC doesn't have PCI bridge like > other R-Car Gen2 devices. So enable generic USB [EO]HCI HCD PLATFORM > support in shmobile_defconfig. > > Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro > --- > arch/arm/configs/shmobile_defconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/configs/shmobile_defconfig > b/arch/arm/configs/shmobile_defconfig > index f8faf37..b0db52c 100644 > --- a/arch/arm/configs/shmobile_defconfig > +++ b/arch/arm/configs/shmobile_defconfig > @@ -163,7 +163,9 @@ CONFIG_USB=y > CONFIG_USB_XHCI_HCD=y > CONFIG_USB_XHCI_PLATFORM=y > CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_EHCI_HCD_PLATFORM=y > CONFIG_USB_OHCI_HCD=y > +CONFIG_USB_OHCI_HCD_PLATFORM=y > CONFIG_USB_R8A66597_HCD=y > CONFIG_USB_RENESAS_USBHS=y > CONFIG_USB_GADGET=y > -- > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
RE: [PATCH 4/7] ARM: dts: iwg23s-sbc: Enable USB Phy[01]
> Subject: [PATCH 4/7] ARM: dts: iwg23s-sbc: Enable USB Phy[01]
>
> Enable USB phy[01] on iWave iwg23s sbc based on RZ/G1C SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas devel.
> ---
> arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 24
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> index e5cfb50..157af7c 100644
> --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> @@ -100,6 +100,16 @@
> function = "sdhi2";
> power-source = <1800>;
> };
> +
> +usb0_pins: usb0 {
> +groups = "usb0";
> +function = "usb0";
> +};
> +
> +usb1_pins: usb1 {
> +groups = "usb1";
> +function = "usb1";
> +};
> };
>
> {
> @@ -134,3 +144,17 @@
> sd-uhs-sdr50;
> status = "okay";
> };
> +
> + {
> +pinctrl-0 = <_pins>;
> +pinctrl-names = "default";
> +
> +status = "okay";
> +};
> +
> + {
> +pinctrl-0 = <_pins>;
> +pinctrl-names = "default";
> +
> +status = "okay";
> +};
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 5/7] ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device nodes
> Subject: [PATCH 5/7] ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device
> nodes
>
> Define the r8a77470 generic part of the USB2.0 Host Controller device
> nodes (ehci[01]/ohci[01]).
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas devel.
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 50
> +
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 7d20c3b..935b82b 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -528,6 +528,56 @@
> status = "disabled";
> };
>
> +ohci0: usb@ee08 {
> +compatible = "generic-ohci";
> +reg = <0 0xee08 0 0x100>;
> +interrupts = ;
> +clocks = < CPG_MOD 703>;
> +phys = < 0>;
> +phy-names = "usb";
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 703>;
> +status = "disabled";
> +};
> +
> +ohci1: usb@ee0c {
> +compatible = "generic-ohci";
> +reg = <0 0xee0c 0 0x100>;
> +interrupts = ;
> +clocks = < CPG_MOD 705>;
> +phys = < 0>, < 1>;
> +phy-names = "usb";
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 705>;
> +status = "disabled";
> +};
> +
> +ehci0: usb@ee080100 {
> +compatible = "generic-ehci";
> +reg = <0 0xee080100 0 0x100>;
> +interrupts = ;
> +clocks = < CPG_MOD 703>;
> +phys = < 0>;
> +phy-names = "usb";
> +companion = <>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 703>;
> +status = "disabled";
> +};
> +
> +ehci1: usb@ee0c0100 {
> +compatible = "generic-ehci";
> +reg = <0 0xee0c0100 0 0x100>;
> +interrupts = ;
> +clocks = < CPG_MOD 705>;
> +phys = < 0>, < 1>;
> +phy-names = "usb";
> +companion = <>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 705>;
> +status = "disabled";
> +};
> +
> sdhi0: sd@ee10 {
> compatible = "renesas,sdhi-r8a77470",
> "renesas,rcar-gen2-sdhi";
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 3/7] ARM: dts: r8a77470: Add USB PHY DT support
> Subject: [PATCH 3/7] ARM: dts: r8a77470: Add USB PHY DT support
>
> Define the r8a77470 generic part of the USB PHY device node.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas-devel
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 38 ++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 6ac7f46..7d20c3b 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -315,6 +315,44 @@
> status = "disabled";
> };
>
> +usbphy0: usb-phy@e6590100 {
> +compatible = "renesas,usb-phy-r8a77470",
> + "renesas,rcar-gen2-usb-phy";
> +reg = <0 0xe6590100 0 0x100>,
> +<0 0xee080200 0 0x118>;
> +#address-cells = <1>;
> +#size-cells = <0>;
> +clocks = < CPG_MOD 704>, < CPG_MOD 703>;
> +clock-names = "usbhs", "usb20_host";
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 704>, < 703>;
> +status = "disabled";
> +
> +usb0: usb-channel@0 {
> +reg = <0>;
> +#phy-cells = <1>;
> +};
> +};
> +
> +usbphy1: usb-phy@e6598100 {
> +compatible = "renesas,usb-phy-r8a77470",
> + "renesas,rcar-gen2-usb-phy";
> +reg = <0 0xe6598100 0 0x100>,
> + <0 0xee0c0200 0 0x118>;
> +#address-cells = <1>;
> +#size-cells = <0>;
> +clocks = < CPG_MOD 706>, < CPG_MOD 705>;
> +clock-names = "usbhs", "usb20_host";
> +status = "disabled";
> +resets = < 706>, < 705>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +
> +usb1: usb-channel@0 {
> +reg = <0>;
> +#phy-cells = <1>;
> +};
> +};
> +
> dmac0: dma-controller@e670 {
> compatible = "renesas,dmac-r8a77470",
> "renesas,rcar-dmac";
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 1/7] dt-bindings: phy: rcar-gen2: Add r8a77470 support
> Subject: [PATCH 1/7] dt-bindings: phy: rcar-gen2: Add r8a77470 support
>
> Add USB PHY support for r8a77470 SoC. Renesas RZ/G1C (R8A77470)
> USB PHY is similar to the R-Car Gen2 family, but has the below
> features compared to other RZ/G1 and R-Car Gen2/3 SoCs
>
> It has a shared pll reset for usbphy0/usbphy1 and this register
> reside in usbphy0 block
>
> Each USB2.0 host needs to deassert the pll reset of usbphy0 block.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> .../devicetree/bindings/phy/rcar-gen2-phy.txt | 64
> +++---
> 1 file changed, 55 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
> b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
> index eeb9e18..0a59971 100644
> --- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
> @@ -6,6 +6,7 @@ This file provides information on what the device node for
> the R-Car generation
> Required properties:
> - compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743
> SoC.
>"renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
> + "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.
>"renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
>"renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
>"renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
> @@ -23,13 +24,23 @@ Required properties:
> - clocks: clock phandle and specifier pair.
> - clock-names: string, clock input name, must be "usbhs".
>
> +Optional properties (r8a77470 SoC Only):
> +To use a USB channel as USB 2.0 Host, the device tree node should set below
> +optional properties. This is because USB2.0 Host needs to deassert pll reset,
> +apart from initializing interrupt enable, OVC detection timer and suspend/
> +resume timer register.
> +
> +- reg: offset and length of the partial USB2.0 Host register block.
> +- clocks: clock phandle and specifier pair for usb2.0 host.
> +- clk-names: string, clock input name, must be "usb20_host".
> +
> The USB PHY device tree node should have the subnodes corresponding to the
> USB
> channels. These subnodes must contain the following properties:
> - reg: the USB controller selector; see the table below for the values.
> - #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
>
> The phandle's argument in the PHY specifier is the USB controller selector
> for
> -the USB channel; see the selector meanings below:
> +the USB channel other than r8a77470 SoC; see the selector meanings below:
>
> +---+---+---+
> |\ Selector | | |
> @@ -40,22 +51,57 @@ the USB channel; see the selector meanings below:
> | 2 | PCI EHCI/OHCI | xHCI |
> +---+---+---+
>
> +For r8a77470 SoC see the selector meaning below:
> +
> ++---+---+---+
> +|\ Selector | | |
> ++ - + 0 | 1 |
> +| Channel \| | |
> ++---+---+---+
> +| 0 | EHCI/OHCI | HS-USB|
> ++---+---+---+
> +
> Example (Lager board):
>
> -usb-phy@e6590100 {
> -compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
> +usbphy: usb-phy@e6590100 {
> +compatible = "renesas,usb-phy-r8a7790",
> + "renesas,rcar-gen2-usb-phy";
> reg = <0 0xe6590100 0 0x100>;
> #address-cells = <1>;
> #size-cells = <0>;
> -clocks = <_clks R8A7790_CLK_HSUSB>;
> +clocks = < CPG_MOD 704>;
> clock-names = "usbhs";
> +power-domains = < R8A7790_PD_ALWAYS_ON>;
> +resets = < 704>;
> +status = "disabled";
>
> -usb-channel@0 {
> -reg = <0>;
> -#phy-cells = <1>;
> +usb0: usb-channel@0 {
> +reg = <0>;
> +#phy-cells = <1>;
> +};
> +usb2: usb-channel@2 {
> +reg = <2>;
> +#phy-cells = <1>;
> };
> -usb-channel@2 {
> -reg = <2>;
> +};
> +
> +Example (iWave RZ/G1C SBC):
> +
> +usbphy0: usb-phy0@e6590100 {
> +compatible = "renesas,usb-phy-r8a77470",
> + "renesas,rcar-gen2-usb-phy";
> +reg = <0 0xe6590100 0 0x100>,
> + <0 0xee080200 0 0x118>;
> +#address-cells = <1>;
> +#size-cells = <0>;
> +clocks = < CPG_MOD 704>, < CPG_MOD 703>;
> +clock-names = "usbhs", "usb20_host";
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 704>, < 703>;
> +status = "disabled";
> +
> +usb0: usb-channel@0 {
> +reg = <0>;
> #phy-cells = <1>;
> };
> };
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 1/2] ARM: dts: r8a77470: Add watchdog support to SoC dtsi
> Subject: [PATCH 1/2] ARM: dts: r8a77470: Add watchdog support to SoC dtsi
>
> This patch adds watchdog support to the r8a77470 SoC dtsi.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch tested against renesas-dev
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index e40f5a9..872ad3a 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -196,6 +196,16 @@
> reg = <0 0xe616 0 0x100>;
> };
>
> +rwdt: watchdog@e602 {
> +compatible = "renesas,r8a77470-wdt",
> + "renesas,rcar-gen2-wdt";
> +reg = <0 0xe602 0 0x0c>;
> +clocks = < CPG_MOD 402>;
> +power-domains = < R8A77470_PD_ALWAYS_ON>;
> +resets = < 402>;
> +status = "disabled";
> +};
> +
> sysc: system-controller@e618 {
> compatible = "renesas,r8a77470-sysc";
> reg = <0 0xe618 0 0x200>;
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH 2/2] ARM: dts: iwg23s-sbc: Enable watchdog support
> Subject: [PATCH 2/2] ARM: dts: iwg23s-sbc: Enable watchdog support
>
> This patch enables watchdog support on the iWave iwg23s sbc.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> index 6277571..bc953fa 100644
> --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> @@ -128,6 +128,11 @@
> };
> };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
> {
> pinctrl-0 = <_pins>;
> pinctrl-names = "default";
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH 2/2] ARM: dts: iwg23s-sbc: Enable watchdog support
This patch enables watchdog support on the iWave iwg23s sbc.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 6277571..bc953fa 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -128,6 +128,11 @@
};
};
+ {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
{
pinctrl-0 = <_pins>;
pinctrl-names = "default";
--
2.7.4
[PATCH 1/2] ARM: dts: r8a77470: Add watchdog support to SoC dtsi
This patch adds watchdog support to the r8a77470 SoC dtsi.
Signed-off-by: Biju Das
---
This patch tested against renesas-dev
---
arch/arm/boot/dts/r8a77470.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index e40f5a9..872ad3a 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -196,6 +196,16 @@
reg = <0 0xe616 0 0x100>;
};
+ rwdt: watchdog@e602 {
+ compatible = "renesas,r8a77470-wdt",
+"renesas,rcar-gen2-wdt";
+ reg = <0 0xe602 0 0x0c>;
+ clocks = < CPG_MOD 402>;
+ power-domains = < R8A77470_PD_ALWAYS_ON>;
+ resets = < 402>;
+ status = "disabled";
+ };
+
sysc: system-controller@e618 {
compatible = "renesas,r8a77470-sysc";
reg = <0 0xe618 0 0x200>;
--
2.7.4
[PATCH] dt-bindings: watchdog: renesas-wdt: Document r8a77470 support
RZ/G1C (R8A77470) watchdog implementation is compatible with R-Car Gen2, therefore add relevant documentation. Signed-off-by: Biju Das --- This patch is tested against linux-next --- Documentation/devicetree/bindings/watchdog/renesas-wdt.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt index a8ee29f..a47bdea 100644 --- a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt @@ -8,6 +8,7 @@ Required properties: - "renesas,r8a7743-wdt" (RZ/G1M) - "renesas,r8a7744-wdt" (RZ/G1N) - "renesas,r8a7745-wdt" (RZ/G1E) +- "renesas,r8a77470-wdt" (RZ/G1C) - "renesas,r8a774a1-wdt" (RZ/G2M) - "renesas,r8a7790-wdt" (R-Car H2) - "renesas,r8a7791-wdt" (R-Car M2-W) -- 2.7.4
[PATCH 1/2] ARM: dts: r8a77470: Add CMT SoC specific support
Add CMT[01] support to r8a77470 SoC DT.
Signed-off-by: Biju Das
---
This patch is tested against renesas-dev
---
arch/arm/boot/dts/r8a77470.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 74ca5d3..e40f5a9 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -710,6 +710,38 @@
compatible = "renesas,prr";
reg = <0 0xff44 0 4>;
};
+
+ cmt0: timer@ffca {
+ compatible = "renesas,r8a77470-cmt0",
+"renesas,rcar-gen2-cmt0";
+ reg = <0 0xffca 0 0x1004>;
+ interrupts = ,
+;
+ clocks = < CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = < R8A77470_PD_ALWAYS_ON>;
+ resets = < 124>;
+ status = "disabled";
+ };
+
+ cmt1: timer@e613 {
+ compatible = "renesas,r8a77470-cmt1",
+"renesas,rcar-gen2-cmt1";
+ reg = <0 0xe613 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 329>;
+ clock-names = "fck";
+ power-domains = < R8A77470_PD_ALWAYS_ON>;
+ resets = < 329>;
+ status = "disabled";
+ };
};
timer {
--
2.7.4
[PATCH 2/2] ARM: dts: iwg23s-sbc: Enable cmt0
This patch enables cmt0 support on the iWave iwg23s sbc.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 518b0c0..6277571 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -73,6 +73,10 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
--
2.7.4
[PATCH] dt-bindings: timer: renesas, cmt: Document r8a77470 CMT support
Document SoC specific compatible strings for r8a77470. No driver change is needed as the fallback strings will activate the right code. Signed-off-by: Biju Das --- This patch is tested against linux-next --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 6de27b6..eb602c5 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -28,6 +28,8 @@ Required Properties: - "renesas,r8a7744-cmt1" for the 48-bit CMT1 device included in r8a7744. - "renesas,r8a7745-cmt0" for the 32-bit CMT0 device included in r8a7745. - "renesas,r8a7745-cmt1" for the 48-bit CMT1 device included in r8a7745. +- "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in r8a77470. +- "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in r8a77470. - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790. - "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790. - "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791. -- 2.7.4
[PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
Signed-off-by: Biju Das
---
This patch is tested against renesas-dev
I have executed on inconsistency-check, nanosleep and clocksource_switch
selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
are working fine.The clocksource_switch asynchronous test is failing due
to inconsistency-check failure on "arch_sys_counter".
But if i skip the clocksource_switching of "arch_sys_counter", the
asynchronous test is passing for CMT0/1/2/3 timer.
Has any one noticed this issue?
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 1ec6aaa..d62febd0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -401,6 +401,76 @@
reg = <0 0xe606 0 0x50c>;
};
+ cmt0: timer@e60f {
+ compatible = "renesas,r8a7796-cmt0",
+"renesas,rcar-gen3-cmt0";
+ reg = <0 0xe60f 0 0x1004>;
+ interrupts = ,
+;
+ clocks = < CPG_MOD 303>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 303>;
+ status = "disabled";
+ };
+
+ cmt1: timer@e613 {
+ compatible = "renesas,r8a7796-cmt1",
+"renesas,rcar-gen3-cmt1";
+ reg = <0 0xe613 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 302>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 302>;
+ status = "disabled";
+ };
+
+ cmt2: timer@e614 {
+ compatible = "renesas,r8a7796-cmt1",
+"renesas,rcar-gen3-cmt1";
+ reg = <0 0xe614 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 301>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 301>;
+ status = "disabled";
+ };
+
+ cmt3: timer@e6148000 {
+ compatible = "renesas,r8a7796-cmt1",
+"renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6148000 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 300>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 300>;
+ status = "disabled";
+ };
+
cpg: clock-controller@e615 {
compatible = "renesas,r8a7796-cpg-mssr";
reg = <0 0xe615 0 0x1000>;
--
2.7.4
[PATCH] dt-bindings: timer: renesas, cmt: Document r8a7796 CMT support
Document SoC specific bindings for R-Car M3-W (r8a7796) SoC. Signed-off-by: Biju Das --- This patch is tested against linu-next --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 3399267..6de27b6 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -36,6 +36,8 @@ Required Properties: - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793. - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794. - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794. +- "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796. +- "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796. - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970. - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970. - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980. -- 2.7.4
