> From: Yoshihiro Shimoda, Sent: Friday, November 30, 2018 4:01 PM
>
> Also, this is the first email I send after changing the email server
> to avoid using quoted-printable encoding.
This seems to work :)
https://lore.kernel.org/lkml/1543561257-27594-1-git-send-email-yoshihiro.shimoda...@renesa
This patch modifies rcar_gen3_init_otg() procedure to follow Figure
73.4 of "R-Car Series, 3rd Generation User's Manual: Hardware Rev.1.00".
Signed-off-by: Yoshihiro Shimoda
---
This patch is based on linux-phy.git / latest next branch
(commit id = 9b28b23a7a12cb07536da93100a907f772f00fea)
Chan
Hi Niklas,
On 11/29/18 6:25 PM, Niklas Söderlund wrote:
Hi Sakari, Steve,
Thanks for your quick response.
On 2018-11-29 22:37:53 +0200, Sakari Ailus wrote:
Hi Steve, Niklas,
On Thu, Nov 29, 2018 at 11:41:32AM -0800, Steve Longerbeam wrote:
On 11/29/18 11:26 AM, Steve Longerbeam wrote:
Hi N
Hi Simon-san,
Thank you for your review!
> From: Simon Horman, Sent: Monday, November 26, 2018 6:39 PM
>
> On Wed, Nov 21, 2018 at 08:10:06AM +, Yoshihiro Shimoda wrote:
> > This patch modifies rcar_gen3_init_otg() procedure to follow Figure
> > 73.4 of "R-Car Series, 3rd Generation User's M
Hi Sakari, Steve,
Thanks for your quick response.
On 2018-11-29 22:37:53 +0200, Sakari Ailus wrote:
> Hi Steve, Niklas,
>
> On Thu, Nov 29, 2018 at 11:41:32AM -0800, Steve Longerbeam wrote:
> >
> >
> > On 11/29/18 11:26 AM, Steve Longerbeam wrote:
> > > Hi Niklas,
> > >
> > > On 11/29/18 10:4
There is no need to hold the list_lock when initializing the local
asd_list of a notifier. Remove the lock handling to simplify the code
and remove a potential LOCKDEP warning.
Signed-off-by: Niklas Söderlund
Reported-by: Jacopo Mondi
---
drivers/media/v4l2-core/v4l2-async.c | 4
1 file ch
Quoting Stephen Boyd (2018-11-28 10:37:02)
> This is only used in this file, so mark it static to silence a sparse
> warning.
>
> Cc: Geert Uytterhoeven
> Signed-off-by: Stephen Boyd
> ---
Applied to clk-next
Quoting Geert Uytterhoeven (2018-11-29 02:49:55)
> Hi Mike, Stephen, Laurent, Kieran,
>
> This patch series contains several fixes for the Renesas Clock drivers
> and DT bindings, and a small simplification:
> - Removal of non-existent clocks,
> - Addition of the CPEX clocks, which can
Hi Steve, Niklas,
On Thu, Nov 29, 2018 at 11:41:32AM -0800, Steve Longerbeam wrote:
>
>
> On 11/29/18 11:26 AM, Steve Longerbeam wrote:
> > Hi Niklas,
> >
> > On 11/29/18 10:47 AM, Niklas Söderlund wrote:
> > > Hi Steve, Sakari and Hans,
> > >
> > > I have been made aware of a possible regress
On 11/29/18 11:26 AM, Steve Longerbeam wrote:
Hi Niklas,
On 11/29/18 10:47 AM, Niklas Söderlund wrote:
Hi Steve, Sakari and Hans,
I have been made aware of a possible regression by a few users of
rcar-vin and I'm a bit puzzled how to best handle it. Maybe you can help
me out?
The issue is
Hi Niklas,
On 11/29/18 10:47 AM, Niklas Söderlund wrote:
Hi Steve, Sakari and Hans,
I have been made aware of a possible regression by a few users of
rcar-vin and I'm a bit puzzled how to best handle it. Maybe you can help
me out?
The issue is visible when running with LOCKDEP enabled and it p
Hi Niklas,
Thank you for the patch.
On Thursday, 29 November 2018 04:01:44 EET Niklas Söderlund wrote:
> The CSI-2 transmitters can use a different number of lanes to transmit
> data. Make the data-lanes mandatory for the endpoints that describe the
> transmitters as no good default can be set to
Hi Steve, Sakari and Hans,
I have been made aware of a possible regression by a few users of
rcar-vin and I'm a bit puzzled how to best handle it. Maybe you can help
me out?
The issue is visible when running with LOCKDEP enabled and it prints a
warning about a possible circular locking depende
Hi Wolfram,
Thanks for your feedback.
On 2018-11-29 17:54:34 +0100, Wolfram Sang wrote:
> Hi Niklas,
>
> thanks for the patches!
>
> On Thu, Nov 29, 2018 at 01:39:49AM +0100, Niklas Söderlund wrote:
> > On H3 (ES1.x, ES2.0) and M3-W (ES1.0, ES1.1) the clock setting for HS400
> > needs a quirk t
The iWave RZ/G1C SBC supports RTC (NXP pcf85263). To increase hardware
support enable the driver in the shmobile_defconfig multiplatform
configuration.
Signed-off-by: Biju Das
---
V1-->V2 no change.
---
arch/arm/configs/shmobile_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/
Enable NXP pcf85263 real time clock for the iWave SBC based on RZ/G1C.
Signed-off-by: Biju Das
---
V1-->V2 no change
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
b/arch/arm/boot/dt
The pcf85263 RTC is compatible with the pcf85363 RTC.
The difference between the pcf85263 and pcf85363 RTC is that the latter has
64 bytes more RAM. This renders them incompatible from a DT point of view.
Signed-off-by: Biju Das
---
V1-->V2 Incorporated Simon's review comment.
---
Documentati
Add support for NXP pcf85263 real-time clock. pcf85263 rtc is compatible
with pcf85363,except that pcf85363 has additional 64 bytes of RAM.
1 byte of nvmem is supported and exposed in sysfs (# is the instance
number,starting with 0): /sys/bus/nvmem/devices/pcf85x63-#/nvmem
Signed-off-by: Biju Das
This patch set aims to add support for NXP pcf85263 real-time clock.
pcf85263 rtc is compatible with pcf85363 rtc except that pcf85363 has
64 bytes additional RAM.
1 byte of nvmem is supported in pcf85263 and is exposed through sysfs.
The details of pcf85363 and pcf85263 can be found in the bel
Hi Niklas,
thanks for the patches!
On Thu, Nov 29, 2018 at 01:39:49AM +0100, Niklas Söderlund wrote:
> On H3 (ES1.x, ES2.0) and M3-W (ES1.0, ES1.1) the clock setting for HS400
> needs a quirk to function properly. The reason for the quirk is that
> there are two settings which produces same divid
On Thu, Nov 29, 2018 at 01:15:38AM +0100, Niklas Söderlund wrote:
> The driver tries to figure out which state a SD clock is in when the
> clock is register instead of setting a known state. This can be
> problematic for two reasons.
>
> 1. If the clock driver can't figure out the state of the clo
On Thu, Nov 29, 2018 at 09:54:37PM +1000, Greg Ungerer wrote:
> Hi Phil,
>
> On 17/11/18 12:59 am, Phil Edworthy wrote:
> > clk_get_optional() returns NULL if not found instead of -ENOENT,
> > otherwise the behaviour is the same as clk_get().
> >
> > Signed-off-by: Phil Edworthy
>
> Acked-by: G
Hello Mauro,
Does this patch look ok to you?
Thanks,
Fab
> -Original Message-
> From: Biju Das
> Sent: 10 September 2018 15:31
> To: Mauro Carvalho Chehab
> Cc: Biju Das ; Niklas Söderlund
> ; linux-me...@vger.kernel.org; linux-
> renesas-...@vger.kernel.org; Simon Horman ; Geert
> Uyt
On Tue, Nov 27, 2018 at 11:56:25AM +, Biju Das wrote:
> This patch adds support for the camera daughter board which is
> connected to iWave's RZ/G1N Qseven carrier board.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before apply
On Tue, Nov 27, 2018 at 11:56:24AM +, Biju Das wrote:
> Add du node to r8a7744 SoC DT. Boards that want to enable the DU
> need to specify the output topology.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Revie
On Thu, Nov 29, 2018 at 3:45 PM Linus Walleij wrote:
>
> On Mon, Nov 26, 2018 at 3:12 PM Daniel Vetter wrote:
> > On Sat, Nov 24, 2018 at 10:17:13PM +0100, Linus Walleij wrote:
>
> > > It was especially scary.
> > >
> > > But I think I managed to apply the patches and push the
> > > branch now.
>
On Tue, Nov 27, 2018 at 11:56:23AM +, Biju Das wrote:
> Add sound support for the RZ/G1N SoC (a.k.a. R8A7744).
>
> This work is based on similar work done on the R8A7743 SoC.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before
On Mon, Nov 26, 2018 at 3:12 PM Daniel Vetter wrote:
> On Sat, Nov 24, 2018 at 10:17:13PM +0100, Linus Walleij wrote:
> > It was especially scary.
> >
> > But I think I managed to apply the patches and push the
> > branch now.
>
> Except when you're racing with someone else you should only see co
On Tue, Nov 27, 2018 at 11:56:22AM +, Biju Das wrote:
> Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
> RZ/G1N (r8a7744) SoC.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by
On 29-11-18, 12:18, Geert Uytterhoeven wrote:
> Renesas R-Mobile APE6 support is currently unused:
> - DMA slaves were never enabled in r8a73a4.dtsi,
> - The driver relies on legacy filter matching and describing all
> slaves and MID/RIDs in a table, unlike modern DMA engine drivers for
>
On Tue, Nov 27, 2018 at 11:56:21AM +, Biju Das wrote:
> Add usb dmac and hsusb device nodes on RZ/G1N SoC dtsi.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Tue, Nov 27, 2018 at 11:56:20AM +, Biju Das wrote:
> Describe internal PCI bridge devices, USB phy device and
> link PCI USB devices to USB phy.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simo
On Wed, Nov 28, 2018 at 02:15:55PM +, Biju Das wrote:
>
> > -Original Message-
> > From: linux-renesas-soc-ow...@vger.kernel.org > ow...@vger.kernel.org> On Behalf Of Simon Horman
> > Sent: 28 November 2018 13:24
> > To: Biju Das
> > Cc: Sergei Shtylyov ; Rob Herring
> > ; Mark Rutla
On Tue, Nov 27, 2018 at 11:56:18AM +, Biju Das wrote:
> Add eMMC support for iWave RZ/G1N Qseven System On Module.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Tue, Nov 27, 2018 at 11:56:17AM +, Biju Das wrote:
> Add MMC node to the DT of the r8a7744 SoC.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
Hi Simon & Geert,
Thanks for the feedback.
> -Original Message-
> From: linux-renesas-soc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Simon Horman
> Sent: 29 November 2018 13:41
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Magnus Damm ;
> linux-renesas-soc@vger.kern
On Tue, Nov 27, 2018 at 11:56:16AM +, Biju Das wrote:
> Add SDHI nodes to the DT of the r8a7744 SoC.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Tue, Nov 27, 2018 at 11:56:15AM +, Biju Das wrote:
> Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.
>
> Signed-off-by: Biju Das
> ---
> arch/arm/boot/dts/r8a7744.dtsi | 141
> -
> 1 file changed, 139 insertions(+), 2 dele
Hi Simon,
Thanks for the feedback.
> -Original Message-
> From: linux-renesas-soc-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Simon Horman
> Sent: 29 November 2018 12:49
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Magnus Damm ;
> linux-renesas-soc@vger.kernel.org;
On Tue, Nov 27, 2018 at 11:56:14AM +, Biju Das wrote:
> Describe [H]SCIF{|A|B} ports in the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
Add a Device Tree for RZ/A2 and the existing eval board.
Once these get approved, I'll start piling on the other drivers in
another patch series.
Chris Brandt (2):
ARM: dts: r7s9210: Initial SoC device tree
ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB
Documentation/devicetree/bin
Add support for Renesas RZ/A2M evaluation board.
Signed-off-by: Chris Brandt
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r7s9210-rza2mevb.dts | 133 +
3 files changed
Basic support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt
---
arch/arm/boot/dts/r7s9210.dtsi | 211 +
1 file changed, 211 insertions(+)
create mode 100644 arch/arm/boot/dts/r7s9210.dtsi
diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/
On Thu, Nov 22, 2018 at 09:14:33AM +, Biju Das wrote:
> Describe GPIO blocks in the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Thu, Nov 22, 2018 at 09:14:34AM +, Biju Das wrote:
> Add Ethernet AVB support for R8A7744 SoC.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Thu, Nov 22, 2018 at 09:14:32AM +, Biju Das wrote:
> Describe SYS-DMAC0/1 in the R8A7744 device tree.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Thu, Nov 22, 2018 at 09:14:30AM +, Biju Das wrote:
> Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
> to avoid compilation error with the common platform code.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
befo
On Thu, Nov 22, 2018 at 09:14:31AM +, Biju Das wrote:
> Add support for iWave RainboW-G20D-Qseven board based on RZ/G1N.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Thu, Nov 22, 2018 at 09:14:29AM +, Biju Das wrote:
> Add support for iWave RZ/G1N Qseven System On Module.
>
> Signed-off-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman
On Thu, Nov 22, 2018 at 09:14:35AM +, Biju Das wrote:
> Add DT node for the Advanced Power Management Unit (APMU), add the
> second CPU core, and use "renesas,apmu" as "enable-method".
>
> Also add cpu1 phandle node to the PMU interrupt-affinity property.
Hi Biju,
Could you comment on how we
Hi Geert,
Thank you for the patch.
On Thursday, 29 November 2018 12:58:50 EET Geert Uytterhoeven wrote:
> Using overlay sugar syntax makes the DTS files easier to read (and
> write).
>
> Overlay syntactic sugar for generating target-path fragments is
> supported by the version of dtc supplied wi
Hi Biju,
On Thursday, 29 November 2018 10:39:00 EET Biju Das wrote:
> > Subject: Re: Issue with enabling VSP source on rcar gen2 koelsch board
> > On Wednesday, 28 November 2018 15:20:58 EET Biju Das wrote:
> >> Hi all,
> >>
> >> On the past, I have tested vsp source on rcar gen2 koelsch board,
Hi Geert,
On Thursday, 29 November 2018 12:49:55 EET Geert Uytterhoeven wrote:
> Hi Mike, Stephen, Laurent, Kieran,
>
> This patch series contains several fixes for the Renesas Clock drivers
> and DT bindings, and a small simplification:
> - Removal of non-existent clocks,
> - Addition
Hi Geert,
Thank you for the patch.
On Thursday, 29 November 2018 12:50:04 EET Geert Uytterhoeven wrote:
> According to the R-Car Gen3 Hardware Manual Rev 1.00, the parent clock
> of the DU module clocks on R-Car D3 is S1D1.
>
> Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 suppo
On Fri, Oct 26, 2018 at 11:03 AM Biju Das wrote:
> RZ/G1C (R8A77470) watchdog implementation is compatible with R-Car
> Gen2, therefore add relevant documentation.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoe
Hi Geert,
Thank you for the patch.
On Thursday, 29 November 2018 12:50:03 EET Geert Uytterhoeven wrote:
> From: Takeshi Kihara
>
> According to the R-Car Gen3 Hardware Manual Rev 1.00, the parent clock
> of the DU module clocks on R-Car E3 is S1D1.
>
> Signed-off-by: Takeshi Kihara
> Fixes: 3
Hi Phil,
On 29/11/18 10:02 pm, Phil Edworthy wrote:
On 29 November 2018 11:55, Greg Ungerer wrote:
On 17/11/18 12:59 am, Phil Edworthy wrote:
clk_get_optional() returns NULL if not found instead of -ENOENT,
otherwise the behaviour is the same as clk_get().
Signed-off-by: Phil Edworthy
Acke
Hi Phil,
On 17/11/18 12:59 am, Phil Edworthy wrote:
clk_get_optional() returns NULL if not found instead of -ENOENT,
otherwise the behaviour is the same as clk_get().
Signed-off-by: Phil Edworthy
Acked-by: Greg Ungerer
Looks good. Do you want me to take this in the m68knommu git tree?
Or i
Hi Greq,
On 29 November 2018 11:55, Greg Ungerer wrote:
> On 17/11/18 12:59 am, Phil Edworthy wrote:
> > clk_get_optional() returns NULL if not found instead of -ENOENT,
> > otherwise the behaviour is the same as clk_get().
> >
> > Signed-off-by: Phil Edworthy
>
> Acked-by: Greg Ungerer
>
> Lo
Renesas R-Mobile APE6 support is currently unused:
- DMA slaves were never enabled in r8a73a4.dtsi,
- The driver relies on legacy filter matching and describing all
slaves and MID/RIDs in a table, unlike modern DMA engine drivers for
similar hardware like rcar-dmac,
- The driver doesn
Commit 59b89af1d5551c12 ("ARM: shmobile: sh7372: Remove Legacy C
SoC code") removed the last user of the rmobile_pm_domain.resume()
callback.
Commit 44d88c754e57a6d9 ("ARM: shmobile: Remove legacy SoC code
for R-Mobile A1") removed the last user of the rmobile_pm_domain.no_debug
flag and of the "p
The pm-rmobile driver is really a driver for the System Controller
(SYSC) found in R-Mobile SoCs. An equivalent driver for R-Car SoCs is
already located under drivers/soc/renesas/.
Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and rename it to rmobile-sysc
Hi Simon, Magnus,
This is a patch series for the pm-rmobile driver, used on R-Mobile A1 and
APE6, and on SH-Mobile AG5, to clean up the driver, move it to
drivers/soc/renesas/, and enable compile-testing.
Thanks!
Geert Uytterhoeven (2):
ARM: shmobile: R-Mobile: Clean up struct rmobile_
Using overlay sugar syntax makes the DTS files easier to read (and
write).
Overlay syntactic sugar for generating target-path fragments is
supported by the version of dtc supplied with the kernel since commit
50aafd60898a8b3e ("scripts/dtc: Update to upstream version
v1.4.6-21-g84e414b0b5bc").
Si
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).
As this definition is no longer used from DT, it can be removed.
Fixes: a527709b78b3c997 ("soc: renesas: rcar-sysc: Add R-Ca
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
power domain hierarchy for the A3VIP[012] power domains.
As the definition for the A3VIP0 domain is not yet used from DT, it can
just be renamed.
Fixes: 7755
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the CR7 power domain on R-Car V3M, as this SoC does not have an
ARM Cortex-R7 Realtime Core.
As this definition was never used from DT, it can just be removed.
Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYS
Hi Simon, Magnus,
This patch series contains several fixes for the Renesas SYSC (power
domain) drivers and DT bindings:
- Removal of non-existent power domains,
- Correction of power domain names and hierarchy.
These are the result of skimming the Hardware Manual Errata.
Note that the
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
A2CN.
As these definitions are not yet used from DT, they can just be renamed.
While at it, fix the indentation of the A3IR definition.
Fixes: 833bdb47c826a1a6
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp.
A2DP1.
As these definitions are not yet used from DT, they can just be renamed.
Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain
de
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).
The definition in the DT bindings header cannot be removed yet, until
its (incorrect) user has been removed.
Fixes: a527709b
Implement support for the CPEX clock on R-Car V3M. This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a77970-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77970-c
From: Takeshi Kihara
According to the R-Car Gen3 Hardware Manual Rev 1.00, the parent clock
of the DU module clocks on R-Car E3 is S1D1.
Signed-off-by: Takeshi Kihara
Fixes: 3570a2af473789c5 ("clk: renesas: cpg-mssr: Add support for R-Car E3")
Signed-off-by: Geert Uytterhoeven
---
drivers/clk
The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016)
removed the CSI reference clock on R-Car M3-W.
As this definition was never used, it can just be removed.
The freed slot in the DT bindings header must not be reused, though.
Fixes: 972610fb23b08dd5 ("clk: renesas: Add r8a7796 CPG
The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016)
removed the CSI reference clock on R-Car H3.
As this definition was never used, it can just be removed.
The freed slot in the DT bindings header must not be reused, though.
Fixes: 9d0c3c682033d3f1 ("clk: shmobile: Add r8a7795 CPG
Implement support for the CPEX clock on R-Car H3. This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7795-cpg-
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.
As these definitions were never used, they can just be removed.
The freed slots in the DT bindings
Implement support for the CPEX clock on R-Car M3-W. This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7796-cp
According to the R-Car Gen3 Hardware Manual Rev 1.00, the parent clock
of the DU module clocks on R-Car D3 is S1D1.
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a77995-cpg-mssr.c | 4 ++--
1 file changed, 2 i
Implement support for the CPEX clock on RZ/G2M. This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a774a1-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a774a1-cpg-
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added
the CPEX clock on R-Car D3. This clock can be selected as a clock
source for CMT1 (Compare Match Timer Type 1).
Add the missing clock to the DT bindings header, and implement support
for it in the clock driver.
Signed-off-b
R-Car Gen3 Hardware Manual Errata for Rev 0.80 of February 28, 2018,
removed the module clocks for the Video Input Module (VIN) channels 5-7
on R-Car D3, as they do not exist on this SoC.
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven
--
Implement support for the CPEX clock on R-Car M3-N. This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77965-
Hi Mike, Stephen, Laurent, Kieran,
This patch series contains several fixes for the Renesas Clock drivers
and DT bindings, and a small simplification:
- Removal of non-existent clocks,
- Addition of the CPEX clocks, which can be used a source for a timer
(CMT1),
- Correction of D
116/6 can be simplified to 58/3.
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/r8a77995-cpg-mssr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c
b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index b9745665731fac7e..eee387
While commit 3b7e7848f0e88b36 ("arm64: dts: renesas: r8a7795: Add IPMMU
device nodes") for R-Car H3 ES2.0 did include power-domains properties,
they were forgotten in the counterpart for older R-Car H3 ES1.x SoCs.
Fixes: e4b9a493df45075b ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device
nodes"
Hi Simon, Magnus,
This patch series contains two IPMMU-related fixes for the R-Car M3-N
and R-Car H3 ES1.x SoCs.
The first patch is a dependency for a later fix.
Thanks!
Geert Uytterhoeven (2):
arm64: dts: renesas: r8a77965: Remove non-existent IPMMU-IR
arm64: dts: renesas: r8a7795-
The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Aug 24, 2018)
removed the IPMMU-IR IOMMU instance on R-Car M3-N, as this SoC does not
have an Image Processing Unit (IMP-X5) nor the A3IR power domain.
Fixes: 55697cbb44e4f7ea ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU
devices nodes")
S
On Wed, Nov 28, 2018 at 09:23:36AM +, Yoshihiro Shimoda wrote:
> To avoid adding copy and pasted strcmp codes in the future,
> this patch adds an array "rcar_gen3_slave_whitelist" to check
> whether the device can work with the IPMMU or not.
>
> Signed-off-by: Yoshihiro Shimoda
> Reviewed-by:
On Wed, Nov 28, 2018 at 09:23:36AM +, Yoshihiro Shimoda wrote:
> Some R-Car Gen3 SoCs has hardware restrictions on the IPMMU. So,
> to check whether this R-Car Gen3 SoC can use the IPMMU correctly,
> this patch modifies the ipmmu_slave_whitelist().
>
> Signed-off-by: Yoshihiro Shimoda
> Revie
Hello!
On 11/29/2018 03:15 AM, Niklas Söderlund wrote:
> The driver tries to figure out which state a SD clock is in when the
> clock is register instead of setting a known state. This can be
Registered?
> problematic for two reasons.
>
> 1. If the clock driver can't figure out the state of
Hi Laurent,
Thanks for the feedback.
> Subject: Re: Issue with enabling VSP source on rcar gen2 koelsch board
>
> Hi Biju,
>
> On Wednesday, 28 November 2018 15:20:58 EET Biju Das wrote:
> > Hi all,
> >
> > On the past, I have tested vsp source on rcar gen2 koelsch board,
> > using the patches
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