Hi Sakari,
Thanks for your feedback.
On 2018-12-04 00:16:29 +0200, Sakari Ailus wrote:
> Hi Niklas,
>
> On Fri, Nov 02, 2018 at 12:31:14AM +0100, Niklas Söderlund wrote:
> > Hi all,
> >
> > This series adds support for multiplexed streams within a media device
> > link. The use-case addressed i
Hi,
I would like to stop accepting non-bug-fix patches for v4.21 and get
the last pull requests posted by the end of this week. This is in order
for them to be sent before the release of v4.20-rc6, the deadline set by the
ARM SoC maintainers. As patches should ideally progress from the renesas
tr
On 12/05/2018 07:56 PM, Sergei Shtylyov wrote:
> On 12/04/2018 09:19 PM, Marek Vasut wrote:
>
>>> Document the bindings used by the Renesas R-Car Gen3 RPC SPI controller.
>>
>> RPC is SPI and HF controller, it is not a pure SPI controller.
>>
>> How does this deal with the HF part ? Keep in mind t
On Thu, Nov 22, 2018 at 9:19 PM Vladimir Zapolskiy wrote:
> The change simplifies dereferences to the mediated struct device, also
> it allows to limit the scope of the platform device usage to probe and
> remove functions only.
>
> Non-functional change.
>
> Signed-off-by: Vladimir Zapolskiy
P
On Tue, Nov 20, 2018 at 4:19 PM Fabrizio Castro
wrote:
> Sometimes there is the need to change the muxing of a pin to make it
> a GPIO without going through gpiolib.
> This patch adds pinctrl_mux_gpio_request_enable to deal with this new
> use case from code that has nothing to do with pinctrl.
Basic support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt
---
v2:
* Fixed cpg node name to match reg address
* Removed the clocks subnode
* SCIF register range 18 to 0x18
* Removed 'reset-cells' from cpg because resets not supported (yet?)
* Sorted nodes by address (per group of
Add a Device Tree for RZ/A2 and the existing eval board.
Once these get approved, I'll start piling on the other drivers in
another patch series.
NOTE:
Since Rob is in the middle of converting shmobile.txt to renesas.yaml,
I'll wait till that is finisehd before I add this RZ/A2M EVB board.
Ch
Add support for Renesas RZ/A2M evaluation board.
Signed-off-by: Chris Brandt
---
v2:
* Removed patch for shmobile.txt
* Added SPDX
* Removed earlycon from bootargs
* Fixed address in memory node name
* Removed un-needed "okay" from leds node
* Added green LED node
* Dropped this blank line
Hi Wolfram,
On 2018-12-05 21:46:28 +0100, Wolfram Sang wrote:
> On Fri, Nov 02, 2018 at 12:57:19PM +0100, Simon Horman wrote:
> > On Thu, Nov 01, 2018 at 08:45:29PM +0100, Wolfram Sang wrote:
> > >
> > > > This patch have quiet a few dependencies I'm afraid, let me know if you
> > > > wish to be
Hi Uli,
> pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions
> pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and
> functions
> pinctrl: sh-pfc: r8a7796: Add I2C{0,3,5} pins, groups and functions
The BSP also has a similar patch for r8a77965. Could you also t
On Wed, Dec 05, 2018 at 04:39:41PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This series (against renesas-devel-20181204-v4.20-rc5) contains
> miscellaneous fixes and cleanups for the R-Car SYSC driver.
>
> This has been tested on R-Car Gen2 (H2 and M2-W) and R-Car Gen3 (H3
>
On Wed, Dec 05, 2018 at 04:39:45PM +0100, Geert Uytterhoeven wrote:
> To control power to a power domain, the System Controller (SYSC) needs
> the corresponding interrupt source to be enabled, but masked, to prevent
> the CPU from receiving it.
>
> Currently this is handled in the driver's probe()
On Wed, Dec 5, 2018 at 8:50 PM Rob Herring wrote:
> Convert string compares of DT node names to use of_node_name_eq helper
> instead. This removes direct access to the node name pointer.
>
> For instances using of_node_cmp, this has the side effect of now using
> case sensitive comparisons. This s
On Fri, Nov 02, 2018 at 12:57:19PM +0100, Simon Horman wrote:
> On Thu, Nov 01, 2018 at 08:45:29PM +0100, Wolfram Sang wrote:
> >
> > > This patch have quiet a few dependencies I'm afraid, let me know if you
> > > wish to be notified once they all upstream. I don't think it's a good
> > > idea t
Quoting Rob Herring (2018-12-05 11:50:21)
> Convert string compares of DT node names to use of_node_name_eq helper
> instead. This removes direct access to the node name pointer.
>
> For instances using of_node_cmp, this has the side effect of now using
> case sensitive comparisons. This should no
On Wed, Dec 05, 2018 at 09:06:53AM +, Biju Das wrote:
> Add du node to r8a7744 SoC DT. Boards that want to enable the DU
> need to specify the output topology.
>
> Signed-off-by: Biju Das
> ---
> V1-->V2
> * Removed LVDS encoder definition from DU node.
I would like this and the remain
On Wed, Dec 05, 2018 at 09:06:51AM +, Biju Das wrote:
> The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
> are SoC specific and should be part of board dts rather than SoM dtsi. By
> moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
> on both o
On Wed, Dec 05, 2018 at 09:06:52AM +, Biju Das wrote:
> Add support for the SPI NOR device used to boot up the system
> to the iWave RZ/G1N Qseven System On Module DT.
>
> Signed-off-by: Biju Das
> Reviewed-by: Geert Uytterhoeven
> ---
> V1-->V2
> * Removed compatible string "sst,sst25v
Convert string compares of DT node names to use of_node_name_eq helper
instead. This removes direct access to the node name pointer.
For instances using of_node_cmp, this has the side effect of now using
case sensitive comparisons. This should not matter for any FDT based
system which all of these
Hi Laurent,
On Tue, Dec 04, 2018 at 06:57:10PM +0200, Laurent Pinchart wrote:
> Hi Simon,
>
> Could you please consider taking this patch in your tree ? It's independent
> from the rest of the series.
sure, applied for v4.21.
>
> On Sunday, 25 November 2018 16:40:30 EET Laurent Pinchart wrote
On Tue, Dec 04, 2018 at 09:08:57AM -0600, Rob Herring wrote:
> On Tue, Dec 4, 2018 at 8:57 AM Geert Uytterhoeven
> wrote:
> >
> > Hi Simon,
> >
> > On Tue, Dec 4, 2018 at 3:48 PM Simon Horman wrote:
> > > On Mon, Dec 03, 2018 at 03:32:15PM -0600, Rob Herring wrote:
> > > > Convert Renesas SoC bi
On Tue, Dec 04, 2018 at 03:55:28PM +0100, Geert Uytterhoeven wrote:
> On Tue, Nov 27, 2018 at 1:05 PM Biju Das wrote:
> > The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
> > are SoC specific and should be part of board dts rather than SoM dtsi. By
> > moving these nodes
On 12/04/2018 09:19 PM, Marek Vasut wrote:
>> Document the bindings used by the Renesas R-Car Gen3 RPC SPI controller.
>
> RPC is SPI and HF controller, it is not a pure SPI controller.
>
> How does this deal with the HF part ? Keep in mind the bindings are ABI
> and it will be difficult to redo
On 11/21/2018 08:37 AM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Wed, Nov 21, 2018 at 12:33 AM Marek Vasut wrote:
>> On 11/19/2018 10:00 AM, Geert Uytterhoeven wrote:
>>> On Mon, Nov 19, 2018 at 12:46 AM Marek Vasut wrote:
On 11/19/2018 12:02 AM, Wolfram Sang wrote:
> On Sun, Nov
Describe the location and contents of the SYSCEXTMASK register on R-Car
E3, to prevent conflicts between internal and external power requests.
Based on a patch in the BSP by Dien Pham .
Signed-off-by: Geert Uytterhoeven
---
drivers/soc/renesas/r8a77990-sysc.c | 3 +++
1 file changed, 3 insertio
Describe the location and contents of the SYSCEXTMASK register on R-Car
V3H, to prevent conflicts between internal and external power requests.
Signed-off-by: Geert Uytterhoeven
---
drivers/soc/renesas/r8a77980-sysc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/soc/renesas/r8a
Recent R-Car Gen3 SoCs added an External Request Mask Register to the
System Controller (SYSC). This register allows to mask external power
requests for CPU or 3DG domains, to prevent conflicts when Linux changes
the state of a power domain through SYSC, which could lead to system
lock-ups.
Add s
Hi Simon, Magnus,
Recent R-Car Gen3 SoCs added an External Request Mask Register to the
System Controller (SYSC). This register allows to mask external power
requests for CPU or 3DG domains, to prevent conflicts when Linux changes
the state of a power domain through SYSC, which could lead
Describe the location and contents of the SYSCEXTMASK register on R-Car
M3-W, to prevent conflicts between internal and external power requests.
This register does not exist on R-Car M3-W ES1.x.
Based on a patch in the BSP by Dien Pham .
Signed-off-by: Geert Uytterhoeven
---
drivers/soc/renesa
Describe the location and contents of the SYSCEXTMASK register on R-Car
V3M, to prevent conflicts between internal and external power requests.
Based on a patch in the BSP by Dien Pham .
Signed-off-by: Geert Uytterhoeven
---
drivers/soc/renesas/r8a77970-sysc.c | 3 +++
1 file changed, 3 inserti
Describe the location and contents of the SYSCEXTMASK register on R-Car
M3-N, to prevent conflicts between internal and external power requests.
Based on a patch in the BSP by Dien Pham .
Signed-off-by: Geert Uytterhoeven
---
drivers/soc/renesas/r8a77965-sysc.c | 3 +++
1 file changed, 3 insert
Describe the location and contents of the SYSCEXTMASK register on R-Car
H3, to prevent conflicts between internal and external power requests.
This register does not exist on R-Car H3 ES1.x and ES2.x.
Based on a patch in the BSP by Dien Pham .
Signed-off-by: Geert Uytterhoeven
---
drivers/soc/
Until commit 7e8a50df26f4e700 ("soc: renesas: rcar-sysc: Drop legacy
handling"), the rcar_sysc_power_{down,up}() helpers were public, as they
were called by the legacy (pre-DT) CPU power management code on R-Car H1
and R-Car Gen2 before.
As they are just one-line wrappers around rcar_sysc_power(),
Commit 977d5ba4507dfe5b ("soc: renesas: rcar-sysc: Make PM domain
initialization more robust") split PM Domain registration and the
linking of children to their parents, to accommodate PM Domain tables
that list child domains before their parents.
However, this failed to realize that parent power
Hi Simon, Magnus,
This series (against renesas-devel-20181204-v4.20-rc5) contains
miscellaneous fixes and cleanups for the R-Car SYSC driver.
This has been tested on R-Car Gen2 (H2 and M2-W) and R-Car Gen3 (H3
ES1.0, H3 ES2.0, M3-W, M3-N, D3, E3, and V3M) (without 3DG).
This not been tes
The workaround for the wrong hierarchy of the 3DG-{A,B} power
domains on R-Car E3 ES1.0 corrected the parent domains.
However, the 3DG-{A,B} power domains were still initialized and powered
in the wrong order, causing 3DG operation to fail.
Fix this by changing the order in the table at runtime, w
To control power to a power domain, the System Controller (SYSC) needs
the corresponding interrupt source to be enabled, but masked, to prevent
the CPU from receiving it.
Currently this is handled in the driver's probe() routine, and set up
for every domain present, even if it will not be controll
On 12/05/2018 03:39 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Sun, Dec 2, 2018 at 8:36 PM Marek Vasut wrote:
>> It is possible that the PCA953x is powered down during suspend.
>> Use regmap cache to assure the registers in the PCA953x are in
>> line with the driver state after resume.
>
Hi Marek,
On Sun, Dec 2, 2018 at 8:36 PM Marek Vasut wrote:
> It is possible that the PCA953x is powered down during suspend.
> Use regmap cache to assure the registers in the PCA953x are in
> line with the driver state after resume.
>
> Signed-off-by: Marek Vasut
> +static int pca953x_suspend(
On 12/05/2018 02:54 PM, Laurent Pinchart wrote:
> Hi Marek,
Hi,
> On Wednesday, 5 December 2018 14:29:22 EET Marek Vasut wrote:
>> On 12/05/2018 06:21 AM, Laurent Pinchart wrote:
>>> On Wednesday, 5 December 2018 01:48:01 EET Marek Vasut wrote:
On 12/04/2018 09:52 PM, Stephen Boyd wrote:
>>>
On Wed, 28 Nov 2018 at 17:19, Niklas Söderlund
wrote:
>
> Hi,
>
> Recent datasheet updates have made it clear that some quirks are not SoC
> specific but SoC + ES version specific. Currently the quirks are
> selected using compatibility values but whit this new information that
> is not enough.
>
On Mon, 3 Dec 2018 at 20:56, Wolfram Sang
wrote:
>
> If we use it this way, people should know about it. Also, replace
> true/false with nonzero/zero because the flag is not strictly a bool
> anymore.
>
> Signed-off-by: Wolfram Sang
> Reviewed-by: Geert Uytterhoeven
Applied for next, thanks!
K
On Mon, 19 Nov 2018 at 14:14, Wolfram Sang
wrote:
>
> Some variants (namely Renesas SDHI) have bits in the STATS and IRQ_MASK
> registers which are 'always 1' and should be written as such. Introduce
> a seperate mask for this and apply it whenever such a register is
> written.
>
> Signed-off-by:
On Mon, 26 Nov 2018 at 18:03, Niklas Söderlund
wrote:
>
> Hi,
>
> While looking at the Renesas BSP kernel I found patches which improves
> the state of the hardware at probe and after runtime resume.
>
> Patch 1/3 make sure the module clock is enabled after resuming before
> register are accessed.
On Mon, 26 Nov 2018 at 14:38, Wolfram Sang
wrote:
>
> When sending out CMD23 in the blk preparation, the comment there
> rightfully says:
>
> * However, it is not sufficient to just send CMD23,
> * and avoid the final CMD12, as on an error condition
> * CMD12 (stop) need
On Mon, 26 Nov 2018 at 14:38, Wolfram Sang
wrote:
>
> The only user was converted to fill a sbc command which is the proper
> way to do it because of AutoCMD23 feature of some hosts.
>
> Signed-off-by: Wolfram Sang
> Tested-by: Clément Péron
Applied for next, thanks!
Kind regards
Uffe
> ---
>
Hi Marek,
On Wednesday, 5 December 2018 14:29:22 EET Marek Vasut wrote:
> On 12/05/2018 06:21 AM, Laurent Pinchart wrote:
> > On Wednesday, 5 December 2018 01:48:01 EET Marek Vasut wrote:
> >> On 12/04/2018 09:52 PM, Stephen Boyd wrote:
> >>> Quoting Marek Vasut (2018-12-04 10:27:21)
> >>>
>
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v2 2/4] rtc: pcf85363: Add support for NXP pcf85263 rtc
>
> Hi Biju,
>
> On Thu, Nov 29, 2018 at 6:03 PM Biju Das wrote:
> > Add support for NXP pcf85263 real-time clock. pcf85263 rtc is
> > compatible with pcf85363,except that pcf85363 ha
Hi Geert and Alexandre,
Thanks for the feedback.
> Subject: Re: [PATCH v2 2/4] rtc: pcf85363: Add support for NXP pcf85263 rtc
>
> Hi Alexandre,
>
> On Fri, Nov 30, 2018 at 1:32 PM Alexandre Belloni
> wrote:
> > On 30/11/2018 12:05:16+0100, Geert Uytterhoeven wrote:
> > > On Thu, Nov 29, 2018 at
On 12/05/2018 02:31 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Wed, Dec 5, 2018 at 2:25 PM Marek Vasut wrote:
>> On 12/05/2018 02:15 PM, Geert Uytterhoeven wrote:
>>> On Wed, Dec 5, 2018 at 1:57 PM Marek Vasut wrote:
On 12/05/2018 08:44 AM, masonccy...@mxic.com.tw wrote:
>> "Ma
Hi Marek,
On Wed, Dec 5, 2018 at 2:25 PM Marek Vasut wrote:
> On 12/05/2018 02:15 PM, Geert Uytterhoeven wrote:
> > On Wed, Dec 5, 2018 at 1:57 PM Marek Vasut wrote:
> >> On 12/05/2018 08:44 AM, masonccy...@mxic.com.tw wrote:
> "Marek Vasut"
> 2018/12/05 上午 10:04
> On 12/03/2018
On 12/05/2018 02:15 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi,
> On Wed, Dec 5, 2018 at 1:57 PM Marek Vasut wrote:
>> On 12/05/2018 08:44 AM, masonccy...@mxic.com.tw wrote:
"Marek Vasut"
2018/12/05 上午 10:04
On 12/03/2018 10:18 AM, Mason Yang wrote:
> Add a driver for Renes
Hi Marek,
On Wed, Dec 5, 2018 at 1:57 PM Marek Vasut wrote:
> On 12/05/2018 08:44 AM, masonccy...@mxic.com.tw wrote:
> >> "Marek Vasut"
> >> 2018/12/05 上午 10:04
> >> On 12/03/2018 10:18 AM, Mason Yang wrote:
> >> > Add a driver for Renesas R-Car Gen3 RPC SPI controller.
> >> >
> >> > Signed-off-
On 12/05/2018 09:39 AM, masonccy...@mxic.com.tw wrote:
> Hi Marek,
Hi,
>> "Marek Vasut"
>> 2018/12/05 上午 10:04
>>
>> To
>>
>> "Mason Yang" , broo...@kernel.org, linux-
>> ker...@vger.kernel.org, linux-...@vger.kernel.org,
>> boris.brezil...@bootlin.com, linux-renesas-soc@vger.kernel.org,
>> "Gee
On 12/05/2018 10:11 AM, Geert Uytterhoeven wrote:
> Hi Mason,
>
> On Wed, Dec 5, 2018 at 8:44 AM wrote:
>>> "Marek Vasut"
>>> 2018/12/05 上午 10:04
>>> On 12/03/2018 10:18 AM, Mason Yang wrote:
Add a driver for Renesas R-Car Gen3 RPC SPI controller.
Signed-off-by: Mason Yang
>
>>>
On 12/05/2018 08:44 AM, masonccy...@mxic.com.tw wrote:
> Hi Marek,
Hi,
> thanks for your review.
>
>> "Marek Vasut"
>> 2018/12/05 上午 10:04
>>
>> To
>>
>> "Mason Yang" , broo...@kernel.org, linux-
>> ker...@vger.kernel.org, linux-...@vger.kernel.org,
>> boris.brezil...@bootlin.com, linux-renesas
Assalamu alaikum,
I came across your e-mail contact prior a private search while in need
of a
trusted person. My name is Mrs. Aisha Gaddafi, a single Mother and a
Widow
with three Children. I am the only biological Daughter of late Libyan
President (Late Colonel Muammar Gaddafi)I have a busine
On 12/05/2018 06:21 AM, Laurent Pinchart wrote:
> Hi Marek,
>
> On Wednesday, 5 December 2018 01:48:01 EET Marek Vasut wrote:
>> On 12/04/2018 09:52 PM, Stephen Boyd wrote:
>>> Quoting Marek Vasut (2018-12-04 10:27:21)
>>>
diff --git a/drivers/clk/clk-versaclock5.c
b/drivers/clk/clk-vers
This patch series aims to add support for some more interfaces to
RZ/G1N SoC/iwg20d based board (Display and QSPI).
This patch series tested against renesas-dev.
V1--> V2
* Add SPI NOR support : Incorporated Geert's review comment.
* Add DU support : Removed LVDS definition from
The internal LVDS encoder now has DT bindings separate from the DU.
So remove it from du node.
Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Signed-off-by: Biju Das
---
V1-->V2
* Removed LVDS encoder definition from DU node.
---
arch/arm/boot/dts/r8a77
Add du node to r8a7744 SoC DT. Boards that want to enable the DU
need to specify the output topology.
Signed-off-by: Biju Das
---
V1-->V2
* Removed LVDS encoder definition from DU node.
---
arch/arm/boot/dts/r8a7744.dtsi | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
are SoC specific and should be part of board dts rather than SoM dtsi. By
moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
on both of these boards with less lines of code.
Signed-off-by: Biju Das
This patch fixes sorting of vsp and msiof nodes.
Signed-off-by: Biju Das
---
V1-->V2
* No change. It is a new patch.
---
arch/arm/boot/dts/r8a7744.dtsi | 150 -
1 file changed, 75 insertions(+), 75 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7744.dts
Add support for the SPI NOR device used to boot up the system
to the iWave RZ/G1N Qseven System On Module DT.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
---
V1-->V2
* Removed compatible string "sst,sst25vf016b".
---
arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 26 ++
Hi Mason,
On Wed, Dec 5, 2018 at 8:44 AM wrote:
> > "Marek Vasut"
> > 2018/12/05 上午 10:04
> > On 12/03/2018 10:18 AM, Mason Yang wrote:
> > > Add a driver for Renesas R-Car Gen3 RPC SPI controller.
> > >
> > > Signed-off-by: Mason Yang
> > > +static u8 rpc_bits_xfer(u32 nbytes)
> > > +{
> > >
Hi Mason,
On Mon, Dec 3, 2018 at 10:19 AM Mason Yang wrote:
> Add a driver for Renesas R-Car Gen3 RPC SPI controller.
>
> Signed-off-by: Mason Yang
Thanks for your patch!
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -528,6 +528,12 @@ config SPI_RSPI
> help
> S
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