Hi Sergei,
Thank you for the patch.
On Thursday, 7 June 2018 23:21:38 EEST Sergei Shtylyov wrote:
> Define the generic R8A77980 part of the DU device node.
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
Hi Sergei,
On Thursday, 7 June 2018 23:17:03 EEST Sergei Shtylyov wrote:
> Hello!
>
> Here's the set of 5 patches against Simon Horman's 'renesas.git' repo's
> 'renesas-devel-20180604-v4.17' tag. We're adding the R8A77980 FCPVD/VSPD/
> DU/LVDS device nodes and then describing the LVDS decoder
As per section 57A.3.5/69A.3.5/79.A.3.5 of rz/g/r-car gen2/3 hardware
manual,it is mentioned that we need to provide 2 cycles in counter input
clock (RCLK) for reflecting written data to counter behaviour. Adding
sufficient wait to let the CMCNT register value settle before starting the
timer
Hello!
On 06/08/2018 03:21 PM, Laurent Pinchart wrote:
> The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
> devices are mapped in the memory range usually used by the VSP LUT and
> CLU, which are not present in the VSPD. Fix this by shortening the VSPD
> registers range to
Hi Sergei,
(CC'ing Olof)
On Friday, 8 June 2018 19:41:01 EEST Sergei Shtylyov wrote:
> On 06/08/2018 03:21 PM, Laurent Pinchart wrote:
> > The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
> > devices are mapped in the memory range usually used by the VSP LUT and
> > CLU,
Hi Sergei,
Thank you for the patch.
On Thursday, 7 June 2018 23:19:31 EEST Sergei Shtylyov wrote:
> Describe FCPVD0 in the R8A77980 device tree; it will be used by VSPD0 in
> the next patch...
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
Hi Sergei,
Thank you for the patch.
On Thursday, 7 June 2018 23:23:06 EEST Sergei Shtylyov wrote:
> Define the generic R8A77980 part of the LVDS device node.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Laurent Pinchart
> ---
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 29
On Wed, Jun 06, 2018 at 11:04:00AM +0200, Simon Horman wrote:
> On Tue, Jun 05, 2018 at 07:20:34PM +0200, Geert Uytterhoeven wrote:
> > From: Takeshi Kihara
> >
> > Add a device node for the Watchdog Timer (WDT) controller on the
> > R8A77990 SoC, and enable the watchdog on the Ebisu board.
> >
On Thu, Jun 07, 2018 at 11:17:03PM +0300, Sergei Shtylyov wrote:
> Hello!
>
> Here's the set of 5 patches against Simon Horman's 'renesas.git' repo's
> 'renesas-devel-20180604-v4.17' tag. We're adding the R8A77980 FCPVD/VSPD/
> DU/LVDS device nodes and then describing the LVDS decoder and HDMI
Hi Geert,
On Friday, 8 June 2018 14:53:28 EEST Geert Uytterhoeven wrote:
> On Fri, Jun 8, 2018 at 1:18 PM Laurent Pinchart wrote:
> > The R8A77995 VSP and FCP nodes have overlapping register ranges, as the
> > SoC integrates the FCP devices in the memory range usually used by the
> > VSP LUT and
[CC Laurent, Geert]
On Thu, Jun 07, 2018 at 11:20:47PM +0300, Sergei Shtylyov wrote:
> Describe VSPD0 in the R8A77980 device tree; it will be used by DU in
> the next patch...
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by:
The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
devices are mapped in the memory range usually used by the VSP LUT and
CLU, which are not present in the VSPD. Fix this by shortening the VSPD
registers range to 0x5000.
Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add
Hello Simon,
On Friday, 8 June 2018 16:54:56 EEST Simon Horman wrote:
> [CC Laurent, Geert]
>
> On Thu, Jun 07, 2018 at 11:20:47PM +0300, Sergei Shtylyov wrote:
> > Describe VSPD0 in the R8A77980 device tree; it will be used by DU in
> > the next patch...
> >
> > Based on the original (and
On Mon, Jun 04, 2018 at 05:22:52PM +0300, Sergei Shtylyov wrote:
> On 06/04/2018 01:33 PM, Simon Horman wrote:
>
> >> Specify EtherAVB PHY IRQ in the Condor board's device tree, now that
> >> we have the GPIO support (previously phylib had to resort to polling).
> >>
> >> Based on the original
The R8A77970 VSP and FCP nodes have overlapping register ranges, as the
SoC integrates the FCP devices in the memory range usually used by the
VSP LUT and CLUT, which are not present. Fix this by shortening the VSP
registers range to 0x5000.
Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970:
The R8A77995 VSP and FCP nodes have overlapping register ranges, as the
SoC integrates the FCP devices in the memory range usually used by the
VSP LUT and CLUT, which are not present. Fix this by shortening the VSP
registers range to 0x5000.
Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995:
On Thu, Jun 07, 2018 at 04:33:07AM +, Yoshihiro Shimoda wrote:
> Hi Geert-san,
>
> > From: Behalf Of Geert Uytterhoeven, Sent: Wednesday, June 6, 2018 5:58 PM
> >
> > Hi Simon,
> >
> > On Wed, Jun 6, 2018 at 10:52 AM, Simon Horman wrote:
> > > On Tue, Jun 05, 2018 at 05:05:15PM +0200,
On Wed, Jun 06, 2018 at 06:52:06PM +0900, Yoshihiro Shimoda wrote:
> This patch adds USB2.0 PHY and Host(EHCI/OHCI) nodes and
> enables them for R-Car E3 Ebisu board.
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> This patch set is based on renesas-drivers.git /
> renesas-drivers-2018-06-05-v4.17
On Thu, Jun 07, 2018 at 11:19:31PM +0300, Sergei Shtylyov wrote:
> Describe FCPVD0 in the R8A77980 device tree; it will be used by VSPD0 in
> the next patch...
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
On Wed, Jun 06, 2018 at 11:07:27AM +0200, Geert Uytterhoeven wrote:
> On Fri, Jun 1, 2018 at 10:44 PM, Sergei Shtylyov
> wrote:
> > Describe all 6 GPIO controllers in the R8A77980 device tree.
> >
> > Based on the original (and large) patch by Vladimir Barinov.
> >
> > Signed-off-by: Vladimir
On Wed, Jun 06, 2018 at 11:25:16AM +0200, Geert Uytterhoeven wrote:
> If CONFIG_SMP=n, building a kernel for R-Car Gen2 fails with:
>
> arch/arm/mach-shmobile/setup-rcar-gen2.o: In function
> `rcar_gen2_timer_init':
> setup-rcar-gen2.c:(.init.text+0x30): undefined reference to
>
On 6/8/2018 11:21 AM, Simon Horman wrote:
Here's the set of 5 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20180604-v4.17' tag. We're adding the R8A77980 FCPVD/VSPD/
DU/LVDS device nodes and then describing the LVDS decoder and HDMI encoder
connected to the LVDS output.
Hi Laurent,
Thanks for your patch!
On Fri, Jun 8, 2018 at 1:18 PM Laurent Pinchart
wrote:
> The R8A77995 VSP and FCP nodes have overlapping register ranges, as the
> SoC integrates the FCP devices in the memory range usually used by the
> VSP LUT and CLUT, which are not present. Fix this by
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