On 06/01/2016 03:27 PM, Geert Uytterhoeven wrote:
--- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
+ ethernet@1800 {
+ compatible = "smsc,lan89218", "smsc,lan9115";
The "smsc,lan89218" needs to be documented
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- removed 'select I2C
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- resolved reject, indenting the IRQC node that is now under th
in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
---
Changes in version 2:
- added Simon's ACK.
arch/arm/boot/dts/r8a7792-blanche.dts | 23 ++-
1 file
Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- added Geert's tag.
drivers/soc/renesas/Makefile
Add macros usable by the device tree sources to reference R8A7792 SYSC power
domains by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- added Geert's tag.
include/dt-bi
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <h
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- resolved reject, indenting the device nodes that are now under the "soc"
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- resolved reject, in
Hello.
Here's the set of 2 patches is against the 'clk-next' branch of CLK group's
'linux.git' repo. They are extracted from the 13 patch series adding support
for Renesas R8A7792/Blanche board support -- looks like I had the patch
addressees wrong that time...
[1/2] clk: renesas: rcar-gen2:
Renesas R8A7792 SoC also has the CPG MSTP clocks...
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+rene...@glider.be>
Acked-by: Rob Herring <r...@kernel.org>
The initial R8A7792 SoC device tree including CPU core, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Changes in version 2:
- explicitly included the IRQ header;
- removed the CPU1 node;
- removed the
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Change
On 6/9/2016 11:44 AM, Geert Uytterhoeven wrote:
Add R8A7792 SMP support using the shared APMU code. This SoC has 2 ARM
Cortex-A15 CPU cores.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
[...]
# PM objects
Index: renesas/arch/arm/mach-shmobile/r8a
Hello.
Here's the set of 12 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160606-v4.7-rc2' tag. We add the device tree support for
the R8A7792-based Blanche board. Added in this version is the SMP support.
The R-Car 'clk' driver patch was posted separately and 2 'clk'
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <h
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Changes in version 2:
- removed the SDH, SD0, and SD1 clocks;
- added RCAN and ADSP clock indeces;
- fixed SYS-DMAC0/1 clock i
Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- added Geert's tag.
drivers/soc/renesas/Makefile
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Changes in version 3:
- moved the fixed factor clocks under the "soc" node;
- added ba
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- resolved reject, indenting the
Hello.
On 6/7/2016 6:39 AM, Magnus Damm wrote:
From: Magnus Damm
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBd per
Hello.
On 6/7/2016 3:37 AM, Simon Horman wrote:
Here's the set of 6 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160509-v4.6-rc7' tag. I'm adding the sound device tree support
for the R8A7794 SoC based SILK board.
[1/6] ARM: dts: r8a7794: add audio clocks
[2/6] ARM:
On 06/07/2016 10:13 AM, Geert Uytterhoeven wrote:
[...]
And that the system behaves sanely on suspend/resume.
I'd be thankful if you told me how to test that. :-)
System suspend:
echo mem > /sys/power/state
Oh. I know that one! :-)
System resume: You're gonna need a
Hello.
On 06/01/2016 01:18 AM, Sergei Shtylyov wrote:
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
[...]
Index: renesas/arch/arm/mach-shmobile/setup-r8a
On 06/04/2016 12:35 AM, Sergei Shtylyov wrote:
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.sh
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- resolved reject, indenting the
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 5:
- removed the RC
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <h
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Change
Hello.
Here's the set of 12 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160606-v4.7-rc2' tag. We add the device tree support for
the R8A7792-based Blanche board. The R-Car 'clk' driver patch was posted
separately and 2 'clk' binding patches were split from this
Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 5:
- refreshed the patch.
Changes in version 2:
- added
Add macros usable by the device tree sources to reference R8A7792 SYSC power
domains by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- added Geert's tag.
include/dt-bi
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- added Cogent Em
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- resolved rejec
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 5:
- removed the RCAN clock index.
Changes
Add R8A7792 SMP support using the shared APMU code. This SoC has 2 ARM
Cortex-A15 CPU cores.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Changes in version 3:
- new patch.
arch/arm/mach-shmobile/Makefile|1
arch/arm/mach-shmobile/r8a7792.h
in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- added Simon's ACK.
arch/arm/boot/dts/r8a7792-blanch
On 06/10/2016 04:02 AM, Simon Horman wrote:
[...]
And that the system behaves sanely on suspend/resume.
I'd be thankful if you told me how to test that. :-)
System suspend:
echo mem > /sys/power/state
Oh. I know that one! :-)
System resume: You're gonna need a "wakeup-source"
On 06/10/2016 11:42 PM, Geert Uytterhoeven wrote:
The only problem I'm seeing (again) is the RCAN clock failing to
register:
rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12)
I was going to look at it yesterday but (wrongly) thought it somehow
cured itself...
On 06/09/2016 01:05 PM, Geert Uytterhoeven wrote:
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Changes in version 3:
Thanks for the update!
--
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Changes in version 4:
- fixed the CP clock divisor;
- indented the P clock's "compatible"
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- resolved rejec
in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- added Simon's ACK.
arch/arm/boot/dts/r8a7792-blanch
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 4:
- added Geert's tag.
Changes in version
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- resolved reject, indenting the
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <h
Hello.
Here's the set of 12 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160606-v4.7-rc2' tag. We add the device tree support for
the R8A7792-based Blanche board. The R-Car 'clk' driver patch was posted
separately and 2 'clk' binding patches were split from this
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- added Cogent Em
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Add macros usable by the device tree sources to reference R8A7792 SYSC power
domains by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- added Geert's tag.
include/dt-bi
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Change
Hello.
On 6/3/2016 1:00 PM, Geert Uytterhoeven wrote:
Add support for indicating the availability of dedicated lines for
RTS/CTS hardware flow control, using the standard "uart-has-rtscts" DT
property.
Signed-off-by: Geert Uytterhoeven
---
v3:
- No changes,
v2:
Renesas R-Car V2H (R8A7792) clocks are handled by R-Car gen2 clock driver.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
The patch is against the 'clk-next' branch of CLK group's 'linux.git' repo.
drivers/clk/renesas/Kconfig |1 +
drivers/clk/renesas/Ma
Hello.
On 06/14/2016 03:43 AM, Simon Horman wrote:
[...]
And that the system behaves sanely on suspend/resume.
I'd be thankful if you told me how to test that. :-)
System suspend:
echo mem > /sys/power/state
Oh. I know that one! :-)
System resume: You're gonna need a
On 6/15/2016 5:30 AM, Simon Horman wrote:
Add R8A7792 SMP support using the shared APMU code. This SoC has 2 ARM
Cortex-A15 CPU cores.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
I apologise for not raising this earlier.
I would like you to remove SMP suppor
On 6/13/2016 10:12 AM, Geert Uytterhoeven wrote:
The only problem I'm seeing (again) is the RCAN clock failing to
register:
rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12)
I was going to look at it yesterday but (wrongly) thought it somehow
cured itself... I'll
Hello.
On 06/01/2016 03:57 AM, Simon Horman wrote:
The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
This is rather large for an initial DTSI. Did yo
On 06/01/2016 04:13 AM, Simon Horman wrote:
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
This looks correct to me.
I am wondering if you have been able to confirm DMA operation of the
devices enabled later on in the
in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- added Simon's ACK.
arch/arm/boot/dts/r8a7792-blanch
Add macros usable by the device tree sources to reference R8A7792 SYSC power
domains by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 2:
- added Geert's tag.
include/dt-bi
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- added Cogent Em
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- resolved rejec
azuya.mizuguchi...@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0...@gmail.com>
Acked-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
MBR, Sergei
ihiro Kaneko <ykaneko0...@gmail.com>
Acked-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
MBR, Sergei
Add macros usable by the device tree sources to reference R8A7792 SYSC power
domains by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
include/dt-bindings/power/r8a7792-sysc.h | 26 ++
1 file changed, 26 insertions(+)
Index: r
Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
drivers/soc/renesas/Makefile |1 +
drivers/soc/renesas/r8a7792-sysc.c | 34 ++
drivers/soc/renesa
Add minimal support for the R-Car V2H (R8A7792) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/mach-shmobile/Kconfig |5
arch/arm/mach-shmobile/Makefile|1
arch/arm/mach-shmobile/setup-r8a7792.c
Renesas R8A7792 SoC is a member of the R-Car gen2 family and so has CPG...
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt |
1 +
1 file changed, 1 insertion(+)
Index:
renesas/Documen
The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 423 +
1 file change
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 60 +
1 file changed, 60 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a779
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 90 +
1 file changed, 90 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a779
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 13 +
1 file changed, 13 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a779
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
Documentation/devicetree/bindings/arm/shmobile.txt
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/Ma
in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792-blanche.dts | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
Index: renesas/arch/arm/boot/dts/r8a7792-blanc
Hello.
On 6/1/2016 10:04 AM, Geert Uytterhoeven wrote:
Here's the set of 13 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160530-v4.7-rc1' tag. We add the device tree support for
the R8A7792-based Blanche board. The R-Car 'clk' driver patch was posted last
week
Hello.
On 6/1/2016 11:22 AM, Geert Uytterhoeven wrote:
--- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
+ ethernet@1800 {
+ compatible = "smsc,lan89218", "smsc,lan9115";
The "smsc,lan89218" needs to be
Hello.
On 06/01/2016 02:51 AM, Simon Horman wrote:
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
I
On 06/01/2016 04:18 AM, Simon Horman wrote:
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi | 13 +
1 file changed, 13 insertions(+)
Index: renesa
On 06/01/2016 03:52 AM, Simon Horman wrote:
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
include/dt-bindings/clock/r8a7792-clock.h | 104 ++
On 06/01/2016 03:57 AM, Simon Horman wrote:
The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
This is rather large for an initial DTSI. Did you gi
On 06/01/2016 10:22 AM, Geert Uytterhoeven wrote:
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
include/dt-bindings/clock/r8a7792-clock.h | 104 +++
On 6/22/2016 10:20 AM, Geert Uytterhoeven wrote:
Add the device tree node for the Advanced Power Management Unit (APMU).
Use the "enable-method" prop to point out that the APMU should be used
for the SMP support.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.co
Add JPU clock and its parent, M2 clock to the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi| 16
include/dt-bindings/clock/r8a7792-clock.h |1 +
2 files changed, 17 inse
Describe JPEG Processing Unit (JPU) in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7792.dtsi |9 +
1 file changed, 9 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a779
3-v4.7-rc3 with "ARM: shmobile: rcar-gen2:
Obtain extal frequency from DT" applied.
Untested due to lack of hardware.
Sergei, could you test this?
Done, now 'sleep 5' takes 5 seconds indeed. :-)
Tested-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
MBR, Sergei
Hello.
On 04/13/2016 10:36 PM, Sergei Shtylyov wrote:
Add the (previously omitted) DU pin data to the SILK board's device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
This patch is against the 'renesas-devel-20160411-v4.6-rc3' tag of Simon
Ho
On 6/23/2016 1:33 AM, Simon Horman wrote:
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
include/dt-bindings/clock/r8a7792-clock.h | 104 ++
some for the linux-sh list to refocus on
discussion of the work on the SH architecture.
Cc: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Cc: Geert Uytterhoeven <geert+rene...@glider.be>
Cc: Magnus Damm <magnus.d
Hello.
On 06/24/2016 10:44 AM, Geert Uytterhoeven wrote:
From: Magnus Damm
Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to
-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
arch/arm/boot/dts/r8a7794.dtsi | 171
+
Converter Unit (SCU), Serial Sound Interface [Unit]
(SSI[U]), and Audio DMAC-Peripheral-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
(snip)
+ clocks = <_clks R8A7794_CLK_SSI_ALL>,
+
When adding support for the R-Car gen3 gPTP active in configuration mode,
some call sites of ravb_ptp_{init|stop}() were missed due to an oversight.
Add checks for the R-Car gen2 SoCs around these...
Fixes: f5d7837f96e5 ("ravb: ptp: Add CONFIG mode support")
Signed-off-by: Serge
: f5d7837f96e5 ("ravb: ptp: Add CONFIG mode support")
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
drivers/net/ethernet/renesas/ravb_main.c |4
1 file changed, 4 deletions(-)
Index: net/drivers/net/ethernet/ren
-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
(snip)
+ clocks = <_clks R8A7794_CLK_SSI_ALL>,
+
]), and Audio DMAC-Peripheral-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
(snip)
+ rcar_sound,src {
+
]), and Audio DMAC-Peripheral-Peripheral.
It is up to the board file to enable the device.
This patch is based on the R8A7791 sound work by Kuninori Morimoto.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
(snip)
+ rcar_sound,src {
+
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