This patch adds new s3c24xx_serial_drv_data structure for Exynos5433 SoC
because Exynos5433 has different fifo size from existing Exynos4 SoC.
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Jiri Slaby jsl...@suse.cz
Cc: linux-ser...@vger.kernel.org
Signed-off-by: Chanwoo Choi cw00.c
This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains
the clocks for GPU(3D Graphics Engine).
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked
: Olof Johansson o...@lixom.net
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which
contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
This patch adds the divider/gate of CMU_GSCL domain which contains gscaler
clocks.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik
Rutland mark.rutl...@arm.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Olof Johansson o...@lixom.net
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik
need the source clock of 'sclk_hdmi_spdif_disp'
from CMU_TOP domain. This patch adds the clocks of CMU_TOP related to HDMI.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
. [PATCH] mmc: dw_mmc: exynos: Add support for exynos7
- [4] http://www.spinics.net/lists/linux-mmc/msg28294.html
5. [PATCH] dmaengine: pl330: Correct device assignment
- [5] https://lkml.org/lkml/2014/11/6/207
Chanwoo Choi (18):
pinctrl: exynos: Add support for Exynos5433
clk: samsung: Add
This patch adds missing gate clocks of CMU_PERIS domain
which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs.
The special clocks of CMU_PERIS use fin_pll source clock directly.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c
...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
drivers/clk/samsung/clk-exynos5433.c | 590 +
include/dt-bindings/clock/exynos5433.h | 190 ++-
2 files
and used for regiser accesses.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
.../devicetree/bindings/clock/exynos5433
This patch add binding documentation for Exynos5433 clock controller.
Exynos5433 has various clock domains So, this documentation explains
the detailed clock domains ans usage guide.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi
Walleij linus.wall...@linaro.org
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
Acked-by: Inki Dae inki@samsung.com
---
drivers/pinctrl/samsung/pinctrl-exynos.c | 163 ++
drivers/pinctrl/samsung/pinctrl-samsung.c | 2
This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433.
CMU_TOP domain provides source clocks to other CMU domains.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki
catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 698 +
arch/arm64/boot/dts
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
drivers/clk/samsung/Makefile | 1 +
drivers/clk/samsung/clk-exynos5433.c | 971 +
include/dt-bindings/clock/exynos5433
patches by Chanwoo Choi with following patch[1]
[1] http://www.spinics.net/lists/arm-kernel/msg368443.html
Changes from v1:
- Fix minor issue
Chanwoo Choi (2):
ARM: exynos: Add Exynos-based boards compatible string and description
ARM: dts: Remove unused command line from Exynos3250-based
This patch removes unused dt node of command line from Exynos3250-based
Rinato board because kernel use the command line from bootloader.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos3250-rinato.dts | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm
, fuel-gauge, charger)
- RTC of Exynos3250
- ADC of Exynos3250 with NTC thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Youngjun Cho yj44@samsung.com
Signed-off-by: Chanwoo
This patch adds the missing compatible/description of Exynos-based boards
to remove following build warning.
WARNING: DT compatible string samsung,... appears un-documented --
check ./Documentation/devicetree/bindings/
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
{
+ compatible = regulator-haptic;
+ haptic-supply = motor_reg;
+ min-microvolt = 110;
+ max-microvolt = 270;
+ };
};
adc {
Looks good to me.
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
--
To unsubscribe from
@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Looks good to me.
I tested this patch on Exynos3250-based Rinato (Samsung Gear2) board.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
---
.../devicetree/bindings/input
Dear Kukjin,
Could you please review or pick this patchset?
Best Regards,
Chanwoo Choi
On 10/08/2014 11:11 AM, YoungJun Cho wrote:
From: Youngjun Cho yj44@samsung.com
This patch adds new board dts file to support Samsung Monk board which is
based on Exynos3250 SoC and has different H/W
/Exynos4's PL330 DMA simply.
Chanwoo Choi (2):
ARM: dts: Fix the number of DMA channels for Exynos3250
ARM: dts: Fix the number of DMA channels for Exynos4
arch/arm/boot/dts/exynos3250.dtsi | 4 ++--
arch/arm/boot/dts/exynos4.dtsi| 4 ++--
2 files changed, 4 insertions(+), 4 deletions
This patch fix the numer for DMA channels for Exynos3250 because DMA controller
of Exynos3250 can support 16 channels simultaneously.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
This patch fix the numer for DMA channels for Exynos4210/Exynos4212/Exynos4412
because DMA controller of Exynos4 series can support 16 channels simultaneously.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2
This patch fix the numer for DMA channels for Exynos4210/Exynos4212/Exynos4412
/Exynos4415 because DMA controller of Exynos4 series can support 16 channels
simultaneously.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi| 4 ++--
arch/arm/boot/dts
/Exynos4's PL330 DMA simply.
Changes from v1:
- Fix the nubmer for DMA channesl for Exynos4415
Chanwoo Choi (2):
ARM: dts: Fix the number of DMA channels for Exynos3250
ARM: dts: Fix the number of DMA channels for Exynos4
arch/arm/boot/dts/exynos3250.dtsi | 4 ++--
arch/arm/boot/dts/exynos4.dtsi
This patch fix the numer for DMA channels for Exynos3250 because DMA controller
of Exynos3250 can support 16 channels simultaneously.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Dear Kukjin,
Please ignore this patchset because this patchset are wrong.
Best Regards,
Chanwoo Choi
On 11/12/2014 11:50 AM, Chanwoo Choi wrote:
This patch fix minor issuse to correct the number of DMA channels for
Exynos3250 and Exynos4 series. The PL330 DMA of Exynos3250/Exynos4 support
16
Dear Kukjin,
On 11/08/2014 07:16 PM, Kukjin Kim wrote:
Krzysztof Kozlowski wrote:
On pią, 2014-11-07 at 20:50 +0900, Chanwoo Choi wrote:
Hi Krzysztof,
On 11/07/2014 08:44 PM, Krzysztof Kozlowski wrote:
The bootloader on market Rinato (Gear 2) device checks for revision in
compatible field
= samsung,rinato, samsung,rinato-rev06,
+ samsung,exynos3250, samsung,exynos3;
I think it is wrong. The released bootloader from Samsung is not u-boot.
Instead, you have to update u-boot to support Exynos3250-basd Rinato board.
Thanks,
Chanwoo Choi
--
To unsubscribe from this list
Dear Linus,
Could you please review this patch?
Best Regards,
Chanwoo Choi
On 10/27/2014 10:21 AM, Chanwoo Choi wrote:
From: Tomasz Figa tomasz.f...@gmail.com
The pin controllers of Exynos4415 are similar to Exynos4412, but certain
differences cause the need to create separate driver data
Dear Kukjin,
On 10/28/2014 07:50 PM, Kukjin Kim wrote:
Chanwoo Choi wrote:
Hi,
This patch adds new exynos4415.dtsi to support Exynos4415 SoC
based on Cortex-A9 quad cores and includes following dt nodes:
- GIC interrupt controller (GIC-400)
- Pinctrl to control three GPIO parts
- CMU
/2014/10/26/160
Chanwoo Choi (2):
ARM: EXYNOS: Add EXYNOS4415 SoC
ARM: dts: Add dts files for Exynos4415 SoC
arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 573
arch/arm/boot/dts/exynos4415.dtsi | 604 ++
arch/arm/mach-exynos
This patch add Exynos4415's SoC. Exynos4415 is based on the 32-bit RISC
processor for Smartphone. Exynos4415 uses Cortex A9 quad-cores and has a target
speed of 1.6GHz and provides 8.5GB/s memory bandwidth.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
-li...@fluff.org
Cc: Russell King li...@arm.linux.org.uk
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
[m.szyprowski: Add OHCI node
On 10/27/2014 07:39 PM, Sylwester Nawrocki wrote:
On 27/10/14 02:11, Chanwoo Choi wrote:
Chanwoo Choi (2):
clk: samsung: exynos4415: Add clocks using common clock framework
clk: samsung: Document binding for Exynos4415 clock controller
Added both to my tree, thanks. In future please put
Dear Kukjin,
Did you please pick up this patchset on 3.19 queue?
Best Regards,
Chanwoo Choi
On 10/24/2014 10:12 PM, Chanwoo Choi wrote:
This patchset adds new board dts file for Samsung Rinato board (Gear 2) which
is based on Exynos3250 SoC and adds sleep mode pin configuration using pinctrl
Dear Kukjin,
On 10/28/2014 09:19 AM, Kukjin Kim wrote:
Chanwoo Choi wrote:
Dear Kukjin,
Hi,
Did you please pick up this patchset on 3.19 queue?
I'll apply this series once my previous pull-request which has been sent out
last week is merged into arm-soc tree.
If any comments
Dear Kukjin,
On 10/28/2014 12:48 PM, Kukjin Kim wrote:
Chanwoo Choi wrote:
This patch add Exynos4415's SoC ID.
Since the CPU ID has been removed as per comments, need to update the commit
message accordingly.
OK, I'll update it.
Exynos4415 is based on the 32-bit RISC
processor
clock
framework
: https://lkml.org/lkml/2014/10/26/159
[3] [PATCHv2] pinctrl: exynos: Add support for Exynos4415
: https://lkml.org/lkml/2014/10/26/160
Chanwoo Choi (2):
ARM: EXYNOS: Add EXYNOS4415 SoC
ARM: dts: Add dts files for Exynos4415 SoC
arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 613
This patch add Exynos4415's SoC. Exynos4415 is based on the 32-bit RISC
processor for Smartphone. Exynos4415 uses Cortex A9 quad-cores and has a target
speed of 1.6GHz and provides 8.5GB/s memory bandwidth.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
-li...@fluff.org
Cc: Russell King li...@arm.linux.org.uk
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
[m.szyprowski: Add OHCI node
Exynos4415 SoC based on Cortex-A9 quad cores
: https://lkml.org/lkml/2014/10/19/253
- Fix string issue on documentation file of Exynos4415 clock controller
Chanwoo Choi (2):
clk: samsung: exynos4415: Add clocks using common clock framework
clk: samsung: Document binding for Exynos4415 clock
...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro
This patch adds DT binding documentation for Exynos4415 SoC system
clock controllers.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Sylwester
tomasz.f...@gmail.com
Cc: Thomas Abraham thomas.abra...@linaro.org
Cc: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
[cw00.choi: Rebase it on mainline kernel]
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
This patch add Exynos4415's SoC ID. Exynos4415 is based on the 32-bit RISC
processor for Smartphone. Exynos4415 uses Cortex A9 quad-cores and has a target
speed of 1.6GHz and provides 8.5GB/s memory bandwidth.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
-li...@fluff.org
Cc: Russell King li...@arm.linux.org.uk
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
[m.szyprowski: Add OHCI node
/10/26/159
[3] [PATCHv2] pinctrl: exynos: Add support for Exynos4415
: https://lkml.org/lkml/2014/10/26/160
Chanwoo Choi (2):
ARM: EXYNOS: Add EXYNOS4415 SoC ID
ARM: dts: Add dts files for Exynos4415 SoC
arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 613 +
arch
Hi Sylwester,
On 10/24/2014 07:32 PM, Sylwester Nawrocki wrote:
On 20/10/14 05:32, Chanwoo Choi wrote:
The Exynos4415 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree based
clock lookup and clkdev based clock lookups
On 10/24/2014 07:54 PM, Sylwester Nawrocki wrote:
On 20/10/14 05:32, Chanwoo Choi wrote:
This patch adds the new clock driver of Exynos4415 SoC based on Cortex-A9
using common clock framework. The CMU (Clock Management Unit) of Exynos4415
controls PLLs(Phase Locked Loops) and generates system
file of Exynos4415 clock controller
Chanwoo Choi (2):
clk: samsung: exynos4415: Add clocks using common clock framework
clk: samsung: Document binding for Exynos4415 clock controller
.../devicetree/bindings/clock/exynos4415-clock.txt | 38 +
drivers/clk/samsung/Makefile
...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clk/samsung/Makefile
This patch adds DT binding documentation for Exynos4415 SoC system
clock controllers.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree
thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- MFC of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Seung-Woo Kim
or would be not controlled by DRM driver, happen imprecise
external abort.
Changes from v1:
- Remove useless brace
- Remove unneeded 'regulators' keyword
- Consolidate memory information in one entry
Chanwoo Choi (3):
ARM: dts: Add board dts file for Exynos3250-based Rinato board
ARM: dts: Add sleep
This patch add sleep mode pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pin in sleep state.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park Kyungmin p...@samsung.com
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 16
arch
This patch add sleep mode of regulator for exynos3250-rinato board to optimize
power-consumption in sleep state.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Mark Brown broo...@kernel.org
---
arch/arm/boot/dts/exynos3250
Hi Tomasz,
On 10/24/2014 08:43 PM, Tomasz Figa wrote:
Hi Chanwoo,
On 20.10.2014 05:32, Chanwoo Choi wrote:
This patch add Exynos4415's SoC ID. Exynos4415 is based on the 32-bit RISC
processor for Smartphone. Exynos4415 uses Cortex A9 quad-cores and has a
target
speed of 1.6GHz
Hi Tomasz,
On 10/24/2014 08:48 PM, Tomasz Figa wrote:
Hi Chanwoo,
On 24.10.2014 13:39, Chanwoo Choi wrote:
This patch add sleep mode pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pin in sleep state.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Hi Krzysztof,
On 10/24/2014 08:57 PM, Krzysztof Kozłowski wrote:
On 24.10.2014 13:39, Chanwoo Choi wrote:
This patch add support for device tree sources for Samsung Rinato baord
(Gear 2) based on Exynos3250 SoC.
This dts file support following features:
- eMMC
- Main PMIC (Samsung S2MPS14
Hi Sylwester,
On 10/24/2014 09:03 PM, Sylwester Nawrocki wrote:
On 24/10/14 13:07, Chanwoo Choi wrote:
This patch adds the new clock driver of Exynos4415 SoC based on Cortex-A9
using common clock framework. The CMU (Clock Management Unit) of Exynos4415
controls PLLs(Phase Locked Loops
in one entry
Chanwoo Choi (3):
ARM: dts: Add board dts file for Exynos3250-based Rinato board
ARM: dts: Add sleep mode pin configuration for exynos3250-rinato
ARM: dts: Add sleep mode of regulator for exynos3250-rinato board
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot
This patch add sleep mode pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pin in sleep state.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 16
arch
This patch add sleep mode of regulator for exynos3250-rinato board to optimize
power-consumption in sleep state.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Mark Brown broo...@kernel.org
---
arch/arm/boot/dts/exynos3250
thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- MFC of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Seung-Woo Kim
Hi Daniel,
On 10/24/2014 10:18 PM, Daniel Drake wrote:
On Sun, Oct 19, 2014 at 9:32 PM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch adds the new clock driver of Exynos4415 SoC based on Cortex-A9
using common clock framework. The CMU (Clock Management Unit) of Exynos4415
controls PLLs
Hi Daniel,
On 10/24/2014 10:23 PM, Daniel Drake wrote:
On Sun, Oct 19, 2014 at 9:32 PM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch adds new exynos4415.dtsi to support Exynos4415 SoC
based on Cortex-A9 quad cores and includes following dt nodes:
There's a lot in common between your
Hi Sylwester,
On 10/24/2014 09:03 PM, Sylwester Nawrocki wrote:
On 24/10/14 13:07, Chanwoo Choi wrote:
This patch adds the new clock driver of Exynos4415 SoC based on Cortex-A9
using common clock framework. The CMU (Clock Management Unit) of Exynos4415
controls PLLs(Phase Locked Loops
{
+ regulator-off-in-suspend;
+ };
};
};
};
Thanks,
Chanwoo Choi
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/exynos4412-trats2.dts | 72
+++--
1 file changed, 42 insertions(+), 30 deletions(-)
Looks good to me.
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2
for exynos platforms
- http://www.spinics.net/lists/arm-kernel/msg364790.html
- Modify clk-cpu.c to support Exynos3250
- Drop documentation patch on previous patchset[2]
[2] http://www.spinics.net/lists/cpufreq/msg10265.html
- Add only operating-points for Exynos3250 without armclk-divider-table
Chanwoo
This patch update clock flags related to CPU with read only flag
to use cpu-clock type.
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clk/samsung
This patch add CPU operating points which include CPU frequency and regulator
voltage to use generic cpufreq drivers.
Cc: Kukjin Kim kgene@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
This patch add exynos3250 compatible string to exynos_cpufreq_matches
for supporting generic cpufreq driver on Exynos3250.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/exynos.c
;
- }
-
return 0;
}
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
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This patch add Exynos4415's SoC ID. Exynos4415 is based on the 32-bit RISC
processor for Smartphone. Exynos4415 uses Cortex A9 quad-cores and has a target
speed of 1.6GHz and provides 8.5GB/s memory bandwidth.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
-li...@fluff.org
Cc: Russell King li...@arm.linux.org.uk
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
[m.szyprowski: Add OHCI node
...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clk/samsung/Makefile
-clock.patch
Best Regards,
Chanwoo Choi
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index a6b1252..84f3cbd 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -535,13 +535,14 @@ static int s3c_rtc_probe(struct platform_device *pdev)
}
clk_prepare_enable
Dear Kukjin,
Could you please review this patchset?
Best Regards,
Chanwoo Choi
On 10/08/2014 07:45 AM, Chanwoo Choi wrote:
This patchset adds new board dts file for Samsung Rinato board (Gear 2) which
is based on Exynos3250 SoC and adds sleep mode pin configuration using pinctrl
subsystem
)
static const struct of_device_id exynos_tmu_match[] = {
{
- .compatible = samsung,exynos3250-tmu,
- },
- {
If you want to remove compatible string for Exynos3250,
you have to modify it on exynos3250.dtsi.
Thanks,
Chanwoo Choi
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v1:
- Remove useless brace
- Remove unneeded 'regulators' keyword
- Consolidate memory information in one entry
Chanwoo Choi (2):
ARM: dts: Add board dts file for Exynos3250-based Rinato board
ARM: dts: Add sleep mode pin configuration for exynos3250-rinato
arch/arm/boot/dts/Makefile
This patch add sleep mode pin configuration using pinctrl subsystem
to reduce leakage power-consumption of gpio pin in sleep state.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park Kyungmin p...@samsung.com
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 16
arch
thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- MFC of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Seung-Woo Kim
This patchset adds new board dts file for Samsung Rinato board (Gear 2) which
is based on Exynos3250 SoC and adds sleep mode pin configuration using pinctrl
subsystem to reduce leakage power-consumption in sleep state.
This patchset is based on linux-samsung.git (for-next branch).
Chanwoo Choi
thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- MFC of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Seung-Woo Kim
On 09/29/2014 06:58 PM, Viresh Kumar wrote:
On 25 September 2014 00:05, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch add exynos3250 compatible string to exynos_cpufreq_matches
for supporting generic cpufreq driver on Exynos3250.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked
...@samsung.com
---
drivers/clk/samsung/clk-exynos3250.c | 11 +++
include/dt-bindings/clock/exynos3250.h | 10 +-
2 files changed, 20 insertions(+), 1 deletion(-)
Exynos3250 has only two UART(0,1) port. Exynos3250 don't support UART 2,3.
Thanks,
Chanwoo Choi
diff
/msg10265.html
- Add only operating-points for Exynos3250 without armclk-divider-table
Chanwoo Choi (4):
clk: samsung: exynos3250: Add cpu clock configuration data and instaniate cpu
clock
clk: samsung: exynos3250: Update clock flags related to CPU to use cpu-clock
type
ARM: exynos: Add
This patch add CPU clock configuration data and instantiate the CPU clock type
for Exynos3250 to support Samsung specific cpu-clock type.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Thomas Abraham
This patch add exynos3250 compatible string to exynos_cpufreq_matches
for supporting generic cpufreq driver on Exynos3250.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Kukjin Kim kgene@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
This patch update clock flags related to CPU with read only flag
to use cpu-clock type.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Kukjin Kim kgene
This patch add CPU operating points which include CPU frequency and regulator
voltage to use generic cpufreq drivers.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Cc: Tomasz Figa tomasz.f
= rtc, rtc_src;
};
spi_2 {
I'm so sorry for delay reply because I'm out of office for vacation (9/5 ~
9/20).
Looks goot to me for this patch.
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
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@@
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 378000;
- max77686@09 {
+ max77686: max77686@09 {
compatible = maxim,max77686;
interrupt-parent = gpx3;
interrupts = 2 0;
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Hi Paul,
On 09/12/2014 05:41 PM, Paul Bolle wrote:
On Fri, 2014-09-05 at 13:30 +0900, Chanwoo Choi wrote:
This patch add exynos-ppmu devfreq event driver to provider raw data about
the utilization of each IP in Exynos SoC series.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked
This patch add dt node for PPMU_CPU/DMC0/DMC1 for exynos4412-trats2 board.
Each PPMU dt node includes one event of 'PPMU Count 3'
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4412-trats2.dts | 29
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