Re: [PATCH] gpio: samsung: Update documentation
On Sun, Sep 2, 2012 at 6:24 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: Update Samsung GPIO API documentation to reflect removal of the s3c24xx specific gpio API. While at it, fix some typos. The notes on conversion from s3c2410_* functions to the gpiolib API are left here just in case there is any out of tree code that still needs to be converted. Signed-off-by: Sylwester Nawrocki sylvester.nawro...@gmail.com Acked-by: Linus Walleij linus.wall...@linaro.org Get the Samsung maintainers to apply this patch since they carry the API changes. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] gpio: samsung: Update documentation
On 09/04/2012 09:27 AM, Linus Walleij wrote: On Sun, Sep 2, 2012 at 6:24 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: Update Samsung GPIO API documentation to reflect removal of the s3c24xx specific gpio API. While at it, fix some typos. The notes on conversion from s3c2410_* functions to the gpiolib API are left here just in case there is any out of tree code that still needs to be converted. Signed-off-by: Sylwester Nawrocki sylvester.nawro...@gmail.com Acked-by: Linus Walleij linus.wall...@linaro.org Get the Samsung maintainers to apply this patch since they carry the API changes. Thanks Linus. Kgene, this is the documentation update we talked about previously. Can you please pick this patch as well ? -- Regards, Sylwester -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/5] ARM: EXYNOS: Add support for Trats board using device tree
This patch series adds basic device tree support for Samsung Trats board along with any necessary prerequisites. In addition it refactors Exynos4 dts include files to split parts common to the whole Exynos4 part from parts specific to Exynos4210 to allow further extension of Exynos4210 dts include file and addition of include files for other SoCs from Exynos4 line. Changes since v1: - Split into two series, general Exynos4 DT reorganization and this one. - Addressed comments from v1. Dependencies: - [PATCH v5] mmc: sdhci-s3c: Add device tree support http://www.spinics.net/lists/linux-samsung-soc/msg12056.html - [PATCH v5 2/2] regulator: add device tree support for max8997 http://www.spinics.net/lists/kernel/msg1328117.html - [PATCH 0/3] ARM: dts: Exynos4 dts reorganization http://www.spinics.net/lists/arm-kernel/msg192237.html Tomasz Figa (5): mmc: host: sdhci-s3c: Add broken-voltage DT property for broken voltage quirk ARM: Exynos4: dts: Specify address and size cells for i2c controllers ARM: Exynos4: Add OF compatibility lookups for Exynos4 i2c adapters ARM: EXYNOS: Increase maximum possible memory bank size to 512MiB ARM: Exynos: Add basic dts file for Samsung Trats board Documentation/devicetree/bindings/mmc/mmc.txt | 1 + arch/arm/boot/dts/exynos4.dtsi| 16 ++ arch/arm/boot/dts/exynos4210-trats.dts| 237 ++ arch/arm/mach-exynos/Makefile.boot| 2 +- arch/arm/mach-exynos/include/mach/memory.h| 4 +- arch/arm/mach-exynos/mach-exynos4-dt.c| 14 ++ drivers/mmc/host/sdhci-s3c.c | 3 + 7 files changed, 274 insertions(+), 3 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4210-trats.dts -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/5] mmc: host: sdhci-s3c: Add broken-voltage DT property for broken voltage quirk
Some boards use fixed voltage regulator for vmmc supply (e.g. for eMMC
memories). MMC_CAP2_BROKEN_VOLTAGE must be enabled for them to operate
correctly.
Cc: Ben Dooks ben-li...@fluff.org
Cc: Chris Ball c...@laptop.org
CC: linux-...@vger.kernel.org
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Documentation/devicetree/bindings/mmc/mmc.txt | 1 +
drivers/mmc/host/sdhci-s3c.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt
b/Documentation/devicetree/bindings/mmc/mmc.txt
index 8a6811f..ecbde68 100644
--- a/Documentation/devicetree/bindings/mmc/mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc.txt
@@ -16,6 +16,7 @@ Optional properties:
- wp-inverted: when present, polarity on the wp gpio line is inverted
- non-removable: non-removable slot (like eMMC)
- max-frequency: maximum operating clock frequency
+- broken-voltage: vmmc regulator does not allow voltage control
Example:
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 445910e..39715b8 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -443,6 +443,9 @@ static int __devinit sdhci_s3c_parse_dt(struct device *dev,
if (!ourhost-gpios)
return -ENOMEM;
+ if (of_get_property(node, broken-voltage, 0))
+ pdata-host_caps2 |= MMC_CAP2_BROKEN_VOLTAGE;
+
/* get the card detection method */
if (of_get_property(node, broken-cd, 0)) {
pdata-cd_type = S3C_SDHCI_CD_NONE;
--
1.7.12
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[PATCH v2 2/5] ARM: Exynos4: dts: Specify address and size cells for i2c controllers
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 9b71b61..718e3d2 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -122,6 +122,8 @@
};
i2c@1386 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1386 0x100;
interrupts = 0 58 0;
@@ -129,6 +131,8 @@
};
i2c@1387 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1387 0x100;
interrupts = 0 59 0;
@@ -136,6 +140,8 @@
};
i2c@1388 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1388 0x100;
interrupts = 0 60 0;
@@ -143,6 +149,8 @@
};
i2c@1389 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1389 0x100;
interrupts = 0 61 0;
@@ -150,6 +158,8 @@
};
i2c@138A {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138A 0x100;
interrupts = 0 62 0;
@@ -157,6 +167,8 @@
};
i2c@138B {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138B 0x100;
interrupts = 0 63 0;
@@ -164,6 +176,8 @@
};
i2c@138C {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138C 0x100;
interrupts = 0 64 0;
@@ -171,6 +185,8 @@
};
i2c@138D {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138D 0x100;
interrupts = 0 65 0;
--
1.7.12
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[PATCH v2 3/5] ARM: Exynos4: Add OF compatibility lookups for Exynos4 i2c adapters
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/mach-exynos4-dt.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index 8dad4ec..5f805b4 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -55,6 +55,20 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[]
__initconst = {
exynos4-sdhci.3, NULL),
OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(0),
s3c2440-i2c.0, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(1),
+ s3c2440-i2c.1, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(2),
+ s3c2440-i2c.2, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(3),
+ s3c2440-i2c.3, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(4),
+ s3c2440-i2c.4, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(5),
+ s3c2440-i2c.5, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(6),
+ s3c2440-i2c.6, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(7),
+ s3c2440-i2c.7, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-spi, EXYNOS4_PA_SPI0,
exynos4210-spi.0, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-spi, EXYNOS4_PA_SPI1,
--
1.7.12
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[PATCH v2 4/5] ARM: EXYNOS: Increase maximum possible memory bank size to 512MiB
Some boards have larger memory banks than 256MiB. This patch increses maximum bank size for Exynos-based boards to 512MiB. Signed-off-by: Tomasz Figa t.f...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- arch/arm/mach-exynos/include/mach/memory.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h index 374ef2c..d4db508 100644 --- a/arch/arm/mach-exynos/include/mach/memory.h +++ b/arch/arm/mach-exynos/include/mach/memory.h @@ -15,8 +15,8 @@ #define PLAT_PHYS_OFFSET UL(0x4000) -/* Maximum of 256MiB in one bank */ +/* Maximum of 512MiB in one bank */ #define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS 28 +#define SECTION_SIZE_BITS 29 #endif /* __ASM_ARCH_MEMORY_H */ -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 5/5] ARM: Exynos: Add basic dts file for Samsung Trats board
This commit adds basic device tree for Exynos4210-based Trats board.
Currently it provides support for eMMC over sdhci and MAX8997 PMIC.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4210-trats.dts | 237 +
arch/arm/mach-exynos/Makefile.boot | 2 +-
2 files changed, 238 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/exynos4210-trats.dts
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
new file mode 100644
index 000..73567b8
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -0,0 +1,237 @@
+/*
+ * Samsung's Exynos4210 based Trats board device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Device tree source file for Samsung's Trats board which is based on
+ * Samsung's Exynos4210 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ exynos4210.dtsi
+
+/ {
+ model = Samsung Trats based on Exynos4210;
+ compatible = samsung,trats, samsung,exynos4210;
+
+ memory {
+ reg = 0x4000 0x2000
+ 0x6000 0x2000;
+ };
+
+ chosen {
+ bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5
rootwait earlyprintk panic=5;
+ };
+
+ vemmc_reg: voltage-regulator@0 {
+ compatible = regulator-fixed;
+ regulator-name = VMEM_VDD_2.8V;
+ regulator-min-microvolt = 280;
+ regulator-max-microvolt = 280;
+ gpio = gpk0 2 1 0 0;
+ enable-active-high;
+ };
+
+ sdhci_emmc: sdhci@1251 {
+ bus-width = 8;
+ non-removable;
+ broken-voltage;
+ gpios = gpk0 0 2 0 3,
+ gpk0 1 2 0 3,
+ gpk0 3 2 2 3,
+ gpk0 4 2 2 3,
+ gpk0 5 2 2 3,
+ gpk0 6 2 2 3,
+ gpk1 3 3 3 3,
+ gpk1 4 3 3 3,
+ gpk1 5 3 3 3,
+ gpk1 6 3 3 3;
+ vmmc-supply = vemmc_reg;
+ status = okay;
+ };
+
+ serial@1380 {
+ status = okay;
+ };
+
+ serial@1381 {
+ status = okay;
+ };
+
+ serial@1382 {
+ status = okay;
+ };
+
+ serial@1383 {
+ status = okay;
+ };
+
+ i2c@138B {
+ samsung,i2c-sda-delay = 100;
+ samsung,i2c-slave-addr = 0x10;
+ samsung,i2c-max-bus-freq = 10;
+ gpios = gpb 6 3 3 0,
+ gpb 7 3 3 0;
+ status = okay;
+
+ max8997_pmic@66 {
+ compatible = maxim,max8997-pmic;
+
+ reg = 0x66;
+
+ max8997,pmic-buck1-uses-gpio-dvs;
+ max8997,pmic-buck2-uses-gpio-dvs;
+ max8997,pmic-buck5-uses-gpio-dvs;
+
+ max8997,pmic-ignore-gpiodvs-side-effect;
+ max8997,pmic-buck125-default-dvs-idx = 0;
+
+ max8997,pmic-buck125-dvs-gpios = gpx0 5 1 0 0,
+gpx0 6 1 0 0,
+gpl0 0 1 0 0;
+
+ max8997,pmic-buck1-dvs-voltage = 135, 130,
+125, 120,
+115, 110,
+100, 95;
+
+ max8997,pmic-buck2-dvs-voltage = 110, 100,
+95, 90,
+110, 100,
+95, 90;
+
+ max8997,pmic-buck5-dvs-voltage = 120, 120,
+120, 120,
+120, 120,
+120, 120;
+
+ regulators {
+ valive_reg: LDO2 {
+regulator-name = VALIVE_1.1V_C210;
+regulator-min-microvolt = 110;
+regulator-max-microvolt = 110;
+regulator-always-on;
+
Re: [PATCH v2] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support
2012/9/4 Sylwester Nawrocki sylvester.nawro...@gmail.com:
On 09/03/2012 07:36 PM, Taehun Kim wrote:
+static void __init w5300e01_init(void)
+{
+ s3c_nand_set_platdata(w5300e01_nand_info);
+ platform_add_devices(w5300e01_devices, ARRAY_SIZE(w5300e01_devices));
+
+ /* W5300 interrupt pin. */
+ s3c_gpio_cfgpin(S3C2410_GPF(0), S3C2410_GPIO_IRQ);
+
+ s3c_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT);
+ s3c_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT);
+ s3c_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT);
+ s3c_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT);
Please don't use these obsolete S3C2410_GPIO_* defines, they will be
gone soon, if aren't yet.
+ gpio_set_value(S3C2410_GPF(0), 1);
+ gpio_set_value(S3C2410_GPF(4), 1);
+ gpio_set_value(S3C2410_GPF(5), 1);
+ gpio_set_value(S3C2410_GPF(6), 1);
+ gpio_set_value(S3C2410_GPF(7), 1);
Instead I would do something like:
8-
static const struct gpio gpios[] = {
{ S3C2410_GPF(4), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(5), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(6), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(7), GPIOF_OUT_INIT_HIGH, NULL },
};
if (!WARN_ON(gpio_request_array(gpios, ARRAY_SIZE(gpios)))
gpios_free_array(gpios);
/* W5300 interrupt pin. */
if (!WARN_ON(gpio_request(S3C2410_GPF(0), GPIOF_IN, NULL))) {
s3c_gpio_cfgpin(S3C2410_GPF(0), S3C_GPIO_SFN(2)); /* EINT0 */
gpio_free(S3C2410_GPF(0));
}
8-
--
Regards,
Sylwester
Thank you for your feedback. I will change the gpio routine as follows:
-
static const struct gpio w5300e01_gpios[] = {
{ S3C2410_GPF(4), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(5), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(6), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(7), GPIOF_OUT_INIT_HIGH, NULL },
};
static void __init w5300_init(void)
{
/* W5300 interrupt pin. */
if (WARN_ON(gpio_request(S3C2410_GPF(0), W5300 irq))) {
pr_err(%s: GPIO request failed.\n, __func__);
return;
}
s3c_gpio_cfgpin(S3C2410_GPF(0), S3C_GPIO_SFN(2)); /* EINT0 */
}
static void __init w5300e01_init(void)
{
s3c_nand_set_platdata(w5300e01_nand_info);
platform_add_devices(w5300e01_devices, ARRAY_SIZE(w5300e01_devices));
if (WARN_ON(gpio_request_array(w5300e01_gpios,
ARRAY_SIZE(w5300e01_gpios
pr_err(%s: GPIO request failed\n, __func__);
w5300_init();
s3c_pm_init();
}
-
Does anybody have a other comments?
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[PATCH v5 4/9] mmc: dw_mmc: lookup for optional biu and ciu clocks
Some platforms allow for clock gating and control of bus interface unit clock
and card interface unit clock. Add support for clock lookup of optional biu
and ciu clocks for clock gating and clock speed determination.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Will Newton will.new...@imgtec.com
---
drivers/mmc/host/dw_mmc.c | 50 +--
include/linux/mmc/dw_mmc.h |4 +++
2 files changed, 51 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 227c42e..e8c8491 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1960,13 +1960,40 @@ int dw_mci_probe(struct dw_mci *host)
return -ENODEV;
}
- if (!host-pdata-bus_hz) {
+ host-biu_clk = clk_get(host-dev, biu);
+ if (IS_ERR(host-biu_clk)) {
+ dev_dbg(host-dev, biu clock not available\n);
+ } else {
+ ret = clk_prepare_enable(host-biu_clk);
+ if (ret) {
+ dev_err(host-dev, failed to enable biu clock\n);
+ return ret;
+ }
+ }
+
+ host-ciu_clk = clk_get(host-dev, ciu);
+ if (IS_ERR(host-ciu_clk)) {
+ dev_dbg(host-dev, ciu clock not available\n);
+ } else {
+ ret = clk_prepare_enable(host-ciu_clk);
+ if (ret) {
+ dev_err(host-dev, failed to enable ciu clock\n);
+ goto err_clk_biu;
+ }
+ }
+
+ if (IS_ERR(host-ciu_clk))
+ host-bus_hz = host-pdata-bus_hz;
+ else
+ host-bus_hz = clk_get_rate(host-ciu_clk);
+
+ if (!host-bus_hz) {
dev_err(host-dev,
Platform data must supply bus speed\n);
- return -ENODEV;
+ ret = -ENODEV;
+ goto err_clk_ciu;
}
- host-bus_hz = host-pdata-bus_hz;
host-quirks = host-pdata-quirks;
spin_lock_init(host-lock);
@@ -2116,6 +2143,17 @@ err_dmaunmap:
regulator_disable(host-vmmc);
regulator_put(host-vmmc);
}
+
+err_clk_ciu:
+ if (!IS_ERR(host-ciu_clk)) {
+ clk_disable_unprepare(host-ciu_clk);
+ clk_put(host-ciu_clk);
+ }
+err_clk_biu:
+ if (!IS_ERR(host-biu_clk)) {
+ clk_disable_unprepare(host-biu_clk);
+ clk_put(host-biu_clk);
+ }
return ret;
}
EXPORT_SYMBOL(dw_mci_probe);
@@ -2149,6 +2187,12 @@ void dw_mci_remove(struct dw_mci *host)
regulator_put(host-vmmc);
}
+ if (!IS_ERR(host-ciu_clk))
+ clk_disable_unprepare(host-ciu_clk);
+ if (!IS_ERR(host-biu_clk))
+ clk_disable_unprepare(host-biu_clk);
+ clk_put(host-ciu_clk);
+ clk_put(host-biu_clk);
}
EXPORT_SYMBOL(dw_mci_remove);
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index a37a573..787ad56 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -78,6 +78,8 @@ struct mmc_data;
* @data_offset: Set the offset of DATA register according to VERID.
* @dev: Device associated with the MMC controller.
* @pdata: Platform data associated with the MMC controller.
+ * @biu_clk: Pointer to bus interface unit clock instance.
+ * @ciu_clk: Pointer to card interface unit clock instance.
* @slot: Slots sharing this MMC controller.
* @fifo_depth: depth of FIFO.
* @data_shift: log2 of FIFO item size.
@@ -158,6 +160,8 @@ struct dw_mci {
u16 data_offset;
struct device *dev;
struct dw_mci_board *pdata;
+ struct clk *biu_clk;
+ struct clk *ciu_clk;
struct dw_mci_slot *slot[MAX_MCI_SLOTS];
/* FIFO push and pull */
--
1.6.6.rc2
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[PATCH v5 8/9] mmc: dw_mmc: add support for implementation specific callbacks
The core dw-mshc controller driver can let platform specific implementations
of the dw-mshc controller to control the hardware as required by such
implementations. This is acheived by invoking implementation specific (optional)
callbacks. Define the list of callbacks supported the add invocation points
for the same.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Will Newton will.new...@imgtec.com
---
drivers/mmc/host/dw_mmc-pltfm.c | 12 -
drivers/mmc/host/dw_mmc-pltfm.h |3 +-
drivers/mmc/host/dw_mmc.c | 47 ++-
drivers/mmc/host/dw_mmc.h | 24
include/linux/mmc/dw_mmc.h |4 +++
5 files changed, 86 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index e17da91..c960ca7 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -23,7 +23,8 @@
#include dw_mmc.h
-int dw_mci_pltfm_register(struct platform_device *pdev)
+int dw_mci_pltfm_register(struct platform_device *pdev,
+ struct dw_mci_drv_data *drv_data)
{
struct dw_mci *host;
struct resource *regs;
@@ -41,6 +42,7 @@ int dw_mci_pltfm_register(struct platform_device *pdev)
if (host-irq 0)
return host-irq;
+ host-drv_data = drv_data;
host-dev = pdev-dev;
host-irq_flags = 0;
host-pdata = pdev-dev.platform_data;
@@ -48,6 +50,12 @@ int dw_mci_pltfm_register(struct platform_device *pdev)
if (!host-regs)
return -ENOMEM;
+ if (host-drv_data-init) {
+ ret = host-drv_data-init(host);
+ if (ret)
+ return ret;
+ }
+
platform_set_drvdata(pdev, host);
ret = dw_mci_probe(host);
return ret;
@@ -56,7 +64,7 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_register);
static int __devinit dw_mci_pltfm_probe(struct platform_device *pdev)
{
- return dw_mci_pltfm_register(pdev);
+ return dw_mci_pltfm_register(pdev, NULL);
}
static int __devexit dw_mci_pltfm_remove(struct platform_device *pdev)
diff --git a/drivers/mmc/host/dw_mmc-pltfm.h b/drivers/mmc/host/dw_mmc-pltfm.h
index 6c065d9..301f245 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.h
+++ b/drivers/mmc/host/dw_mmc-pltfm.h
@@ -12,7 +12,8 @@
#ifndef _DW_MMC_PLTFM_H_
#define _DW_MMC_PLTFM_H_
-extern int dw_mci_pltfm_register(struct platform_device *pdev);
+extern int dw_mci_pltfm_register(struct platform_device *pdev,
+ struct dw_mci_drv_data *drv_data);
extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev);
extern const struct dev_pm_ops dw_mci_pltfm_pmops;
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1308619..6104c0f 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -231,6 +231,7 @@ static void dw_mci_set_timeout(struct dw_mci *host)
static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command
*cmd)
{
struct mmc_data *data;
+ struct dw_mci_slot *slot = mmc_priv(mmc);
u32 cmdr;
cmd-error = -EINPROGRESS;
@@ -260,6 +261,9 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc,
struct mmc_command *cmd)
cmdr |= SDMMC_CMD_DAT_WR;
}
+ if (slot-host-drv_data-prepare_command)
+ slot-host-drv_data-prepare_command(slot-host, cmdr);
+
return cmdr;
}
@@ -815,6 +819,9 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
slot-clock = ios-clock;
}
+ if (slot-host-drv_data-set_ios)
+ slot-host-drv_data-set_ios(slot-host, ios);
+
switch (ios-power_mode) {
case MMC_POWER_UP:
set_bit(DW_MMC_CARD_NEED_INIT, slot-flags);
@@ -1820,6 +1827,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned
int id)
{
struct mmc_host *mmc;
struct dw_mci_slot *slot;
+ int ctrl_id, ret;
u8 bus_width;
mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host-dev);
@@ -1851,6 +1859,16 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
if (host-pdata-caps)
mmc-caps = host-pdata-caps;
+ if (host-dev-of_node) {
+ ctrl_id = of_alias_get_id(host-dev-of_node, mshc);
+ if (ctrl_id 0)
+ ctrl_id = 0;
+ } else {
+ ctrl_id = to_platform_device(host-dev)-id;
+ }
+ if (host-drv_data host-drv_data-caps)
+ mmc-caps |= host-drv_data-caps[ctrl_id];
+
if (host-pdata-caps2)
mmc-caps2 = host-pdata-caps2;
@@ -1861,6 +1879,14 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
else
bus_width = 1;
+ if (host-drv_data-setup_bus) {
+ struct device_node *slot_np;
+
[PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus
control. Add support for these extensions and include provide device tree based
discovery suppory as well.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Will Newton will.new...@imgtec.com
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 86 +++
drivers/mmc/host/Kconfig |9 +
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/dw_mmc-exynos.c | 253
4 files changed, 349 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
new file mode 100644
index 000..323a891
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -0,0 +1,86 @@
+* Samsung Exynos specific extensions to the Synopsis Designware Mobile
+ Storage Host Controller
+
+The Synopsis designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsis dw mshc controller properties described
+by synposis-dw-mshc.txt and the properties used by the Samsung Exynos specific
+extensions to the Synopsis Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be
+ - samsung,exynos4210-dw-mshc: for controllers with Samsung Exynos4210
+ specific extentions.
+ - samsung,exynos4412-dw-mshc: for controllers with Samsung Exynos4412
+ specific extentions.
+ - samsung,exynos5250-dw-mshc: for controllers with Samsung Exynos5250
+ specific extentions.
+
+* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
+ unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
+ ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
+
+* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift
value
+ in transmit mode and CIU clock phase shift value in receive mode for single
+ data rate mode operation. Refer notes below for the order of the cells and
the
+ valid values.
+
+* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift
value
+ in transmit mode and CIU clock phase shift value in receive mode for double
+ data rate mode operation. Refer notes below for the order of the cells and
the
+ valid values.
+
+ Notes for the sdr-timing and ddr-timing values:
+
+The order of the cells should be
+ - First Cell: CIU clock phase shift value for tx mode.
+ - Second Cell: CIU clock phase shift value for rx mode.
+
+Valid values for SDR and DDR CIU clock timing for Exynos5250:
+ - valid value for tx phase shift and rx phase shift is 0 to 7.
+ - when CIU clock divider value is set to 3, all possible 8 phase shift
+values can be used.
+ - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
+phase shift clocks should be 0.
+
+Required properties for a slot:
+
+* gpios: specifies a list of gpios used for command, clock and data bus. The
+ first gpio is the command line and the second gpio is the clock line. The
+ rest of the gpios (depending on the bus-width property) are the data lines in
+ no particular order. The format of the gpio specifier depends on the gpio
+ controller.
+
+Example:
+
+ The MSHC controller node can be split into two portions, SoC specific and
+ board specific portions as listed below.
+
+ dwmmc0@1220 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc0@1220 {
+ num-slots = 1;
+ supports-highspeed;
+ broken-cd;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ samsung,dw-mshc-sdr-timing = 2 3 3;
+ samsung,dw-mshc-ddr-timing = 1 2 3;
+
+ slot@0 {
+ reg = 0;
+ bus-width = 8;
+ gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
+ gpc1 0 2 3 3, gpc1 1 2 3 3,
+ gpc1 2 2 3 3, gpc1 3 2 3 3,
+ gpc0 3 2 3 3, gpc0 4 2 3 3,
+ gpc0 5 2 3 3, gpc0 6 2 3 3;
+ };
+ };
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index aa131b3..9bf10e7 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -540,6 +540,15 @@ config MMC_DW_PLTFM
If unsure, say Y.
+config MMC_DW_EXYNOS
+ tristate Exynos specific extentions for
[PATCH v4 3/3] ARM: dts: Add nodes for dw_mmc controllers for Samsung Exynos5250 platforms
Add device nodes for the four instances of dw_mmc controllers in Exynos5250
and enable instance 0 and 2 for the smdk5250 board.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 57 +
arch/arm/boot/dts/exynos5250.dtsi | 32
2 files changed, 89 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 8a5e348..ae1cffe 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -16,6 +16,13 @@
model = SAMSUNG SMDK5250 board based on EXYNOS5250;
compatible = samsung,smdk5250, samsung,exynos5250;
+ aliases {
+ mshc0 = dwmmc_0;
+ mshc1 = dwmmc_1;
+ mshc2 = dwmmc_2;
+ mshc3 = dwmmc_3;
+ };
+
memory {
reg = 0x4000 0x8000;
};
@@ -72,6 +79,56 @@
status = disabled;
};
+ dwmmc_0: dwmmc0@1220 {
+ num-slots = 1;
+ supports-highspeed;
+ broken-cd;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ samsung,dw-mshc-ciu-div = 3;
+ samsung,dw-mshc-sdr-timing = 2 3 3;
+ samsung,dw-mshc-ddr-timing = 1 2 3;
+
+ slot@0 {
+ reg = 0;
+ bus-width = 8;
+ gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
+ gpc1 0 2 3 3, gpc1 1 2 3 3,
+ gpc1 2 2 3 3, gpc1 3 2 3 3,
+ gpc0 3 2 3 3, gpc0 4 2 3 3,
+ gpc0 5 2 3 3, gpc0 6 2 3 3;
+ };
+ };
+
+ dwmmc_1: dwmmc1@1221 {
+ status = disabled;
+ };
+
+ dwmmc_2: dwmmc2@1222 {
+ num-slots = 1;
+ supports-highspeed;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ samsung,dw-mshc-ciu-div = 3;
+ samsung,dw-mshc-sdr-timing = 2 3 3;
+ samsung,dw-mshc-ddr-timing = 1 2 3;
+
+ slot@0 {
+ reg = 0;
+ bus-width = 4;
+ samsung,cd-pinmux-gpio = gpc3 2 2 3 3;
+ gpios = gpc3 0 2 0 3, gpc3 1 2 0 3,
+ gpc3 3 2 3 3, gpc3 4 2 3 3,
+ gpc3 5 2 3 3, gpc3 6 2 3 3,
+ gpc4 3 3 3 3, gpc4 3 3 3 3,
+ gpc4 5 3 3 3, gpc4 6 3 3 3;
+ };
+ };
+
+ dwmmc_3: dwmmc3@1223 {
+ status = disabled;
+ };
+
spi_0: spi@12d2 {
status = disabled;
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 004aaa8..f69e389 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -182,6 +182,38 @@
#size-cells = 0;
};
+ dwmmc0@1220 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc1@1221 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc2@1222 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ dwmmc3@1223 {
+ compatible = samsung,exynos5250-dw-mshc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
amba {
#address-cells = 1;
#size-cells = 1;
--
1.6.6.rc2
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Re: [PATCH v3 1/4] pinctrl: add samsung pinctrl and gpiolib driver
On 3 September 2012 16:44, Linus Walleij linus.wall...@linaro.org wrote: On Thu, Aug 23, 2012 at 1:15 PM, Thomas Abraham thomas.abra...@linaro.org wrote: Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Cc: Linus Walleij linus.wall...@linaro.org Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Thomas Abraham thomas.abra...@linaro.org Looks good to me, I saw Stephen had some minor comments and I expect that you probably fix them before applying to the Samsung tree so: Reviewed-by: Linus Walleij linus.wall...@linaro.org Feel free to push this through ARM SoC, I guess that's the plan? Hi Linus, Thanks for reviewing the Samsung pinctrl driver patches. I will do the changes that Stephen has listed and resubmit. I will request Samsung maintainer to consider the support for pinctrl driver for 3.7. Thanks, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] gpio: samsung: Update documentation
Sylwester Nawrocki wrote: On 09/04/2012 09:27 AM, Linus Walleij wrote: On Sun, Sep 2, 2012 at 6:24 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: Update Samsung GPIO API documentation to reflect removal of the s3c24xx specific gpio API. While at it, fix some typos. The notes on conversion from s3c2410_* functions to the gpiolib API are left here just in case there is any out of tree code that still needs to be converted. Signed-off-by: Sylwester Nawrocki sylvester.nawro...@gmail.com Acked-by: Linus Walleij linus.wall...@linaro.org Get the Samsung maintainers to apply this patch since they carry the API changes. Linus, thanks for your ack. Thanks Linus. Kgene, this is the documentation update we talked about previously. Can you please pick this patch as well ? Sure, I will apply this into Samsung tree. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3 1/4] pinctrl: add samsung pinctrl and gpiolib driver
Thomas Abraham wrote: On 3 September 2012 16:44, Linus Walleij linus.wall...@linaro.org wrote: On Thu, Aug 23, 2012 at 1:15 PM, Thomas Abraham thomas.abra...@linaro.org wrote: Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Cc: Linus Walleij linus.wall...@linaro.org Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Thomas Abraham thomas.abra...@linaro.org Looks good to me, I saw Stephen had some minor comments and I expect that you probably fix them before applying to the Samsung tree so: Reviewed-by: Linus Walleij linus.wall...@linaro.org Feel free to push this through ARM SoC, I guess that's the plan? Hi Linus, Thanks for reviewing the Samsung pinctrl driver patches. I will do the changes that Stephen has listed and resubmit. I will request Samsung maintainer to consider the support for pinctrl driver for 3.7. Looks OK, I will apply updated patches Thomas said into Samsung tree. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 0/2] ARM: Exynos4-DT: Enable pinctrl driver support
Thomas Abraham wrote: This patch series enables support for pin controller driver for Exynos4210 SoC based device tree enabled platforms. The first patch in this series adds the pin group nodes for each of the three pin controller instances, but it is not a exhaustive list of all possible pin group nodes. As the coverage of pinctrl driver is extended device drivers used on Exynos4210 platforms, additional pin group nodes can be added as required. Thomas Abraham (2): ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC ARM: EXYNOS: Enable pinctrl driver support for Exynos4 device tree enabled platform arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 457 + arch/arm/boot/dts/exynos4210.dtsi | 37 +++ arch/arm/mach-exynos/Kconfig |2 + 3 files changed, 496 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dt냐 Looks good to me, will apply this series with Linus Walleij's ack. Note, this will be applied on top of v4 pinctrl driver will be submitted by Thomas. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v4 0/2] Add device tree and clock support for G-Scaler
Shaik Ameer Basha wrote: This patch series adds clock support for G-Scaler and device node entries for G-Scaler on exynos5. This patch is based on Kukjin Kim's (linux-samsung) for-next branch. https://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git changes since v3: - Addressed review comments from Kukjin Kim http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11658.html http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11659.html changes since v2: - Addressed review comments from Sylwester Nawrocki http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11372.html - Addressed review comments from Kukjin Kim and Sunyoung Kang http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11377.html http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11429.html changes since v1: - Addressed review comments from Sylwester Nawrocki http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11177.html - Addressed review comments from Sachin Kamat http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11176.html http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11178.html Shaik Ameer Basha (2): ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Adds G-Scaler device from Device Tree .../devicetree/bindings/media/exynos5-gsc.txt | 32 +++ arch/arm/boot/dts/exynos5250.dtsi | 28 +++ arch/arm/mach-exynos/clock-exynos5.c | 86 arch/arm/mach-exynos/include/mach/map.h|5 + arch/arm/mach-exynos/mach-exynos5-dt.c |8 ++ 5 files changed, 159 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/exynos5- gsc.txt Looks OK, will apply this series. BTW, just wondering...the sign-chain is right? Hoping you know, if sign-off has been added without their handling on the patches, it's wrong. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: Samsung: Remove unused code for the clocks debug-fs interface
Sylwester Nawrocki wrote:
Commit f86c6660927614fcda257 ARM: SAMSUNG: Add clkdev infrastructure
disabled population of the 'clocks' list - the clocks are now on the
clkdev clock list. However, this effectively broke the existing clocks
debug-fs interface on all Samsung platforms. Nobody complained about
this missing feature for over one year, so remove the unused code.
Yeah, could be. BTW, following will fix it on Samsung platforms?
From: Arve HjC3B8nnevC3A5g a...@android.com
Subject: [PATCH] ARM: SAMSUNG: Fix clock debugfs code
Restore list add deleted by commit f86c66609276('ARM: SAMSUNG:
Add clkdev infrastructure') and fix clk_debugfs_register_one
to not crash when devname is NULL.
Signed-off-by: Arve HjC3B8nnevC3A5g a...@android.com
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
---
arch/arm/plat-samsung/clock.c | 15 ++-
1 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca..b7338ce 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -281,6 +281,15 @@ int s3c24xx_register_clock(struct clk *clk)
if (clk-enable == NULL)
clk-enable = clk_null_enable;
+ /* add to the list of available clocks */
+
+ /* Quick check to see if this clock has already been registered. */
+ BUG_ON(clk-list.prev != clk-list.next);
+
+ spin_lock(clocks_lock);
+ list_add(clk-list, clocks);
+ spin_unlock(clocks_lock);
+
/* fill up the clk_lookup structure and register it*/
clk-lookup.dev_id = clk-devname;
clk-lookup.con_id = clk-name;
@@ -395,7 +404,11 @@ static int clk_debugfs_register_one(struct clk *c)
char s[255];
char *p = s;
- p += sprintf(p, %s, c-devname);
+ if (c-name)
+ p += sprintf(p, %s, c-name);
+
+ if (c-devname)
+ p += sprintf(p, :%s, c-devname);
d = debugfs_create_dir(s, pa ? pa-dent : clk_debugfs_root);
if (!d)
--
1.7.1
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
This functionality will be restored when switching to the common clock
framework.
Signed-off-by: Sylwester Nawrocki sylvester.nawro...@gmail.com
---
arch/arm/plat-samsung/clock.c | 92
---
-
arch/arm/plat-samsung/include/plat/clock.h |8 +--
2 files changed, 1 insertions(+), 99 deletions(-)
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Re: [PATCH] ARM: EXYNOS: Add MFC device tree support
On 08/28/2012 07:08 PM, Arun Kumar K wrote:
Hi Karol,
Thanks for your comments.
Please find my response inline.
Hi... and sorry for so much delayed response.
+
+static void __init exynos5_reserve(void)
+{
+ s5p_mfc_reserve_mem(0x4300, 8 20, 0x5100, 8 20);
I think it would make sense to make this memory reservation dependent
on mfc* node being present in DTS. It's to early to use of_* functions
(because tree is not populated at this stage) but fdt_* family of functions
work just fine.
As I can see the fdt_* functions are not used in any of the ARM based SoC
init codes. Though I can see some references in powerpc.
The implementation and includes are present in arch/arm/boot/compressed/
which I think cannot be used directly in mach-exynos unless we make some
comon makefile changes.
It looks like I was writing from memory, and I actually mixed things
up. To be clear this time - we can't use regular device tree handling
functions in reserve() as it's too early. Namely, flattened device tree
is not yet converted to kernel's-natural representation. However,
I think we can scan fdt just fine. To do so one just needs to use
functions declared here
#include linux/of_fdt.h
Actual architecture-independent code is in drivers/of/fdt.c. This
provides of_fdt_ family of functions. Please see below for example.
Please clarify whether its ok to use fdt_* functions to parse the dts in
exynos machine init or please point me to some sample implementations
which I can refer to.
It should be ok to use anything that works on flattened device tree
rather than its uncompressed version. I've experimented a bit and
something like this worked for me just fine (it was around 3.3-kernel
timeframe, but I don't think that fdt api has changed):
[mach-exynos4-dt.c]
#include linux/of_fdt.h
int fdt_find_compat(unsigned long node, const char *uname, int depth, void
*data)
{
if (of_flat_dt_is_compatible(node, (char *)data))
return 1;
return 0;
}
static void __init exynos4210_dt_reserve(void)
{
/* Reserve memory for MFC only if it's available */
if (of_scan_flat_dt(fdt_find_compat, samsung,s5pv210-mfc)) {
printk(KERN_NOTICE exynos4-dt: mfc device node found - setting
up memory area for dma\n);
s5p_mfc_reserve_mem(0x4300, 8 20, 0x5100, 8 20);
}
}
[.dts]
codec@some-addr {
compatible = samsung,s5pv210-mfc;
};
So, in above code fragment I just check if mfc was defined in dts.
This could probably stay as it is.
Then I allocate _predefined_ region - and this part should be fixed.
If you have nodes like mfc-r-size/offset, then you could just get
this information directly from (f)dt rather than hardcoding it in the code.
Precisely, after we find compatible node we could do something like
following (untested):
unsigned long lsize, loff, rsize, roff len;
__be32 *prop;
prop = of_get_flat_dt_prop(node, samsung,mfc-l-size, len);
if (!prop)
return;
lsize = of_read_ulong(prop, len/4);
...
Regards,
--
Karol Lewandowski | Samsung Poland RD Center | Linux/Platform
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Re: [PATCH 0/3] ARM: dts: Exynos4 dts reorganization
On 3 September 2012 18:04, Tomasz Figa t.f...@samsung.com wrote: This patch series prepares existing Exynos4210 DT infrastructure to be further extended for new SoCs from Exynos4 line and new boards. Tomasz Figa (3): ARM: dts: Move parts common to Exynos4 from Exynos4210.dtsi to Exynos4.dtsi ARM: EXYNOS: exynos4-dt: Use exynos4 prefix instead of exynos4210 ARM: dts: exynos4: Assume status of all optional nodes as disabled arch/arm/boot/dts/exynos4.dtsi| 232 ++ arch/arm/boot/dts/exynos4210-origen.dts | 58 +--- arch/arm/boot/dts/exynos4210-smdkv310.dts | 52 +-- arch/arm/boot/dts/exynos4210.dtsi | 181 +-- arch/arm/mach-exynos/mach-exynos4-dt.c| 18 +-- 5 files changed, 248 insertions(+), 293 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4.dtsi Thanks, we can build Exynos4412 device tree support on top of this series. Acked-by: Thomas Abraham thomas.abra...@linaro.org -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 0/2] Add device tree and clock support for G-Scaler
Hi Kukjin Kim, On Wed, Sep 5, 2012 at 3:37 AM, Kukjin Kim kgene@samsung.com wrote: Shaik Ameer Basha wrote: This patch series adds clock support for G-Scaler and device node entries for G-Scaler on exynos5. This patch is based on Kukjin Kim's (linux-samsung) for-next branch. https://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git changes since v3: - Addressed review comments from Kukjin Kim http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11658.html http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11659.html changes since v2: - Addressed review comments from Sylwester Nawrocki http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11372.html - Addressed review comments from Kukjin Kim and Sunyoung Kang http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11377.html http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11429.html changes since v1: - Addressed review comments from Sylwester Nawrocki http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11177.html - Addressed review comments from Sachin Kamat http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11176.html http://www.mail-archive.com/linux-samsung- s...@vger.kernel.org/msg11178.html Shaik Ameer Basha (2): ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Adds G-Scaler device from Device Tree .../devicetree/bindings/media/exynos5-gsc.txt | 32 +++ arch/arm/boot/dts/exynos5250.dtsi | 28 +++ arch/arm/mach-exynos/clock-exynos5.c | 86 arch/arm/mach-exynos/include/mach/map.h|5 + arch/arm/mach-exynos/mach-exynos5-dt.c |8 ++ 5 files changed, 159 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/exynos5- gsc.txt Looks OK, will apply this series. BTW, just wondering...the sign-chain is right? Hoping you know, if sign-off has been added without their handling on the patches, it's wrong. This sign-chain is fine. Please apply this series to your tree. Thanks, Shaik Ameer Basha Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/5] ARM: Exynos4: dts: Specify address and size cells for i2c controllers
On 4 September 2012 14:20, Tomasz Figa t.f...@samsung.com wrote:
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 16
1 file changed, 16 insertions(+)
Acked-by: Thomas Abraham thomas.abra...@linaro.org
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 9b71b61..718e3d2 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -122,6 +122,8 @@
};
i2c@1386 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1386 0x100;
interrupts = 0 58 0;
@@ -129,6 +131,8 @@
};
i2c@1387 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1387 0x100;
interrupts = 0 59 0;
@@ -136,6 +140,8 @@
};
i2c@1388 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1388 0x100;
interrupts = 0 60 0;
@@ -143,6 +149,8 @@
};
i2c@1389 {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x1389 0x100;
interrupts = 0 61 0;
@@ -150,6 +158,8 @@
};
i2c@138A {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138A 0x100;
interrupts = 0 62 0;
@@ -157,6 +167,8 @@
};
i2c@138B {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138B 0x100;
interrupts = 0 63 0;
@@ -164,6 +176,8 @@
};
i2c@138C {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138C 0x100;
interrupts = 0 64 0;
@@ -171,6 +185,8 @@
};
i2c@138D {
+ #address-cells = 1;
+ #size-cells = 0;
compatible = samsung,s3c2440-i2c;
reg = 0x138D 0x100;
interrupts = 0 65 0;
--
1.7.12
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Re: [PATCH v2 3/5] ARM: Exynos4: Add OF compatibility lookups for Exynos4 i2c adapters
On 4 September 2012 14:20, Tomasz Figa t.f...@samsung.com wrote:
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/mach-exynos4-dt.c | 14 ++
1 file changed, 14 insertions(+)
Acked-by: Thomas Abraham thomas.abra...@linaro.org
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index 8dad4ec..5f805b4 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -55,6 +55,20 @@ static const struct of_dev_auxdata
exynos4_auxdata_lookup[] __initconst = {
exynos4-sdhci.3, NULL),
OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(0),
s3c2440-i2c.0, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(1),
+ s3c2440-i2c.1, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(2),
+ s3c2440-i2c.2, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(3),
+ s3c2440-i2c.3, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(4),
+ s3c2440-i2c.4, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(5),
+ s3c2440-i2c.5, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(6),
+ s3c2440-i2c.6, NULL),
+ OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(7),
+ s3c2440-i2c.7, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-spi, EXYNOS4_PA_SPI0,
exynos4210-spi.0, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-spi, EXYNOS4_PA_SPI1,
--
1.7.12
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Re: [PATCH v2 5/5] ARM: Exynos: Add basic dts file for Samsung Trats board
On 4 September 2012 14:20, Tomasz Figa t.f...@samsung.com wrote:
This commit adds basic device tree for Exynos4210-based Trats board.
Currently it provides support for eMMC over sdhci and MAX8997 PMIC.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4210-trats.dts | 237
+
arch/arm/mach-exynos/Makefile.boot | 2 +-
2 files changed, 238 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/exynos4210-trats.dts
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
new file mode 100644
index 000..73567b8
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -0,0 +1,237 @@
+/*
+ * Samsung's Exynos4210 based Trats board device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Device tree source file for Samsung's Trats board which is based on
+ * Samsung's Exynos4210 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ exynos4210.dtsi
+
+/ {
+ model = Samsung Trats based on Exynos4210;
+ compatible = samsung,trats, samsung,exynos4210;
+
+ memory {
+ reg = 0x4000 0x2000
+ 0x6000 0x2000;
+ };
Why does this have to be split. Why not have a single entry with the
size as 0x4000?
+
+ chosen {
+ bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5
rootwait earlyprintk panic=5;
+ };
+
+ vemmc_reg: voltage-regulator@0 {
+ compatible = regulator-fixed;
+ regulator-name = VMEM_VDD_2.8V;
+ regulator-min-microvolt = 280;
+ regulator-max-microvolt = 280;
+ gpio = gpk0 2 1 0 0;
+ enable-active-high;
+ };
+
+ sdhci_emmc: sdhci@1251 {
+ bus-width = 8;
+ non-removable;
+ broken-voltage;
+ gpios = gpk0 0 2 0 3,
+ gpk0 1 2 0 3,
+ gpk0 3 2 2 3,
+ gpk0 4 2 2 3,
+ gpk0 5 2 2 3,
+ gpk0 6 2 2 3,
+ gpk1 3 3 3 3,
+ gpk1 4 3 3 3,
+ gpk1 5 3 3 3,
+ gpk1 6 3 3 3;
+ vmmc-supply = vemmc_reg;
+ status = okay;
+ };
+
+ serial@1380 {
+ status = okay;
+ };
+
+ serial@1381 {
+ status = okay;
+ };
+
+ serial@1382 {
+ status = okay;
+ };
+
+ serial@1383 {
+ status = okay;
+ };
+
+ i2c@138B {
+ samsung,i2c-sda-delay = 100;
+ samsung,i2c-slave-addr = 0x10;
+ samsung,i2c-max-bus-freq = 10;
+ gpios = gpb 6 3 3 0,
+ gpb 7 3 3 0;
+ status = okay;
+
+ max8997_pmic@66 {
+ compatible = maxim,max8997-pmic;
+
+ reg = 0x66;
Probably, the interrupts can be listed when we have pinctrl driver
merged in Samsung tree.
+
+ max8997,pmic-buck1-uses-gpio-dvs;
+ max8997,pmic-buck2-uses-gpio-dvs;
+ max8997,pmic-buck5-uses-gpio-dvs;
+
+ max8997,pmic-ignore-gpiodvs-side-effect;
+ max8997,pmic-buck125-default-dvs-idx = 0;
+
+ max8997,pmic-buck125-dvs-gpios = gpx0 5 1 0 0,
+gpx0 6 1 0 0,
+gpl0 0 1 0 0;
+
+ max8997,pmic-buck1-dvs-voltage = 135, 130,
+125, 120,
+115, 110,
+100, 95;
+
+ max8997,pmic-buck2-dvs-voltage = 110, 100,
+95, 90,
+110, 100,
+95, 90;
+
+ max8997,pmic-buck5-dvs-voltage = 120, 120,
+120, 120,
+120, 120,
+120, 120;
+
+
video: exynos_dp: Add device tree based discovery support
From: Ajay Kumar ajaykumar...@samsung.com
Add device tree match table for Exynos DP
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/video/exynos/exynos_dp_core.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/video/exynos/exynos_dp_core.c
b/drivers/video/exynos/exynos_dp_core.c
index c6c016a..3bccd6b 100644
--- a/drivers/video/exynos/exynos_dp_core.c
+++ b/drivers/video/exynos/exynos_dp_core.c
@@ -18,6 +18,7 @@
#include linux/io.h
#include linux/interrupt.h
#include linux/delay.h
+#include linux/of.h
#include video/exynos_dp.h
@@ -1019,6 +1020,14 @@ static const struct dev_pm_ops exynos_dp_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(exynos_dp_suspend, exynos_dp_resume)
};
+#ifdef CONFIG_OF
+static const struct of_device_id exynos_dp_match[] = {
+ { .compatible = samsung,exynos5-dp },
+ {},
+};
+MODULE_DEVICE_TABLE(of, exynos_dp_match);
+#endif
+
static struct platform_driver exynos_dp_driver = {
.probe = exynos_dp_probe,
.remove = __devexit_p(exynos_dp_remove),
@@ -1026,6 +1035,7 @@ static struct platform_driver exynos_dp_driver = {
.name = exynos-dp,
.owner = THIS_MODULE,
.pm = exynos_dp_pm_ops,
+ .of_match_table = of_match_ptr(exynos_dp_match),
},
};
--
1.7.0.4
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Re: [PATCH v2 5/5] ARM: Exynos: Add basic dts file for Samsung Trats board
Hi,
Thanks for reviewing the patch.
On Wednesday 05 of September 2012 09:35:49 Thomas Abraham wrote:
+
+ memory {
+ reg = 0x4000 0x2000
+ 0x6000 0x2000;
+ };
Why does this have to be split. Why not have a single entry with the
size as 0x4000?
The memory node corresponds to struct meminfo and each entry (with two
values) makes one struct membank defining a memory bank.
I've been talking with Kyungmin about this. Originally bootloaders used to
report 4 banks of 256 MiB, but it turned out that real bank configuration
on Trats is 2 banks of 512 MiB.
I'm not into memory management internals, so I don't know if this has any
significance, but I defined the node to represent the real configuration
(otherwise I would have probably used 4 banks of 256 MiB and drop the 4th
patch).
+ max8997_pmic@66 {
+ compatible = maxim,max8997-pmic;
+
+ reg = 0x66;
Probably, the interrupts can be listed when we have pinctrl driver
merged in Samsung tree.
Right.
--
Best regards,
Tomasz Figa
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