Tested-by: Yuvaraj Kumar CD yuvaraj...@samsung.com
On Tue, Aug 26, 2014 at 5:07 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
The max77802 driver reads the default operating mode (opmode)
set for regulators when enabled from the hardware registers.
But if a regulator is
Hello Andreas,
On 08/27/2014 12:53 AM, Andreas Färber wrote:
+hsi2c_8 {
+status = okay;
+clock-frequency = 333000;
+
+trackpad@4b {
+compatible=atmel,maxtouch;
+reg=0x4b;
+interrupt-parent=gpx1;
+interrupts=1
On Wed, 2014-08-27 at 03:38 +0200, Andreas Färber wrote:
Am 26.08.2014 09:30, schrieb Sjoerd Simons:
Enable USB gadget support without support for any specific gadgets to
more easily catch cases where a devices dts doesn't specify the usb
controllers dr_mode while it should.
On Wed, 2014-08-27 at 04:08 +0200, Andreas Färber wrote:
Hi,
Am 26.08.2014 09:30, schrieb Sjoerd Simons:
I suspect other boards base using exynos5420/5800 might need the similar
fixes
(Arndale Octa and Samsung SMDK5420) to their dts files, so would be great if
folks with those board
dwc3 driver is using the new Exynos5 SoC series USB DRD PHY driver
(PHY_EXYNOS5_USBDRD which selects GENERIC_PHY) as can be seen by
looking at the following commits:
7a4cf0fde054 (ARM: dts: Update DWC3 usb controller to use new
phy driver for exynos5250)
f070267b5fc1 (ARM: dts: Enable
Add initial device tree nodes for EXYNOS7 SoC.
Also, includes the dt-binding definitions for clock ids.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
---
Add the required pin configuration support to EXYNOS7
using pinctrl interface.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
---
This patch adds initial dts file for the Espresso board
based on Exynos7 from Samsung.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
---
arch/arm64/boot/dts/Makefile |1 +
From: Alim Akhtar alim.akh...@samsung.com
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos7 SoC.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin
The i2c-exynos5.c driver can be reused for the HSI2C controller
on Exynos7 SoCs from Samsung.
This patch adds the Kconfig dependency to choose i2c-exynos5.c
for CONFIG_ARCH_EXYNOS7.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: linux-...@vger.kernel.org
Cc: Wolfram Sang
The HSI2C module on Exynos7 differs in the transfer status
bits. Transfer status bits were moved to INT_ENABLE and
INT_STATUS registers
This patch adds support for the HSI2C module on Exynos7.
1. Implementes a hw field in the variant struct to distinguish
the hardware.
2. Updates the dt-new
Exynos7 SoC has a Watchdog for Atlas (A57) cores
This patch adds support for the Atlas watchdog.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Wim Van Sebroeck w...@iguana.be
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |1 +
drivers/watchdog/s3c2410_wdt.c
From: Alim Akhtar alim.akh...@samsung.com
This patch enables upcoming exynos7 SoCs serial driver.
This also modifies various dependencies for Kconfig
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
drivers/tty/serial/Kconfig |6
This patch adds the needed fields fixed_factor_clks and
nr_fixed_factor_clks to struct exynos_cmu_info
The same fields are used in the function exynos_cmu_register_one()
for registering the fixed factor clocks.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Tomasz Figa
This patch adds clock description for MUX, DIV, GATE and PLL
clocks available in TOPC, TOP0, TOP1, BUS0, BUS1, FSYS0, FSYS1,
CCORE, PERIC0, PERIC1, PERIS, DISP, G3D, MSCL and MFC blocks.
Adds Gate clocks for UART, HSI2C, SPI, SPDIF, TMU, PWM, WDT,
USB, MMC, RTC and DISP block clocks.
This patch
This patch factors out the code that can be reused from
clk-exynos5260.c to clk-samsung/clk.c and clk-samsung/clk.h
As Clock controller in Exynos7 support various blocks in
CMU. The common functions and structures can be reused to
support Clock controller in Exynos7.
Signed-off-by: Naveen
By registers bits and offsets the 145xx PLL is similar to
pll_type pll_35xx. Also, 1460x PLL is similar to pll_type
pll_46xx.
Hence, reusing the functions defined for pll_35xx and pll_46xx
to support 145xx and 1460x PLLs respectively.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
This patch adds driver data for Exynos7
to pinctrl-exynos driver. Exynos7 includes 229 multi-functional
input/output ports. There are 40 general port groups.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Tomasz Figa t.f...@samsung.com
Cc: linus.wall...@linaro.org
Cc: Thomas
Samsung Exynos7 is a ARM64bit processor. Which does not select
the CONFIG_PLAT_SAMSUNG symbol. CONFIG_PINCTRL_SAMSUNG is being
selected for both PLAT_SAMSUNG and ARCH_EXYNOS7 symbols.
This patch modifes the pinctrl/Makefile to use
CONFIG_PINCTRL_SAMSUNG symbol to compile the pinctrl/samsung/*.c
Hello All,
On 27 August 2014 15:18, Naveen Krishna Chatradhi ch.nav...@samsung.com wrote:
This patch factors out the code that can be reused from
clk-exynos5260.c to clk-samsung/clk.c and clk-samsung/clk.h
As Clock controller in Exynos7 support various blocks in
CMU. The common functions and
On 08/26/2014 07:00 AM, Joonyoung Shim wrote:
Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
In case of allocation errors some already allocated buffers
were not freed. The patch fixes it.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
Hi Naveen,
On Wed, Aug 27, 2014 at 10:44:18AM +0100, Naveen Krishna Chatradhi wrote:
Add initial device tree nodes for EXYNOS7 SoC.
Also, includes the dt-binding definitions for clock ids.
Fallout from a rebase? That latter part doesn't seem to be relevant.
Signed-off-by: Naveen Krishna
From: Mark Brown broo...@linaro.org
Since this is a platform driver and can be probed at any time we can't
annotate funtions in the probe path as __init, the code can't safely be
discarded at the end of kernel init.
Signed-off-by: Mark Brown broo...@linaro.org
---
systemd needs control groups support to be enabled in the
kernel so let's enable it by default since is quite likely
that a user-space with systemd will be used.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed,
systemd needs control groups support to be enabled in the
kernel so let's enable it by default since is quite likely
that a user-space with systemd will be used.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/configs/exynos_defconfig | 1 +
1 file changed, 1
On 27 August 2014 16:30, Mark Brown broo...@kernel.org wrote:
From: Mark Brown broo...@linaro.org
Since this is a platform driver and can be probed at any time we can't
annotate funtions in the probe path as __init, the code can't safely be
discarded at the end of kernel init.
The patch removes redundant checks, redundant HW reads
and simplifies code.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
v2:
- fixed bit cleaning operation
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 64
1 file changed, 15 insertions(+), 49
Hi,
On Wed, Aug 27, 2014 at 10:44:20AM +0100, Naveen Krishna Chatradhi wrote:
From: Alim Akhtar alim.akh...@samsung.com
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos7 SoC.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by:
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
Add the required pin configuration support to EXYNOS7
[snip]
+/ {
+ /* ALIVE block @1058 */
+ pinctrl@1058 {
This syntax repeating the whole hierarchy of nodes in every dts file
Hi Doug,
[snip]
I think you shall be able use MMC_CAP_NEEDS_POLL, to handle this
broken card detect mechanism. We even have a DT binding for that,
broken-cd.
I don't think this is possible, but let me explain why I think so and
you can correct me.
The voltage domain of the card detect
On 27 August 2014 13:17, Ulf Hansson ulf.hans...@linaro.org wrote:
Hi Doug,
[snip]
I think you shall be able use MMC_CAP_NEEDS_POLL, to handle this
broken card detect mechanism. We even have a DT binding for that,
broken-cd.
I don't think this is possible, but let me explain why I think
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
Add initial device tree nodes for EXYNOS7 SoC.
Also, includes the dt-binding definitions for clock ids.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Thomas Abraham
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
This patch adds initial dts file for the Espresso board
based on Exynos7 from Samsung.
[snip]
+ mmc@1574 {
Please migrate this dts file to the reference-based syntax.
+
Hi Naveen,
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
This patchset supports new Exynos7 Samsung SoC based on Cortex-A57.
Exynos7 is a System-On-Chip (SoC) that is based on 64-bit
ARMv8 RISC processor.
A general issue with this series is that it introduces a very generic
name for a
On Wed 2014-08-27 12:11:55, Jaehoon Chung wrote:
Hi,
On 08/26/2014 07:19 PM, Pavel Machek wrote:
Hi!
Would you elaborate?
If I have a device like a phone, I may want to put one slot inside
phone for basic system, and offer second slot for user expansion
(initially empty).
if
On 27.08.2014 11:48, Naveen Krishna Chatradhi wrote:
By registers bits and offsets the 145xx PLL is similar to
pll_type pll_35xx. Also, 1460x PLL is similar to pll_type
pll_46xx.
Hence, reusing the functions defined for pll_35xx and pll_46xx
to support 145xx and 1460x PLLs respectively.
On Wednesday, August 27, 2014 4:53 PM, Bartlomiej Zolnierkiewicz wrote:
dwc3 driver is using the new Exynos5 SoC series USB DRD PHY driver
(PHY_EXYNOS5_USBDRD which selects GENERIC_PHY) as can be seen by
looking at the following commits:
7a4cf0fde054 (ARM: dts: Update DWC3 usb controller
On 27.08.2014 11:48, Naveen Krishna Chatradhi wrote:
This patch adds clock description for MUX, DIV, GATE and PLL
clocks available in TOPC, TOP0, TOP1, BUS0, BUS1, FSYS0, FSYS1,
CCORE, PERIC0, PERIC1, PERIS, DISP, G3D, MSCL and MFC blocks.
[snip]
+Phy clocks:
+
+There are several clocks
Hi Javier,
Am 27.08.2014 09:13, schrieb Javier Martinez Canillas:
On 08/27/2014 12:53 AM, Andreas Färber wrote:
+hsi2c_8 {
+ status = okay;
+ clock-frequency = 333000;
+
+ trackpad@4b {
+ compatible=atmel,maxtouch;
+ reg=0x4b;
+
Hello Andreas,
On 08/27/2014 03:11 PM, Andreas Färber wrote:
Hi Javier,
+ trackpad@4b {
+ compatible = atmel,maxtouch;
+ reg = 0x4b;
+ interrupt-parent = gpx1;
+ interrupts = 2 IRQ_TYPE_NONE;
+ pinctrl-names = default;
+
Some boards with multi platform support (e.g: Exynos based
Chromebooks) have an Atmel trackpad so enable support for
as a module will make easier for users.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1
This is a third version of the series that adds support
for the atmel trackpad found on the Exynos5420 Peach Pit.
The first version was [0] but I missunderstood the DT
bindings since I don't have documentation about this hw.
After the feedback provided by Nick Dyer and Yufeng Shen
I think I now
Many Exynos based Chromebooks have an Atmel trackpad so enable
support for it by default will make easier for users.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/configs/exynos_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Sjoerd Simons sjoerd.sim...@collabora.co.uk
The Peach Pit board has an Atmel maXTouch trackpad device.
Add the needed Device Tree nodes to support it.
This Device Tree change is based on the Chrome OS 3.8 tree
but adapted to use the mainline Atmel maXTouch DT binding.
Signed-off-by:
This series is based on master branch of Linus tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
I have tested this after adding few DT changes for exynos5250-snow and
exynos5420-peach-pit boards.
The V4 series of this particular patchset was also tested by:
Rahul Sharma
This patch does the following changes:
-- Use usleep_range instead of udelay.
-- Remove driver_private member from ptn3460 structure.
-- Make all possible functions and structures static.
-- Use dev_err for non-DRM errors.
-- Arrange header files
Assign the pointer to bridge ops structure(drm_bridge_funcs) in
the bridge driver itself, instead of passing it to drm_bridge_init.
This will allow bridge driver developer to pack bridge private
information inside the bridge object and pass only the drm-relevant
information to drm_bridge_init.
Use drm_bridge helpers to modify the driver to support
i2c driver model.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/bridge/Kconfig |6 +-
drivers/gpu/drm/bridge/ptn3460.c| 122 +--
drivers/gpu/drm/exynos/Kconfig
A set of helper functions are defined in this patch to make
bridge driver probe independent of the drm flow.
The bridge devices register themselves on a lookup table
when they get probed by calling drm_bridge_add.
The parent encoder driver waits till the bridge is available
in the lookup
Modify driver to support drm_bridge.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/exynos/Kconfig |1 +
drivers/gpu/drm/exynos/exynos_dp_core.c | 38 +++
drivers/gpu/drm/exynos/exynos_dp_core.h |1 +
3 files changed, 30
Add drm_panel calls to the driver to make the panel and
bridge work together in tandem.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/bridge/Kconfig |1 +
drivers/gpu/drm/bridge/ptn3460.c | 37 +
2 files changed, 38
Force bridge connector detection at the end of the bridge attach.
This is needed to detect the bridge connector early.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/bridge/ptn3460.c |3 +++
1 file changed, 3 insertions(+)
diff --git
Modify driver to support gpiod interface.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/bridge/ptn3460.c | 88 --
1 file changed, 36 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ptn3460.c
From: Vincent Palatin vpala...@chromium.org
This patch adds drm_bridge driver for parade DisplayPort
to LVDS bridge chip.
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Sean Paul seanp...@chromium.org
Signed-off-by:
Add documentation for DT properties supported by ps8622/ps8625
eDP-LVDS converter.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
.../devicetree/bindings/video/bridge/ps8622.txt| 20
1 file changed, 20 insertions(+)
create mode 100644
ps8622 eDP-LVDS converter bridge chip is from parade technologies
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
.../devicetree/bindings/vendor-prefixes.txt|1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
Move drm/bridge documentation to video/bridge.
Also, add proper documentation for gpios used by ptn3460.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
.../devicetree/bindings/drm/bridge/ptn3460.txt | 27
.../devicetree/bindings/video/bridge/ptn3460.txt |
On Wed, Aug 27, 2014 at 12:09:28PM +0100, Mark Rutland wrote:
On Wed, Aug 27, 2014 at 10:44:20AM +0100, Naveen Krishna Chatradhi wrote:
+ select HAVE_SMP
I may have missed something, but I didn't see any SMP support in this
series.
We don't even have HAVE_SMP defined for arm64 (just SMP,
Add DT nodes for ptn3460 bridge chip and panel.
Add backlight enable pin and backlight power supply for pwm-backlight.
Also add bridge phandle needed by dp to enable display on snow.
Note that, snow doesn't support chunghwa,claa101wb01 panel,
but still we choose to reuse the binding since
Add DT nodes for ps8622 bridge chip and panel.
Add backlight power supply for pwm-backlight.
Also add bridge phandle needed by dp to enable display on peach_pit.
Note that, peach_pit doesn't support chunghwa,claa101wb01 panel,
but still we choose to reuse the binding since chunghwa,claa101wb01
On Wed, Aug 27, 2014 at 11:42:31AM +0100, Mark Rutland wrote:
On Wed, Aug 27, 2014 at 10:44:18AM +0100, Naveen Krishna Chatradhi wrote:
+ cpus {
+ #address-cells = 2;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type =
On Wed, Aug 27, 2014 at 03:48:27PM +0100, Ajay Kumar wrote:
Add DT nodes for ptn3460 bridge chip and panel.
Add backlight enable pin and backlight power supply for pwm-backlight.
Also add bridge phandle needed by dp to enable display on snow.
Note that, snow doesn't support
Jaehoon,
On Tue, Aug 26, 2014 at 9:47 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Doug,
On 08/27/2014 01:14 PM, Doug Anderson wrote:
Jaehoon,
On Tue, Aug 26, 2014 at 8:48 PM, Jaehoon Chung jh80.ch...@samsung.com
wrote:
Hi, Doug,
On 08/26/2014 12:25 AM, Doug Anderson wrote:
Ulf,
On Wed, Aug 27, 2014 at 4:17 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
Now, we've got MMC_CAP_NEEDS_POLL, so dw_mmc will periodically be
called to check the card detect line, but with vmmc and vqmmc off. It
will be unable to return a sensible value without actually turning on
vmmc
Am 27.08.2014 13:02, schrieb Javier Martinez Canillas:
systemd needs control groups support to be enabled in the
kernel so let's enable it by default since is quite likely
that a user-space with systemd will be used.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
On Tue, Aug 26, 2014 at 01:37:41PM +0200, Javier Martinez Canillas wrote:
The max77802 driver reads the default operating mode (opmode)
set for regulators when enabled from the hardware registers.
Applied, thanks.
signature.asc
Description: Digital signature
Hi Baltlomiej,
On Wed, Aug 27, 2014 at 1:22 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
dwc3 driver is using the new Exynos5 SoC series USB DRD PHY driver
(PHY_EXYNOS5_USBDRD which selects GENERIC_PHY) as can be seen by
looking at the following commits:
7a4cf0fde054
On 26.08.2014 13:37, Javier Martinez Canillas wrote:
+ /*
+ * If the regulator is disabled and the system warm rebooted,
+ * the hardware reports OFF as the regulator operating mode.
+ * Default to operating mode NORMAL in that case.
+
On Wed, Aug 27, 2014 at 08:32:38PM +0200, Tomasz Figa wrote:
On 26.08.2014 13:37, Javier Martinez Canillas wrote:
+ /*
+* If the regulator is disabled and the system warm rebooted,
+* the hardware reports OFF as the regulator operating mode.
+
On 27.08.2014 20:37, Mark Brown wrote:
On Wed, Aug 27, 2014 at 08:32:38PM +0200, Tomasz Figa wrote:
On 26.08.2014 13:37, Javier Martinez Canillas wrote:
+ /*
+* If the regulator is disabled and the system warm rebooted,
+* the hardware reports OFF as the
On Wed, Aug 27, 2014 at 08:39:39PM +0200, Tomasz Figa wrote:
On 27.08.2014 20:37, Mark Brown wrote:
That's essentially the situation the patch is trying to fix - if we boot
and the regulator is off there's no way to figure out what the operating
mode would have been so we have to pick
On 27.08.2014 20:47, Mark Brown wrote:
On Wed, Aug 27, 2014 at 08:39:39PM +0200, Tomasz Figa wrote:
On 27.08.2014 20:37, Mark Brown wrote:
That's essentially the situation the patch is trying to fix - if we boot
and the regulator is off there's no way to figure out what the operating
mode
On Wed, Aug 27, 2014 at 08:52:49PM +0200, Tomasz Figa wrote:
On 27.08.2014 20:47, Mark Brown wrote:
I'm not convinced that's worth it - chances are that if anything changed
the mode it was a previously running Linux which will most likely be
doing the same things when it starts running
On 27.08.2014 21:15, Mark Brown wrote:
On Wed, Aug 27, 2014 at 08:52:49PM +0200, Tomasz Figa wrote:
On 27.08.2014 20:47, Mark Brown wrote:
I'm not convinced that's worth it - chances are that if anything changed
the mode it was a previously running Linux which will most likely be
doing the
Hi,
On Fri, Aug 22, 2014 at 06:59:00PM +0200, Bartlomiej Zolnierkiewicz wrote:
Hi,
This patch series removes the old Samsung USB PHY drivers that
got replaced by the new ones using the generic PHY layer.
Depends on:
- v3.17-rc1 branch of Linus' kernel
Changes since v1
Hi,
On Fri, Aug 22, 2014 at 06:59:05PM +0200, Bartlomiej Zolnierkiewicz wrote:
drivers/usb/phy/phy-samsung-usb[2,3] drivers got replaced by
drivers/phy/phy-samsung-usb[2,3] ones and the old common Samsung
USB PHY code is no longer used.
Signed-off-by: Bartlomiej Zolnierkiewicz
Hi,
On Wed, Aug 27, 2014 at 11:42:25PM +0530, Vivek Gautam wrote:
On Wed, Aug 27, 2014 at 1:22 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
dwc3 driver is using the new Exynos5 SoC series USB DRD PHY driver
(PHY_EXYNOS5_USBDRD which selects GENERIC_PHY) as can be seen by
On 27.08.2014 21:44, Mark Brown wrote:
On Wed, Aug 27, 2014 at 09:21:02PM +0200, Tomasz Figa wrote:
On 27.08.2014 21:15, Mark Brown wrote:
This is in the scenario where the previously running Linux changed the
mode to something other than normal and where the freshly booted Linux
can't
On Wed, Aug 27, 2014 at 09:58:55PM +0200, Tomasz Figa wrote:
On 27.08.2014 21:44, Mark Brown wrote:
The point is that if anything was setting the mode to something other
than normal it was almost certainly a previously running copy of Linux
and one would expect that if the mode does need
On 27.08.2014 22:25, Mark Brown wrote:
On Wed, Aug 27, 2014 at 09:58:55PM +0200, Tomasz Figa wrote:
On 27.08.2014 21:44, Mark Brown wrote:
The point is that if anything was setting the mode to something other
than normal it was almost certainly a previously running copy of Linux
and one
On Wed, Aug 27, 2014 at 10:41:42PM +0200, Tomasz Figa wrote:
On 27.08.2014 22:25, Mark Brown wrote:
Well, presumably the bootloader is going to run again even for a warm
reboot?
This is strange, but apparently it's not the case for the hardware which
this patch is supposed to fix or at
Hello Tomasz and Mark,
Sorry for not answering before but I'm on vacations until Sep, 5 and I
have limited access to my email.
On Wed, Aug 27, 2014 at 11:03 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
From what I know based on my experience with Samsung boards we used, the
opmodes of
On Wednesday, August 27, 2014 04:34:28 PM Viresh Kumar wrote:
On 27 August 2014 16:30, Mark Brown broo...@kernel.org wrote:
From: Mark Brown broo...@linaro.org
Since this is a platform driver and can be probed at any time we can't
annotate funtions in the probe path as __init, the code
Hi,
On 08/27/2014 07:27 PM, Andrzej Hajda wrote:
On 08/26/2014 07:00 AM, Joonyoung Shim wrote:
Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
In case of allocation errors some already allocated buffers
were not freed. The patch fixes it.
Signed-off-by: Andrzej Hajda
Hi,
On Wed, Aug 27, 2014 at 03:14:18PM +0530, Naveen Krishna Chatradhi wrote:
Add initial device tree nodes for EXYNOS7 SoC.
Also, includes the dt-binding definitions for clock ids.
Uh, no -- it just adds the dtsi.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Thomas
On Wed, Aug 27, 2014 at 03:15:40PM +0530, Naveen Krishna Chatradhi wrote:
The i2c-exynos5.c driver can be reused for the HSI2C controller
on Exynos7 SoCs from Samsung.
This patch adds the Kconfig dependency to choose i2c-exynos5.c
for CONFIG_ARCH_EXYNOS7.
Signed-off-by: Naveen Krishna
Hi,
On Wed, Aug 27, 2014 at 03:14:19PM +0530, Naveen Krishna Chatradhi wrote:
This patch adds initial dts file for the Espresso board
based on Exynos7 from Samsung.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas
Naveen,
On Wed, Aug 27, 2014 at 03:14:16PM +0530, Naveen Krishna Chatradhi wrote:
This patchset supports new Exynos7 Samsung SoC based on Cortex-A57.
Exynos7 is a System-On-Chip (SoC) that is based on 64-bit
ARMv8 RISC processor.
Your emails haven't threaded properly, so the series of patches
On Wed, Aug 27, 2014 at 03:16:35PM +0530, Naveen Krishna Chatradhi wrote:
From: Alim Akhtar alim.akh...@samsung.com
This patch enables upcoming exynos7 SoCs serial driver.
This also modifies various dependencies for Kconfig
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Cc: Greg
On Wed, Aug 27, 2014 at 03:50:21PM +0100, Catalin Marinas wrote:
On Wed, Aug 27, 2014 at 12:09:28PM +0100, Mark Rutland wrote:
On Wed, Aug 27, 2014 at 10:44:20AM +0100, Naveen Krishna Chatradhi wrote:
+ select HAVE_SMP
I may have missed something, but I didn't see any SMP support in
Hi,
On Fri, Aug 22, 2014 at 4:19 PM, Andreas Färber afaer...@suse.de wrote:
Hi,
s/Caibrate/Calibrate/
Sure, will rectify the title, thanks for pointing it out.
--
Best Regards
Vivek Gautam
Samsung RD Institute, Bangalore
India
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Dear Eduardo,
This patch is wrong. It is my mistake.
Please ignore only this patch because
the offset calculation of 'case 0' is different from 'case 2'.
Best Regards,
Chanwoo Choi
On 08/26/2014 10:31 AM, Chanwoo Choi wrote:
This patch remove simply duplicate code when reading triminfo
Hi Jingoo,
On Wed, Aug 27, 2014 at 7:28 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, August 21, 2014 11:55 PM, Vivek Gautam wrote:
Adding phy calibrate callback, which facilitates setting certain
PHY settings post initialization of the PHY controller.
Exynos5420 and Exynos5800
Dear Andrew,
On 08/27/2014 06:31 AM, Andrew Morton wrote:
On Mon, 25 Aug 2014 09:57:33 +0900 Chanwoo Choi cw00.c...@samsung.com wrote:
Dear Andrew,
On 08/23/2014 05:42 AM, Andrew Morton wrote:
On Tue, 12 Aug 2014 11:01:07 +0900 y...@samsung.com wrote:
This patch define s3c_rtc structure
On Wed, Aug 27, 2014 at 9:19 PM, Doug Anderson diand...@google.com wrote:
Jaehoon,
On Tue, Aug 26, 2014 at 9:47 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Doug,
On 08/27/2014 01:14 PM, Doug Anderson wrote:
Jaehoon,
On Tue, Aug 26, 2014 at 8:48 PM, Jaehoon Chung jh80.ch...@samsung.com
On Wed, Aug 27, 2014 at 8:31 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Wed, Aug 27, 2014 at 03:48:27PM +0100, Ajay Kumar wrote:
Add DT nodes for ptn3460 bridge chip and panel.
Add backlight enable pin and backlight power supply for pwm-backlight.
Also add bridge phandle needed by dp to
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