Am Dienstag, 9. Juni 2015, 13:04:41 schrieb Javier Martinez Canillas:
Hello,
This is a v7 of a series that adds support for multiple EC in a system
and also for the protocol version 3 that is used on newer ECs.
Most patches were taken from the downstream ChromiumOS v3.14 tree with
fixes
W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
Add proper gate clock for the Analog to Digital Converter (ADC) on
Exynos4x12.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c | 3 +++
include/dt-bindings/clock/exynos4.h | 5 -
Am 11.06.2015 um 12:17 schrieb Alexander Holler:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
hol...@ahsoftware.de wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
i2c host comes out, probes the regulator driver, regulator driver
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler hol...@ahsoftware.de wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
i2c host comes out, probes the regulator driver, regulator driver
probes and then the regulator_get() call returns.
This
Am 11.06.2015 um 13:24 schrieb Alexander Holler:
Am 11.06.2015 um 12:17 schrieb Alexander Holler:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
hol...@ahsoftware.de wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
i2c host comes out,
Usage of labels instead of full paths reduces possible mistakes when
overriding nodes.
Signed-off-by: Krzysztof Kozlowski k.kozlowsk...@gmail.com
---
This one was missed during last label refactor. Rebased on Kukjin's
for-next.
Tested by comparison of DTB and decompiled DTS.
---
On 2015년 06월 09일 12:19, Hyungwon Hwang wrote:
exynos_dsi_host_transfer() can be called through a panel driver while
DSI is turning down. It is possible because the function checks only
whether DSI is initialized or not, and there is a moment which DSI is
set by uninitialized, but DSI is still
On 2015년 06월 09일 12:45, Hyungwon Hwang wrote:
Config depends on the opreation. So it must be referenced by an
operation id, not a property id.
Applied.
Thanks,
Inki Dae
Signed-off-by: Hyungwon Hwang human.hw...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 3 +--
1 file
On 2015년 06월 09일 12:45, Hyungwon Hwang wrote:
FIMC GSC driver can calculate the offset of planes. So there are
use cases which IPP receives just one GEM handle of an image with
multiple plane. This patch extends ipp_validate_mem_node() to validate
this case.
Applied.
Thanks,
Inki Dae
On 2015년 06월 04일 05:17, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Check error and call DRM_ERROR if clk_prepare_enable() fails.
Applied.
Thanks,
Inki Dae
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
Hi Joonyoung,
2015-06-11 Joonyoung Shim jy0922.s...@samsung.com:
On 06/10/2015 10:36 PM, Gustavo Padovan wrote:
Hi Marek,
2015-06-10 Marek Szyprowski m.szyprow...@samsung.com:
Hello,
On 2015-06-01 17:04, Gustavo Padovan wrote:
From: Gustavo Padovan
On 2015년 06월 08일 19:15, Andrzej Hajda wrote:
Code registering different drivers and simple platform devices was dispersed
across multiple sub-modules. This patch moves it to one place. As a result
initialization code is shorter and cleaner and should simplify further
development.
Applied all
2015-06-11 21:40 GMT+09:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
Hello Krzysztof,
On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
Add
Hello Heiko,
On 06/11/2015 01:50 PM, Heiko Stübner wrote:
Am Dienstag, 9. Juni 2015, 13:04:41 schrieb Javier Martinez Canillas:
Hello,
This is a v7 of a series that adds support for multiple EC in a system
and also for the protocol version 3 that is used on newer ECs.
Most patches were
Hello Krzysztof,
On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
Add proper gate clock for the Analog to Digital Converter (ADC) on
Exynos4x12.
Signed-off-by: Krzysztof Kozlowski
Hello Krzysztof,
On Thu, Jun 11, 2015 at 2:40 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
Hello Krzysztof,
On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
W dniu 11.06.2015 o 17:26,
On 06/11/2015 12:17 PM, Alexander Holler wrote:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler hol...@ahsoftware.de
wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
i2c host comes out, probes the regulator driver, regulator driver
W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
Hello Krzysztof,
On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
Add proper gate clock for the Analog to Digital Converter (ADC) on
On Thu, Jun 11, 2015 at 12:17 PM, Alexander Holler hol...@ahsoftware.de wrote:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler hol...@ahsoftware.de
wrote:
You would end up with the same problem of deadlocks as currently, and you
would still
Kukjin Kim kg...@kernel.org writes:
Hi,
Here is another Samsung DT updates for v4.2 but this is based on
v4.1-rc6 + previous tags/samsung-dt-3 because this touches all of exynos
DT stuff and some fixes have been merged until -rc6...
In the future, it would be helpful to describe what fixes
Kukjin Kim kg...@kernel.org writes:
Hi,
Here is Samsung mach updates for v4.2 and this is based on v4.1-rc4
because of dependencies with previous Samsung fixes during -rc
Please pull and if any problems, please let me know.
Thanks,
Kukjin
The following changes since commit
Kukjin Kim kg...@kernel.org writes:
Hi,
Here is Samsung mach updates for v4.2 and this is based on v4.1-rc4
because of dependencies with previous Samsung fixes during -rc
Please pull and if any problems, please let me know.
Thanks,
Kukjin
The following changes since commit
Kukjin Kim kg...@kernel.org writes:
Hi,
Here is 2nd defconfig updates for v4.2 but actually just one patch for
Samsung updates for multi_v7_defconfig. Please pull or apply the patch
directly, anyway I'm fine either way.
Note that this is based on arm-soc/next/defconfig to avoid useless
Hi,
Am Dienstag, 21. April 2015, 15:17:51 schrieb Bartlomiej Zolnierkiewicz:
Add cluster regulator support as a preparation to adding
generic arm_big_little_dt cpufreq_dt driver support for
ODROID-XU3 board. This allows arm_big_little[_dt] driver
to set not only the frequency but also the
W dniu 12.06.2015 o 06:48, Kevin Hilman pisze:
Hi Krzysztof,
On Sat, Jun 6, 2015 at 3:02 AM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
Extend the Exynos entry to ARM64 device tree sources.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Cc:
Kukjin Kim kg...@kernel.org writes:
The following changes since commit b787f68c36d49bb1d9236f403813641efa74a031:
Linux 4.1-rc1 (2015-04-26 17:59:10 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
tags/samsung-dt-3
Hi Krzysztof,
On Sat, Jun 6, 2015 at 3:02 AM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
Extend the Exynos entry to ARM64 device tree sources.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Kukjin Kim
Hello Krzysztof,
On Fri, Jun 12, 2015 at 3:53 AM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
The TSADC gate clock was used in Exynos4x12 DTSI for exynos-adc driver.
However TSADC is present only on Exynos4210 so on Trats2 board (with
Exynos4412 SoC) the exynos-adc driver could not be
On 12.06.2015 14:43, Javier Martinez Canillas wrote:
The Exynos interrupt combiner IP loses its state when the SoC enters
into a low power state during a Suspend-to-RAM. This means that if a
IRQ is used as a source, the interrupts for the devices are disabled
when the system is resumed from a
The Exynos interrupt combiner IP loses its state when the SoC enters
into a low power state during a Suspend-to-RAM. This means that if a
IRQ is used as a source, the interrupts for the devices are disabled
when the system is resumed from a sleep state so are not triggered.
Save the interrupt
Hello,
On 2015-06-11 09:07, Joonyoung Shim wrote:
With atomic modesetting all the control for CRTC, Planes, Encoders and
Connectors should come from DRM core, so the driver is not allowed to
enable or disable planes from inside the crtc_enable()/disable() call.
But it needs to disable planes
On 06/10/2015 10:36 PM, Gustavo Padovan wrote:
Hi Marek,
2015-06-10 Marek Szyprowski m.szyprow...@samsung.com:
Hello,
On 2015-06-01 17:04, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Hi,
Here goes the full support for atomic modesetting on exynos.
Hello Peter,
On 06/11/2015 12:51 AM, Peter Chubb wrote:
Javier == Javier Martinez Canillas javier.marti...@collabora.co.uk
writes:
Javier The Exynos interrupt combiner IP looses its state when the SoC
s/looses/loses/
Thanks for pointing out the
With atomic modesetting all the control for CRTC, Planes, Encoders and
Connectors should come from DRM core, so the driver is not allowed to
enable or disable planes from inside the crtc_enable()/disable() call.
But it needs to disable planes with crtc_disable in exynos hw driver
internally.
On Thu, Jun 11, 2015 at 4:35 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
W dniu 12.06.2015 o 06:48, Kevin Hilman pisze:
Hi Krzysztof,
On Sat, Jun 6, 2015 at 3:02 AM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
Extend the Exynos entry to ARM64 device tree sources.
Cc:
The TSADC gate clock was used in Exynos4x12 DTSI for exynos-adc driver.
However TSADC is present only on Exynos4210 so on Trats2 board (with
Exynos4412 SoC) the exynos-adc driver could not be probed:
ERROR: could not get clock /adc@126C:adc(0)
exynos-adc 126c.adc: failed getting
On 04/06/15 01:05, Michael Turquette wrote:
One small thing: clk-next isn't considered stable. I had some stuff in
there (Stephen's amba assigned-clock-rates patch) which I had to pull
out (no ACK from maintainer) and it crept back in because this PR was
based on top of it. No big deal
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler hol...@ahsoftware.de wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
i2c host comes out, probes the regulator driver, regulator driver
probes and then the regulator_get() call returns.
This requires instrumentation on anything providing
On Wed, Jun 10, 2015 at 12:19 PM, Tomeu Vizoso
tomeu.viz...@collabora.com wrote:
On 10 June 2015 at 09:30, Linus Walleij linus.wall...@linaro.org wrote:
regulator_get(...) - not available, so:
- identify target regulator provider - this will need instrumentation
- probe it
It then turns out
Add proper gate clock for the Analog to Digital Converter (ADC) on
Exynos4x12.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c | 3 +++
include/dt-bindings/clock/exynos4.h | 5 -
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git
The TSADC gate clock is present only in Exynos4210. It should not be
added to exynos4x12.dtsi because the register controlling it is reserved
on Exynos4x12.
Instead, the Analog to Digital Converter of Exynos4x12 uses PCLK_ADC
gate clock from different register.
By using proper clock this
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime
We allocate sizeof(-grp) which is 5 bytes but then we pass 4 to the
snprintf() so the last 'p' char is truncated away.
The kzalloc() can be made into kmalloc() since we are going to fill
the whole buffer. But I know that Walter Harms is going to grumble if I
don't use kasprintf(). :P And also
Am 11.06.2015 um 14:30 schrieb Linus Walleij:
On Thu, Jun 11, 2015 at 12:17 PM, Alexander Holler hol...@ahsoftware.de wrote:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler hol...@ahsoftware.de
wrote:
You would end up with the same problem of
Hi,
On Mon, Jun 8, 2015 at 8:47 PM, Alan Stern st...@rowland.harvard.edu wrote:
On Mon, 8 Jun 2015, Vivek Gautam wrote:
Facilitate getting required 3.3V and 1.0V VDD supply for
EHCI controller on Exynos.
For example, patches for regulators' nodes:
c8c253f ARM: dts: Add regulator entries
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