are available in the git repository at:
>
> https://github.com/krzk/linux.git tags/samsung-dt64-4.4
>
> for you to fetch changes up to 235c8e96f54a76bee201a7c86620c351a30b1ac6:
>
> arm64: dts: Add BUS1 instance
On 11/19/14 16:56, Abhilash Kesavan wrote:
> From: Pankaj Dubey
>
> Exynos7 has a similar serial controller to that present in older Samsung
> SoCs. To re-use the existing serial driver on Exynos7 we need to have
> SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is
From: Alim Akhtar
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos7 SoC.
Signed-off-by: Alim Akhtar
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin
On Tue, Sep 02, 2014 at 04:09:08PM +0530, Vivek Gautam wrote:
> Hi,
>
>
> On Fri, Aug 29, 2014 at 12:18 AM, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
> >> Exynos7 also has a separate special gate clock going to the IP
&g
On Tue, Sep 02, 2014 at 11:39:08AM +0100, Vivek Gautam wrote:
> Hi,
>
>
> On Fri, Aug 29, 2014 at 12:18 AM, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
> >> Exynos7 also has a separate special gate clock going to the IP
&g
On Wed, Nov 05, 2014 at 10:15:36AM +, Chander Kashyap wrote:
> Exynos7 has core power down state where cores can be powered off
> independently.
> This patch adds support for this state.
>
> Entry latency for the core power down is calculated as follows:
> 1. Time diff
Exynos7 supports multiple idle states. Core power down is one such
idle state, where cores can be powered off independently.
This patch adds support for core power down idle state.
Entry latency for core power down idle state is calculated as follows:
1. Time difference is measured between
Chander Kashyap wrote:
>
> Exynos7 supports multiple idle states. Core power down is one such
> idle state, where cores can be powered off independently.
>
> This patch adds support for core power down idle state.
>
> Entry latency for core power down idle state is calcu
On Thu, Nov 06, 2014 at 03:21:49PM +0530, Padmavathi Venna wrote:
> Exynos7 SPI controller supports only the auto Selection of
> CS toggle mode and Exynos7 SoC includes six SPI controllers.
> Add support for these changes in Exynos7 SPI controller driver.
Could you give a bit more detai
>
>>>> Thanks for the patch.
>>> Thanks for reviewing the patch.
>>>
>>>> On 02/26/2015 04:24 PM, Ajay Kumar wrote:
>>>>> Modify the exynos HDMI driver to support Exynos7 HDMI 1.4.
>>>>> * Add phy configs for Exynos7.
>
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
> Add initial device tree nodes for EXYNOS7 SoC.
> Also, includes the dt-binding definitions for clock ids.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Cc: Thomas Abraham
> Cc:
This patch fixes some of the bit field and
update the TOPC block clock as per the latest UM.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk
Hi Tomasz,
On Tue, Oct 14, 2014 at 6:56 AM, Anton Tikhomirov
wrote:
> Hello,
>
>> Hi Anton,
>>
>> On 13.10.2014 06:54, Anton Tikhomirov wrote:
>> > Hi Vivek,
>> >
>> >> Exynos7 also has a separate special gate clock going to the IP
>&g
From: Naveen Krishna Ch
This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Linus Walleij
---
.../bindings/pinctrl/samsung
t;>
>> Linux 4.3-rc1 (2015-09-12 16:35:56 -0700)
>>
>> are available in the git repository at:
>>
>> https://github.com/krzk/linux.git tags/samsung-dt64-4.4
>>
>> for you to fetch changes up to 235c8e96f54a76bee201a7c86620c351a
Hi Krzysztof,
On 09/10/2015 09:38 AM, Krzysztof Kozlowski wrote:
On 04.09.2015 20:37, Alim Akhtar wrote:
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 116
This updates CMU TOP1 block clock as per latest UM.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
index
Hi,
On Fri, Aug 29, 2014 at 12:18 AM, Mark Rutland wrote:
> On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
>> Exynos7 also has a separate special gate clock going to the IP
>> apart from the usual AHB clock. So add support for the same.
>>
>>
From: Naveen Krishna Ch
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
---
arch/arm64/Kconfig |2
On 11/18/14 03:59, Greg KH wrote:
> On Mon, Nov 17, 2014 at 10:14:51AM +0530, Abhilash Kesavan wrote:
>> From: Pankaj Dubey
>>
>> Exynos7 has a similar serial controller to that present in older Samsung
>> SoCs. To re-use the existing serial driver
This patchset adds code to the i2c-exynos5.c driver to support
the HSI2C H/W available on Exynos7 SoC.
Also, modifies the Kconfig dependencies to be able to select
for ARCH_EXYNOS7 platform.
The following patches are tested based on Kgene's for-next tree.
https://git.kernel.org/cgit/linux/k
Hello,
> Hi Anton,
>
> On 13.10.2014 06:54, Anton Tikhomirov wrote:
> > Hi Vivek,
> >
> >> Exynos7 also has a separate special gate clock going to the IP
> >> apart from the usual AHB clock. So add support for the same.
> >
> > As we discussed
, 2015 at 4:18 PM, Andrzej Hajda wrote:
>>>>> Hi Ajay,
>>>>>
>>>>> Thanks for the patch.
>>>> Thanks for reviewing the patch.
>>>>
>>>>> On 02/26/2015 04:24 PM, Ajay Kumar wrote:
>>>>>> Modify the
Hi Tomasz,
On 27 August 2014 17:00, Tomasz Figa wrote:
> Hi Naveen,
>
> Please see my comments inline.
>
> On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
>> Add initial device tree nodes for EXYNOS7 SoC.
>> Also, includes the dt-binding definitions for clo
On Fri, Nov 7, 2014 at 5:28 PM, Lorenzo Pieralisi
wrote:
> On Wed, Nov 05, 2014 at 01:15:31PM +, Chander Kashyap wrote:
>> Exynos7 has core power down state where cores can be powered off
>> independently.
>
> "...has a core power down idle state..."
>
&
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
---
drivers/clk/samsung/clk-exynos7.c | 107 +++
include/dt-bindings/clock/exynos7-clk.h | 24 ++-
2 files changed
Hi Arnd, Olof, Kevin
Please pull this branch for exynos7 SoC into arm-soc.
Note Greg agreed to upstream via arm-soc tree.
Thanks,
Kukjin
The following changes since commit f114040e3ea6e07372334ade75d1ee0775c355e1:
Linux 3.18-rc1 (2014-10-19 18:08:38 -0700)
are available in the git
From: Naveen Krishna Ch
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
Cc: Thomas Abraham
---
arch
From: Naveen Krishna Ch
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
---
arch/arm64/Kconfig
From: Naveen Krishna Ch
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
---
arch/arm64/Kconfig
Hi Anton,
On 13.10.2014 06:54, Anton Tikhomirov wrote:
> Hi Vivek,
>
>> Exynos7 also has a separate special gate clock going to the IP
>> apart from the usual AHB clock. So add support for the same.
>
> As we discussed before, Exynos7 SoCs have 7 clocks to be controlled
On Wed, Nov 5, 2014 at 4:42 PM, Lorenzo Pieralisi
wrote:
> On Wed, Nov 05, 2014 at 10:15:36AM +, Chander Kashyap wrote:
>> Exynos7 has core power down state where cores can be powered off
>> independently.
>> This patch adds support for this state.
>>
>> Entr
On Wed, Nov 05, 2014 at 01:15:31PM +, Chander Kashyap wrote:
> Exynos7 has core power down state where cores can be powered off
> independently.
"...has a core power down idle state..."
> This patch adds support for this state.
"...for this idle state."
>
T.
>>> * DECON-EXT supports only H/w Triggered COMMAND mode.
>>> * DECON-EXT supports only one DMA window(window 1), so modify
>>> all window management routines to support 2 windows of DECON-INT
>>> and 1 window of DECON-EXT.
>>>
>>> Signed
Corrects the CMU_TOPC block clock name as per user manual.
This also adds few of the missing gate clocks of topc block.
This does not change any functionalies.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 90 +++
include/dt-bindings
Hi Mark,
On 27 August 2014 16:12, Mark Rutland wrote:
> Hi Naveen,
>
> On Wed, Aug 27, 2014 at 10:44:18AM +0100, Naveen Krishna Chatradhi wrote:
>> Add initial device tree nodes for EXYNOS7 SoC.
>> Also, includes the dt-binding definitions for clock ids.
>
> Fallout
rds,
Krzysztof
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c | 24 +++-
> 1 file changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-exynos7.c
> b/drivers/clk/samsung/clk-exynos7.c
> index c
This patch rename CMU_TOP1 clocks names to match with user manual.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 50 -
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk
This patch renames CMU_TOP1 clocks names to match with user manual.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 50 -
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk
On Mon, Sep 1, 2014 at 11:14 AM, Abhilash Kesavan
wrote:
> Hi Jaehoon,
>
> +Prabu Thangamuthu
>
> On Fri, Aug 29, 2014 at 4:14 PM, Jaehoon Chung wrote:
>> Hi, Abhilash.
>>
>> On 08/28/2014 10:18 PM, Yuvaraj Kumar C D wrote:
>>> From: Abhilash Kesavan
>> On Fri, Aug 29, 2014 at 4:14 PM, Jaehoon Chung
>> wrote:
>>> Hi, Abhilash.
>>>
>>> On 08/28/2014 10:18 PM, Yuvaraj Kumar C D wrote:
>>>> From: Abhilash Kesavan
>>>>
>>>> The Exynos7 has a DWMMC controller (v2.70a) which i
On 19.10.2015 18:58, Alim Akhtar wrote:
> This patch add syscon-reboot node to reboot exynos7 based SoCs.
>
> Signed-off-by: Alim Akhtar
> ---
> arch/arm64/boot/dts/exynos/exynos7.dtsi |7 +++
> 1 file changed, 7 insertions(+)
Looks good, thanks!
Reviewed-by: K
; Signed-off-by: Alim Akhtar
> ---
> This patch should go in after driver side changes [1] lands.
> [1]->
> https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg47736.html
>
> arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 349
> ++
es has dependency on
>>>> a) "[PATCH v7 0/7] Enable support for Samsung Exynos7 SoC"
>>>>http://www.spinics.net/lists/linux-samsung-soc/msg38734.html
>>>> b) "[GIT PULL] Samsung clock changes for 3.19" - specifically the clock dt
>>&g
control for Exynos5433 using common clk framework
This patchst is based on Exynos7 patchset[1] because Exynos5433 has similiar
feature with Exynos7. Exynos7 did already specify the dependent patchset list.
This patchset has the dependency as following list:
: The Exynos7 patchset[1] specified dependent
From: Naveen Krishna Chatradhi
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Chatradhi
Signed-off-by: Abhilash Kesavan
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
Cc: Thomas Abraham
---
arch/arm64/Kconfig
Hi Abhilash,
On Sat, Sep 13, 2014 at 2:20 PM, Abhilash Kesavan wrote:
> From: Naveen Krishna Chatradhi
>
> Add intial pin configuration nodes for EXYNOS7.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Signed-off-by: Abhilash Kesavan
> Cc: Rob Herring
> Cc: Catalin Ma
Hi Abhilash,
On Sat, Sep 13, 2014 at 2:20 PM, Abhilash Kesavan wrote:
> From: Naveen Krishna Chatradhi
>
> Add intial pin configuration nodes for EXYNOS7.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Signed-off-by: Abhilash Kesavan
> Cc: Rob Herring
> Cc: Catalin Ma
Hi Sylwester,
On 12/22/14, Sylwester Nawrocki wrote:
> Hi,
>
> On 19/12/14 14:23, Padmavathi Venna wrote:
>> Add required clk support for I2S,PCM amd SPDIF
>
> There is a non-trivial conflict with the MSCL CMU patch, could you
> please resend rebased onto my exynos7 bra
Hi,
On Mon, Oct 13, 2014 at 01:54:59PM +0900, Anton Tikhomirov wrote:
> Hi Vivek,
>
> > Exynos7 also has a separate special gate clock going to the IP
> > apart from the usual AHB clock. So add support for the same.
>
> As we discussed before, Exynos7 SoCs have 7 cloc
From: Naveen Krishna Ch
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
Cc: Thomas Abraham
From: Naveen Krishna Ch
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Tomasz Figa
Cc: Linus Walleij
---
arch/arm64/boot/dts
From: Naveen Krishna Ch
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
---
arch/arm64/boot
From: Naveen Krishna Ch
Add initial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
---
arch/arm64
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 116 +++
include/dt-bindings/clock/exynos7-clk.h | 24 ++-
2 files changed, 138 insertions(+), 2 deletions
Hi Padma,
On Fri, Dec 19, 2014 at 6:53 PM, Padmavathi Venna wrote:
> Add clock support for 5 SPI channels.
>
> Signed-off-by: Padmavathi Venna
> ---
> drivers/clk/samsung/clk-exynos7.c | 73
> +++
> include/dt-bindings/clock
Hi Vivek,
Please see my comments below.
2014-11-24 22:02 GMT+09:00 Vivek Gautam :
> USB and Power regulator on Exynos7 require gpios available
> in BUS1 pin controller block.
> So adding the BUS1 pinctrl support.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Vivek G
Exynos7 SoC has a Watchdog for Atlas (A57) cores
This patch adds support for the Atlas watchdog.
Signed-off-by: Naveen Krishna Chatradhi
Cc: Wim Van Sebroeck
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |1 +
drivers/watchdog/s3c2410_wdt.c | 11
On 10.09.2015 17:44, Alim Akhtar wrote:
> This adds some of the missing GATE clocks of CMU_TOPC block.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c | 27 +++
> include/dt-bindings/clock/exynos7-clk.h | 13 ++
s of DECON-INT
>>>> and 1 window of DECON-EXT.
>>>>
>>>> Signed-off-by: Ajay Kumar
>>>> ---
>>>> .../devicetree/bindings/video/exynos7-decon.txt|8 +-
>>>> drivers/gpu/drm/exynos/exynos7_drm_decon.c | 22
Add clock support for 5 SPI channels.
Signed-off-by: Padmavathi Venna
---
drivers/clk/samsung/clk-exynos7.c | 73 +++
include/dt-bindings/clock/exynos7-clk.h | 22 -
2 files changed, 93 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung
From: Abhilash Kesavan
The Exynos7 has a DWMMC controller (v2.70a) which is different from
prior versions. This patch adds new compatible strings for exynos7.
This patch also fixes the CLKSEL register offset on exynos7.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Yuvaraj Kumar C D
.
This also adds xxx_FSYS11 to be saved/restore during s2r cycles.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
On 28.08.2015 20:25, Alim Akhtar wrote:
> This adds BUS1 instance pinctrl for exynos7 soc.
>
> Signed-off-by: Alim Akhtar
> ---
> arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 111
> +++
> arch/arm64/boot/dts/exynos/exynos7.dtsi |7
On 04.09.2015 20:37, Alim Akhtar wrote:
> This patch rename CMU_PERIC0 clocks names to match with user manual.
> And also adds missing gate clock for aclk_peric0_66.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c | 12
> incl
On 04.09.2015 20:37, Alim Akhtar wrote:
> This patch rename CMU_PERIC1 clocks names to match with user manual.
> And also adds missing gate clock for aclk_peric1_66.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exyn
On 04.09.2015 20:37, Alim Akhtar wrote:
> This patch rename CMU_PERIS clocks names to match with user manual.
> And also adds missing gate clock for aclk_peris_66.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c |7 +--
> include/dt-b
On 04.09.2015 20:37, Alim Akhtar wrote:
> This patch rename CMU_FSYS0 clocks names to match with user manual.
> And also adds missing gate clock for aclk_fsys0_200.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c | 24 ++--
On 04.09.2015 20:37, Alim Akhtar wrote:
> This patch rename CMU_FSYS1 clocks names to match with user manual.
> And also adds missing gate clock for aclk_fsys1_200.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c | 16 ++--
>
On Tue, Sep 16, 2014 at 03:03:17PM +0530, Naveen Krishna Chatradhi wrote:
> The HSI2C module on Exynos7 differs in the transfer status
> bits. Transfer status bits were moved to INT_ENABLE and
> INT_STATUS registers
>
> This patch adds support for the HSI2C module on Exynos7.
>
From: Pankaj Dubey
Exynos7 has a similar serial controller to that present in older Samsung
SoCs. To re-use the existing serial driver on Exynos7 we need to have
SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
possible because these symbols are dependent on PLAT_SAMSUNG
From: Pankaj Dubey
Exynos7 has a similar serial controller to that present in older Samsung
SoCs. To re-use the existing serial driver on Exynos7 we need to have
SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
possible because these symbols are dependent on PLAT_SAMSUNG
On 11/22/14 17:40, Kishon Vijay Abraham I wrote:
>
> On Friday 21 November 2014 08:41 PM, Felipe Balbi wrote:
>> On Fri, Nov 21, 2014 at 07:05:43PM +0530, Vivek Gautam wrote:
>>> The series has dependency on
>>> a) "[PATCH v7 0/7] Enable support f
On Wed, Aug 27, 2014 at 03:17:11PM +0530, Naveen Krishna Chatradhi wrote:
> Exynos7 SoC has a Watchdog for Atlas (A57) cores
> This patch adds support for the Atlas watchdog.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Cc: Wim Van Sebroeck
Reviewed-by: Guenter Roeck
> ---
From: Pankaj Dubey
Exynos7 has a similar serial controller to that present in older Samsung
SoCs. To re-use the existing serial driver on Exynos7 we need to have
SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
possible because these symbols are dependent on PLAT_SAMSUNG
bogus and has to
be fixed :) .
Best regards,
Krzysztof
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/samsung/clk-exynos7.c | 15 ---
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-exynos7.c
> b/drivers/c
-nodes.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Alim Akhtar
---
This patch should go in after driver side changes [1] lands.
[1]->
https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg47736.html
arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 349 +++
Hi Krzysztof,
On 11/16/2015 07:06 AM, Krzysztof Kozlowski wrote:
The ARMv8 Exynos family SoCs in Linux kernel are currently:
- Exynos5433 (controlled by ARCH_EXYNOS),
- Exynos7 (controlled by ARCH_EXYNOS7).
It duplicates Kconfig symbols unnecessarily, so consolidate them into
one
Hi Lorenzo,
On Wed, Oct 15, 2014 at 2:30 PM, Lorenzo Pieralisi
wrote:
> On Wed, Oct 15, 2014 at 07:35:20AM +0100, Chander Kashyap wrote:
>> Exynos7 has core power down state where cores can be powered off
>> independently.
>> This patch adds support for this state.
>
>
>
>>> On Fri, Aug 29, 2014 at 4:14 PM, Jaehoon Chung
>>> wrote:
>>>> Hi, Abhilash.
>>>>
>>>> On 08/28/2014 10:18 PM, Yuvaraj Kumar C D wrote:
>>>>> From: Abhilash Kesavan
>>>>>
>>>>> The Exynos7 ha
>>>
>>>> +Prabu Thangamuthu
>>>>
>>>> On Fri, Aug 29, 2014 at 4:14 PM, Jaehoon Chung
>>>> wrote:
>>>>> Hi, Abhilash.
>>>>>
>>>>> On 08/28/2014 10:18 PM, Yuvaraj Kumar C D wrote:
>>>>>>
sz's mail id, as the earlier samsung one is not valid now.
>>> Also giving a Tested-by
>>>
>>>> On Mon, Sep 1, 2014 at 11:14 AM, Abhilash Kesavan
>>>> wrote:
>>>>> Hi Jaehoon,
>>>>>
>>>>> +Prabu Thangamuthu
>&g
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar
---
This patch has a dependency on [1]
[1]->
https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg46122.html
drivers/clk/samsung/clk-exynos7.c |
2015-08-28 18:28 GMT+09:00 Alim Akhtar :
> Adding required mux/div/gate clocks for UFS controller
> present on Exynos7.
>
> Signed-off-by: Alim Akhtar
> ---
> This patch has a dependency on [1]
> [1]->
> https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org
On Fri, Jan 9, 2015 at 5:18 PM, Vivek Gautam wrote:
> Hi Padma,
>
>
> On Fri, Dec 19, 2014 at 6:53 PM, Padmavathi Venna wrote:
>> Add clock support for 5 SPI channels.
>>
>> Signed-off-by: Padmavathi Venna
>> ---
>> driv
From: Naveen Krishna Ch
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
---
arch/arm64/boot
From: Naveen Krishna Ch
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Abhilash Kesavan
Reviewed-by: Thomas Abraham
Tested-by: Thomas Abraham
Acked-by: Tomasz Figa
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
---
arch/arm64/boot
On Sun, Mar 1, 2015 at 5:21 PM, Abhilash Kesavan wrote:
> The alive pin controller on exynos7 does not support external gpio
> interrupts. Hence, remove the eint_gpio_init call-back for it. This
> fixes the following error message seen during exynos7 boot-up:
> "samsung-pinctrl
On Sun, Mar 1, 2015 at 5:21 PM, Abhilash Kesavan wrote:
> The alive pin controller on exynos7 does not support external gpio
> interrupts. Hence, remove the eint_gpio_init call-back for it. This
> fixes the following error message seen during exynos7 boot-up:
> "samsung-pinctrl
On Wed, Aug 27, 2014 at 11:48 AM, Naveen Krishna Chatradhi
wrote:
> This patch adds driver data for Exynos7
> to pinctrl-exynos driver. Exynos7 includes 229 multi-functional
> input/output ports. There are 40 general port groups.
>
> Signed-off-by: Naveen Krishna Chatradhi
&g
; +
Please move the aliases from the exynos7.dtsi file into the
exynos7-espresso.dts file, and only list the ones that are
present, starting with alias 0, like
aliases {
serial0 = &serial_2;
};
If the machine has only one serial port, it should be the first
al
rst manual. Please describe it more, what exactly
> is being fixed and updated to latest UM.
>
Ok, will add details and update the commit message.
> Best regards,
> Krzysztof
>
>>
>> Signed-off-by: Alim Akhtar
>> ---
>> drivers/clk/samsung/clk-exynos7.c | 24 +
This patch rename CMU_TOP0 clocks names to match with user manual.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 67 -
1 file changed, 37 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk
This patch renames CMU_TOP0 clocks names to match with user manual.
Signed-off-by: Alim Akhtar
---
drivers/clk/samsung/clk-exynos7.c | 67 -
1 file changed, 37 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk
Hi, Abhilash.
On 08/28/2014 10:18 PM, Yuvaraj Kumar C D wrote:
> From: Abhilash Kesavan
>
> The Exynos7 has a DWMMC controller (v2.70a) which is different from
> prior versions. This patch adds new compatible strings for exynos7.
> This patch also fixes the CLKSEL register of
MON_CLK_SAMSUNG
>> + select HAVE_S3C_RTC if RTC_CLASS
>> + select PINCTRL
>> + select PINCTRL_EXYNOS
>> +
>> + help
>> + This enables support for Samsung Exynos5433 SoC family
>> +
>> config ARCH_EXYNOS7
>> boo
Hi Kukjin,
On Wed, Nov 19, 2014 at 12:58 PM, Kukjin Kim wrote:
> On 11/18/14 03:59, Greg KH wrote:
>> On Mon, Nov 17, 2014 at 10:14:51AM +0530, Abhilash Kesavan wrote:
>>> From: Pankaj Dubey
>>>
>>> Exynos7 has a similar serial controller to that present in o
Hi Tomasz,
On Mon, Dec 1, 2014 at 9:37 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Please see my comments below.
>
> 2014-11-24 22:02 GMT+09:00 Vivek Gautam :
>> USB and Power regulator on Exynos7 require gpios available
>> in BUS1 pin controller block.
>> S
On Thursday 04 September 2014 01:31:21 Kukjin Kim wrote:
> > This is the board specific file, so it seems ok.
> >
> I mean there are many espresso boards are having different exynos7
> SoC. I mean exynos7-espresso cannot represent all of espresso boards.
>
Ah, I see,
On Fri, Nov 21, 2014 at 07:05:43PM +0530, Vivek Gautam wrote:
> The series has dependency on
> a) "[PATCH v7 0/7] Enable support for Samsung Exynos7 SoC"
>http://www.spinics.net/lists/linux-samsung-soc/msg38734.html
> b) "[GIT PULL] Samsung clock changes for 3.19&q
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