On Wed, Dec 24, 2014 at 12:05 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 23/12/14 15:57, Chanwoo Choi wrote:
I'll fix it and re-send these patch-set.
There is no need, I already corrected it.
The patches are already queued in this branch:
http://git.linuxtv.org/cgit.cgi
This patch adds the support for suspend-to-ram feature of Exynos3250 SoC.
Exynos3250 don't contain the L2 cache.
The measured power-consumption in suspend state:
- before entering suspend : 31mA
- in suspend state : 16mA
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c
- DEVFREQ_EVENT_TYPE_LATENCY
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/devfreq-event.c | 58 -
include/linux/devfreq-event.h | 25 +++---
2 files
0x1366_
- PPMU_MFC_RIGHT 0x1367_
Additionally, the Exynos4210 SoC includes following PPMUs:
- PPMU_LCD1 0x1224_
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi| 108
This patch add PPMU dt node to Exynos3250-base Rinato board. The PPMU dt node
is used to get the utilization of DMC0/DMC1/LEFTBUS/RIGHTBUS Block.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm
0x116A
- PPMU_CAMIF0x11AC
- PPMU_LCD0 0x11E4
- PPMU_FSYS 0x1263
- PPMU_3D 0x1322
- PPMU_MFC 0x1366
- PPMU_CPU 0x106c
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p
This patch adds the documentation for Exynos PPMU (Platform Performance
Monitoring Unit) devfreq-event driver.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
.../bindings/devfreq/event/exynos-ppmu.txt
)
: Provide measured raw data to devfreq device for governor
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig | 2 +
drivers/devfreq/Makefile| 6 +-
drivers
in each IP.
This patch is based on existing drivers/devfreq/exynos/exynos-ppmu.c
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/event/Kconfig | 9 +
drivers/devfreq/event/Makefile
On 12/23/2014 12:40 PM, Varka Bhadram wrote:
On Tue, Dec 23, 2014 at 8:48 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch adds exynos-ppmu devfreq-event driver to get performance data
of each IP for Samsung Exynos SoC. These event from Exynos PPMU provide
useful information about
Hi Varka,
On 12/23/2014 01:35 PM, Chanwoo Choi wrote:
On 12/23/2014 12:40 PM, Varka Bhadram wrote:
On Tue, Dec 23, 2014 at 8:48 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch adds exynos-ppmu devfreq-event driver to get performance data
of each IP for Samsung Exynos SoC. These event
This patch-set uses the samsung_cmu_register_one() function to simplify the
clock driver for Exynos3250/Exynos4415 SoC and change return value of
samsung_cmu_register_one() because some clock driver may need the instance
of samsung_clk_provider structure.
Chanwoo Choi (3):
clk: samsung: Changes
This patch uses the samsung_cmu_register_one() to simplify complicated code
for Exynos4415.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Mike Turquette mturque...@linaro.org
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park
mturque...@linaro.org
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/clk/samsung/clk.c | 13 ++---
drivers/clk/samsung/clk.h | 3 ++-
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 4bda540..980c5da
This patch uses the samsung_cmu_register_one() to simplify complicated code.
for Exynos3250.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Mike Turquette mturque...@linaro.org
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park
Hi Beomho,
On 12/19/2014 05:39 PM, Beomho Seo wrote:
This patch replace number by macro in gpio keys for exynos 3250 boards.
Cc: Youngjun Cho yj44@samsung.com
Cc: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Beomho Seo beomho@samsung.com
Reviewed-by: Chanwoo Choi cw00.c
Hi Beomho,
On 12/19/2014 05:39 PM, Beomho Seo wrote:
This patch remove unecessary property of gpio-keys node.
gpio-keys driver do not uses interrupts and interrupt-parent.
Cc: Youngjun Cho yj44@samsung.com
Cc: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Beomho Seo beomho
?
You're right. devfreq_event_is_enabled() has ambiguous operation according
to your comment.
I'll only control the enable_count in the subsystem without ops-is_enabled()
and then remove the is_enabled function in the structre devfreq_event_ops.
Best Regards,
Chanwoo Choi
[Off-Topic
Regards,
Chanwoo Choi
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0x1366_
- PPMU_MFC_RIGHT 0x1367_
Additionally, the Exynos4210 SoC includes following PPMUs:
- PPMU_LCD1 0x1224_
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi| 108
- DEVFREQ_EVENT_TYPE_LATENCY
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/devfreq-event.c | 58 -
include/linux/devfreq.h | 25 +++---
2 files
)
: Provide measured raw data to devfreq device for governor
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig | 2 +
drivers/devfreq/Makefile| 5 +-
drivers
.
If devfreq-event device is used on only on devfreq driver,
should used 'devfreq_enable_event_dev_exclusive()' function
- Add new patch6 for test on Exynos3250-based Rinato board
Chanwoo Choi (8):
devfreq: event: Add new devfreq_event class to provide basic data for devfreq
governor
devfreq
This patch adds the documentation for Exynos PPMU (Platform Performance
Monitoring Unit) devfreq-event driver.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
.../bindings/devfreq/event/exynos-ppmu.txt
0x116A
- PPMU_CAMIF0x11AC
- PPMU_LCD0 0x11E4
- PPMU_FSYS 0x1263
- PPMU_3D 0x1322
- PPMU_MFC 0x1366
- PPMU_CPU 0x106c
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p
frequency/
voltage scaling of Exynos5260 SoC with DEVFREQ framework.
Cc: Kukjin Kim kgene@samsung.com
Cc: Abhilash Kesavan a.kesa...@samsung.com
Cc: Jonghwan Choi jhbird.c...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos5260.dtsi | 90
in each IP.
This patch is based on existing drivers/devfreq/exynos/exynos-ppmu.c
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig | 9 +
drivers/devfreq/event/Makefile
This patch add PPMU dt node to Exynos3250-base Rinato board. The PPMU dt node
is used to get the utilization of DMC0/DMC1/LEFTBUS/RIGHTBUS Block.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm
-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
---
Documentation/kernel-parameters.txt | 12 +
drivers/tty/serial/Kconfig | 1 +
drivers/tty/serial/samsung.c| 103
3 files changed, 116 insertions(+)
diff --git
Hi Krzysztof,
On 12/15/2014 11:53 PM, Krzysztof Kozlowski wrote:
On pią, 2014-12-12 at 17:27 +0900, Chanwoo Choi wrote:
This patch adds the list of supported devfreq-event type as following.
Each devfreq-event device driver would support the various devfreq-event type
for devfreq governor
Hi Krzysztof,
On 12/15/2014 11:53 PM, Krzysztof Kozlowski wrote:
On pią, 2014-12-12 at 17:27 +0900, Chanwoo Choi wrote:
This patch add new devfreq_event class for devfreq_event device which provide
raw data (e.g., memory bus utilization/GPU utilization). This raw data from
devfreq_event data
Hi Krzysztof,
On 12/15/2014 07:30 PM, Krzysztof Kozlowski wrote:
On pią, 2014-12-12 at 12:42 +0900, Chanwoo Choi wrote:
Hi Krzysztof,
I replied again this mail because I'll use the mutex for
set_event()/get_event()
according to your comment. But, of_parse_phandle() seems that this function
Hi Krzysztof,
On 12/10/2014 10:21 PM, Chanwoo Choi wrote:
Hi Krzysztof,
On Wed, Dec 10, 2014 at 7:07 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
On wto, 2014-12-09 at 23:12 +0900, Chanwoo Choi wrote:
This patchset add new devfreq_event class to provide raw data to determine
on devfreq driver,
should used 'devfreq_enable_event_dev_exclusive()' function
- Add new patch6 for test on Exynos3250-based Rinato board
Chanwoo Choi (7):
devfreq: event: Add new devfreq_event class to provide basic data for devfreq
governor
devfreq: event: Add the list of supported
0x1367_
Additionally, the Exynos4210 SoC includes following PPMUs:
- PPMU_LCD1 0x1224_
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi| 96 +++
arch/arm/boot/dts
- DEVFREQ_EVENT_TYPE_LATENCY
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/devfreq-event.c | 44 +
include/linux/devfreq.h | 29
)
: Provide measured raw data to devfreq device for governor
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig | 2 +
drivers/devfreq/Makefile| 5 +-
drivers
This patch adds the documentation for Exynos PPMU (Performance Profiling
Monitoring Unit) devfreq-event driver.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
.../bindings/devfreq/event/exynos-ppmu.txt
This patch add PPMU dt node to Exynos3250-base Rinato board. The PPMU dt node
is used to get the utilization of DMC0/DMC1/LEFTBUS/RIGHTBUS Block.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm
0x116A
- PPMU_CAMIF0x11AC
- PPMU_LCD0 0x11E4
- PPMU_3D 0x1322
- PPMU_MFC_L0x1366
- PPMU_CPU 0x106c
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot
in each IP.
This patch is based on existing drivers/devfreq/exynos/exynos-ppmu.c
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig | 9 +
drivers/devfreq/event/Makefile
Hi Krzysztof,
I replied again this mail because I'll use the mutex for set_event()/get_event()
according to your comment. But, of_parse_phandle() seems that this function
don't need the of_node_put() function.
On 12/11/2014 11:13 AM, Chanwoo Choi wrote:
Hi Krzysztof,
First of all, thanks
Hi Krzysztof,
On Wed, Dec 10, 2014 at 7:07 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
On wto, 2014-12-09 at 23:12 +0900, Chanwoo Choi wrote:
This patchset add new devfreq_event class to provide raw data to determine
current utilization of device which is used for devfreq governor
Hi Krzysztof,
First of all, thanks for your review.
On 12/10/2014 06:37 PM, Krzysztof Kozlowski wrote:
On wto, 2014-12-09 at 23:13 +0900, Chanwoo Choi wrote:
This patch add new devfreq_event class for devfreq_event device which provide
raw data (e.g., memory bus utilization/GPU utilization
Hi Krzysztof,
On 12/10/2014 06:59 PM, Krzysztof Kozlowski wrote:
On wto, 2014-12-09 at 23:13 +0900, Chanwoo Choi wrote:
This patch add exynos-ppmu devfreq event driver to provider raw data about
the utilization of each IP in Exynos SoC series.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc
@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/devfreq-event.c | 44 +
include/linux/devfreq.h | 17
2 files changed, 61 insertions(+)
diff --git a/drivers
0x1367_
Additionally, the Exynos4210 SoC includes following PPMUs:
- PPMU_LCD1 0x1224_
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi| 96
- DEVFREQ_EVENT_TYPE_LATENCY
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/devfreq-event.c | 23 ---
include/linux/devfreq.h | 28
2 files changed
0x116A
- PPMU_CAMIF0x11AC
- PPMU_LCD0 0x11E4
- PPMU_3D 0x1322
- PPMU_MFC_L0x1366
- PPMU_CPU 0x106c
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot
is used on only on devfreq driver,
should used 'devfreq_enable_event_dev_exclusive()' function
- Add new patch6 for test on Exynos3250-based Rinato board
Chanwoo Choi (7):
devfreq: event: Add new devfreq_event class to provide basic data for devfreq
governor
devfreq: event: Add the list
)
: Provide measured raw data to devfreq device for governor
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig | 2 +
drivers/devfreq/Makefile| 5 +-
drivers
This patch add PPMU dt node to Exynos3250-base Rinato board. The PPMU dt node
is used to get the utilization of DMC0/DMC1/CPU Block.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts
This patch add exynos-ppmu devfreq event driver to provider raw data about
the utilization of each IP in Exynos SoC series.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/devfreq/Kconfig
Hi Pankaj,
On 12/08/2014 08:31 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote:
This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of
Exynos5433.
CMU_TOP domain provides source clocks to other CMU domains.
Cc: Sylwester Nawrocki
Hi Pankaj,
On 12/08/2014 08:31 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote:
This patch adds missing divider/gate clocks of CMU_PERIC domain
which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use
external input clock which has
Hi Pankaj,
On 12/08/2014 08:32 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote:
This patch adds missing gate clocks of CMU_PERIS domain
which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs.
The special clocks of CMU_PERIS use fin_pll source
Hi Pankaj,
On 12/08/2014 08:36 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote:
This patch adds ths mux/divider/gate clocksof CMU_G2D domain which includes
nit: %s/clocksof/clocks of
I'll fix it.
G2D/MDMA IPs. The CMU_G2D must need
Hi Pankaj,
On 12/08/2014 08:37 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote:
This patch adds the mux/divider/gate clock fo CMU_MIF domain which includes
nit: %s/fo/of
I'll fix it.
the clocks for DMC(DRAM memory controller) and CCI(Cache
On 12/09/2014 03:13 PM, Pankaj Dubey wrote:
On Tuesday 09 December 2014 06:42 AM, Chanwoo Choi wrote:
Hi Pankaj,
On 12/08/2014 08:31 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote:
This patch adds missing divider/gate clocks of CMU_PERIC
This patch adds the divider/gate of CMU_GSCL domain which contains gscaler
clocks.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik
for Exynos 64bit SoC
: arm64: Enable Exynos5433 SoC in the defconfig
Chanwoo Choi (18):
clk: samsung: exynos5433: Add clocks using common clock framework
clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain
clk: samsung: exynos5433: Add clocks for CMU_PERIC domain
clk: samsung
This patch adds the support for Exynos 64bit SoC. The delay_timer is only used
for Exynos 32bit SoC.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Kukjin Kim kgene@samsung.com
Cc: Mark Rutland mark.rutl...@arm.com
Signed-off-by: Chanwoo Choi cw00.c
This patch adds the mux/divider/gate clocks for CMU_AUD domain which
includes the clocks of Cortex-A6/Bus/Audio clocks.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
marc.zyng...@arm.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Olof Johansson o...@lixom.net
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik
Cc: Arnd Bergmann a...@arndb.de
Cc: Olof Johansson o...@lixom.net
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked
This patch enable Exynos5433 SoC in the arm64 defconfig.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
arch/arm64/configs
This patch adds missing gate clocks of CMU_PERIS domain
which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs.
The special clocks of CMU_PERIS use fin_pll source clock directly.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos5433 SoC.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
Acked-by: Inki Dae
need the source clock of 'sclk_hdmi_spdif_disp'
from CMU_TOP domain. This patch adds the clocks of CMU_TOP related to HDMI.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433.
CMU_TOP domain provides source clocks to other CMU domains.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki
Rutland mark.rutl...@arm.com
Cc: Marc Zyngier marc.zyng...@arm.com
Cc: Arnd Bergmann a...@arndb.de
Cc: Olof Johansson o...@lixom.net
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
and used for regiser accesses.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
.../devicetree
This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains
the clocks for GPU(3D Graphics Engine).
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked
tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 8 ++
drivers/clk/samsung/clk-exynos5433.c | 144
...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 106 +++
drivers/clk/samsung/Makefile
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which
contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
drivers/clk/samsung/clk-exynos5433.c | 590 +
include/dt-bindings/clock/exynos5433.h | 190 ++-
2 files
Walleij linus.wall...@linaro.org
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
Acked-by: Inki Dae inki@samsung.com
---
Changes from v1:
- Fix the wrong number of Exynos5433 (four - ten)
- Divide pinctrl patch from following patch[1]
[1] https
Dear Mark,
On 12/02/2014 08:09 PM, Mark Rutland wrote:
Hi,
On Tue, Dec 02, 2014 at 08:49:51AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433
supports
PSCI
and
pinctrl-exynos driver or not?
If I misunderstand, please let me know your question again.
Best Regards,
Chanwoo Choi
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samsung_clk_provider *exynos4415_dmc_ctx;
static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = {
MPLL_LOCK,
Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
Thanks,
Chanwoo Choi
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Dear Mark,
On 11/28/2014 11:00 PM, Mark Rutland wrote:
On Fri, Nov 28, 2014 at 01:18:25PM +, Chanwoo Choi wrote:
Dear Mark,
On 11/27/2014 08:18 PM, Mark Rutland wrote:
On Thu, Nov 27, 2014 at 07:35:13AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit
Hi Amit,
I'm so sorry. I used the name of other man on previous mail.
If you possbile, I want to include me in the mailing list.
Best Regards,
Chanwoo Choi
On 12/01/2014 01:30 PM, Chanwoo Choi wrote:
Hi Pankaj,
If you possible, could you add me to mailing list on the next patchset?
because
Dear Mark,
On 11/27/2014 08:18 PM, Mark Rutland wrote:
On Thu, Nov 27, 2014 at 07:35:13AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
based on Octal core CPUs (quad Cortex-A57 and quad Cortex-A53).
Cc: Kukjin Kim kgene@samsung.com
Cc
Dear Marc,
On 11/27/2014 07:26 PM, Marc Zyngier wrote:
On 27/11/14 07:35, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
based on Octal core CPUs (quad Cortex-A57 and quad Cortex-A53).
Cc: Kukjin Kim kgene@samsung.com
Cc: Mark Rutland mark.rutl
Hi Pankaj,
On 11/27/2014 07:26 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Thursday 27 November 2014 01:04 PM, Chanwoo Choi wrote:
This patch adds driver data for Exynos5433 SoC. Exynos5433 includes 228
multi-
functional input/output port pins and 135 memory port pins. There are 41
general
On 11/27/2014 08:18 PM, Catalin Marinas wrote:
On Thu, Nov 27, 2014 at 07:35:12AM +, Chanwoo Choi wrote:
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index f4536e0..8a5e8a0 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -152,6 +152,16 @@ config ARCH_EXYNOS
help
Dear Mark,
On 11/27/2014 08:21 PM, Mark Rutland wrote:
On Thu, Nov 27, 2014 at 07:34:59AM +, Chanwoo Choi wrote:
This patch add binding documentation for Exynos5433 clock controller.
Exynos5433 has various clock domains So, this documentation explains
the detailed clock domains ans usage
Dear Arnd,
On 11/27/2014 08:41 PM, Arnd Bergmann wrote:
On Thursday 27 November 2014 16:35:08 Chanwoo Choi wrote:
+ - samsung,exynos5433-cmu-bus0, samsung,exynos5433-cmu-bus1
+and samsung,exynos5433-cmu-bus2 - clock controller compatible for
CMU_BUS
+which generates global data
Hi Sylwester,
On 11/27/2014 09:12 PM, Sylwester Nawrocki wrote:
Hi,
On 27/11/14 12:56, Chanwoo Choi wrote:
On 11/27/2014 08:41 PM, Arnd Bergmann wrote:
On Thursday 27 November 2014 16:35:08 Chanwoo Choi wrote:
+ - samsung,exynos5433-cmu-bus0, samsung,exynos5433-cmu-bus1
+and samsung
Hi Pankaj,
On 11/27/2014 08:48 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Thursday 27 November 2014 01:05 PM, Chanwoo Choi wrote:
This patch adds the support for CMU (Clock Management Units) of Exynos5433
which is 64bit SoC and has Octa-cores. This patch supports necessary clocks
for kernel
Dear Arnd,
On 11/27/2014 09:35 PM, Arnd Bergmann wrote:
On Thursday 27 November 2014 13:12:08 Sylwester Nawrocki wrote:
On 27/11/14 12:56, Chanwoo Choi wrote:
On 11/27/2014 08:41 PM, Arnd Bergmann wrote:
On Thursday 27 November 2014 16:35:08 Chanwoo Choi wrote:
+ - samsung,exynos5433-cmu
On Thu, Nov 27, 2014 at 11:02 PM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 27 November 2014 22:41:49 Chanwoo Choi wrote:
2014년 11월 27일 목요일, Arnd Bergmanna...@arndb.de님이 작성한 메시지:
On Thursday 27 November 2014 21:58:53 Chanwoo Choi wrote:
Dear Arnd,
On 11/27/2014 09:35 PM, Arnd
On Fri, Nov 28, 2014 at 12:33 AM, Arnd Bergmann a...@arndb.de wrote:
On Friday 28 November 2014 00:17:40 Chanwoo Choi wrote:
But, fixed-clock pass all properties from dt file to
driver/clk/clk-fixed-rate.c.
and fixed-clock driver has not the data dependent on h/w. e.g.,
clock offset, parent
On Fri, Nov 28, 2014 at 12:51 AM, Arnd Bergmann a...@arndb.de wrote:
On Friday 28 November 2014 00:44:07 Chanwoo Choi wrote:
+#define bus_div_clks(num)\
+static struct samsung_div_clock bus##num_div_clks[] __initdata = {\
+/* DIV_BUS
Hi Pankaj,
On 11/27/2014 08:48 PM, Pankaj Dubey wrote:
Hi Chanwoo,
On Thursday 27 November 2014 01:05 PM, Chanwoo Choi wrote:
This patch adds the support for CMU (Clock Management Units) of Exynos5433
which is 64bit SoC and has Octa-cores. This patch supports necessary clocks
for kernel
This patch adds missing divider/gate clocks of CMU_PERIC domain
which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use
external input clock which has 'ioclk_*' prefix.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos5433 SoC.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
Acked-by: Inki Dae
This patch adds the mux/divider/gate clocks for CMU_AUD domain which
includes the clocks of Cortex-A6/Bus/Audio clocks.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Geunsik Lim geunsik@samsung.com
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 8 ++
drivers/clk/samsung/clk-exynos5433.c | 144
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